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• NORD-50
  | physical address = 4 megabytes * The lower 16 registers can be used as base or index registers for addressing.
  3 KB (496 words) - 03:51, 20 October 2018
• Assembly language
  ...ic [[object code]]. Rather than being in [[binary]] (expressed in whatever base), it instead uses mnemonics to indicate the [[instruction]]s (e.g. 'ADD'), ...n't need to be modified as the program is changed (changing the [[absolute address]]es at which their targets reside).
  1 KB (167 words) - 00:30, 20 June 2023
• Base and bounds
  ...f a pair of [[register]]s which gave the location in [[main memory]] (the 'base') of the [[user]]'s allocated memory area, and another which set a limit on ...that limit was in terms of actual main memory, or in terms of the user's [[address space]], depended on the details of the hardware implementation, and was on
  995 bytes (161 words) - 21:34, 15 December 2018
• PDP-15
  | physical address = 17 bits (128K words) | virtual address = 12 bits (direct), 15 bits (indirect), 17 bits (indexed)
  4 KB (591 words) - 13:40, 11 July 2023
• Memory management
  ...ocess]] is allowed to use. In other words, it controls what the process' [[address space]] looks like. ...ich makes allocation of physical memory much simpler - unlike in earlier [[base and bounds]] memory management.
  1 KB (235 words) - 17:28, 8 June 2023
• Able ENABLE
  ...es, the source of any given cycle). It then produced cycles to relocated [[address]]es on a separate [[Extended UNIBUS]]; the latter could hold stock EUB memo ...e PAR to use for any given memory cycle is selected based on the [[virtual address]], the CPU's current mode (Kernel, User, etc), and, for machines which supp
  9 KB (1,569 words) - 15:47, 6 February 2024
• DL10 PDP-11 Data Link
  | A || colspan=2 | P || colspan=3 | 1 || colspan=8 | Unused || colspan=22 | Address | colspan=3 | P || colspan=3 | S || colspan=8 | Word count || colspan=22 | Address
  5 KB (664 words) - 17:27, 7 November 2023
• Rubin 10-11 interface
  ...e page could be independently directed to a window in the selected UNIBUS' address space, controlled by the page's mapping register: | Relocation || 16 || Base address on UNIBUS
  3 KB (402 words) - 17:01, 22 March 2024
• Berkeley Time-Sharing System
  ...rating modes for the [[CPU]], "user" and "monitor" (or "executive") to the base "normal" mode (in which the machine operated ''almost'' exactly as a normal * The user's [[address space]] was divided into 8 [[segment]]s (each 2K [[word]]s long), each of w
  4 KB (603 words) - 14:51, 11 June 2023
• Swapping
  '''Swapping''' is the term for moving the contents of a [[process]]' [[address space]], as a unitary entity, back and forth between [[main memory]] and [[ ...did not support paging, i.e. those which did [[memory management]] using [[base and bounds]] [[register]]s.
  1 KB (185 words) - 21:38, 15 December 2018
• Array
  ...ed to the index (often through use of an [[index register]]) to give the [[address]] of the desired array element.
  681 bytes (105 words) - 16:21, 15 December 2018
• Term-Mite ST Smart Terminal/TermMite.asm
  mov home,a ;home address = 0000 (this changes with scrolling) L0133 mov a,#10H ;move 1000 to cursor address
  24 KB (5,539 words) - 03:05, 27 December 2018
• PARC Universal Packet
  In the 1980s [[Xerox]] used PUP as the base for the [[Xerox Network Services]] (XNS) protocol suite; some of the protoc ...ds to the [[Internet Protocol]] (IP) layer in TCP/IP. A full PUP [[network address]] consisted of an 8-bit network number, an 8-bit host number, and a 16-bit
  6 KB (926 words) - 16:27, 11 May 2023
• CDC 6600
  | physical address = 17 bits | memory mgmt = [[base and bounds]]
  6 KB (789 words) - 17:26, 22 January 2024
• IBM 7030 Stretch
  | physical address = 18 bits (256K words) | virtual address = 18 bits
  3 KB (467 words) - 16:37, 11 January 2024
• Mapping
  ...]]es in physical [[main memory]]. This may be done in a simple way, with [[base and bounds]] [[register]]s, or the use of [[page table]]s when [[virtual me
  483 bytes (74 words) - 19:33, 14 December 2018
• KL11 Teletype Control
  ...SPC]] slot, along with two standard single card [[FLIP CHIP]]s, the [[M105 Address Selector]] and the [[M782 Interrupt Control]]. ...egisters are 0777560-2, and the transmitter are 0777564-6), and 060 is the base vector.
  3 KB (400 words) - 16:21, 18 February 2023
• KEV11-C Commercial Instruction Set
  ...cause the DIS and basic [[instruction set]] together use the entire uROM [[address space]]. ...40-pin hybrid (two chips on one carrier) which holds the two uROMs of the base instruction set. The hybrid is 23-001B6, 23-002B6, or 23-003B6 (for M7264 E
  1 KB (241 words) - 21:11, 2 July 2023
• LSI-11 chip set
  | 22-23 || x ||   || [[Bus Address Register|BAR]] ...codes]] logic, and a data port which gives access to the [[QBUS]]' data/[[address]] lines.
  5 KB (773 words) - 22:42, 20 December 2023
• UNIX V6 dump analysis
  ...est (typing '^\' in standard V6), or by any of the error conditions (odd [[address]], etc) which cause a process abort and core dump. ...either kind), they are not contiguous in the process [[virtual address]] [[address space|space]]; the [[PDP-11 Memory Management]] separates them there.
  4 KB (719 words) - 12:07, 2 July 2022

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