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• PDP-11 Bootstrap Loader
  [[QBUS CPU ODT‎|ODT]] in the [[LSI-11 CPUs]] also has a command to load programs in bootstrap loader format. ...cumented in some detail in the "paper tape software programming handbook" (DEC-11-GGPB-D), pp. 6-1 to 6-8.
  3 KB (527 words) - 19:52, 16 November 2023
• LSI-11 CPUs
  ...orporation|DEC]]'s first cost-reduced [[PDP-11]] [[Central Processing Unit|CPUs]], using a [[microprocessor]] (the [[LSI-11 chip set]]). They also used a n The first [[LSI-11]] was a [[DEC card form factor|quad]] board (M7264) with additional functionality on-boar
  3 KB (453 words) - 16:35, 6 April 2024
• KA650 CPU
  ...[[MicroVAX]], [[VAXserver]], and [[VAXstation]] systems. It is a single [[DEC card form factor|quad]]-height [[printed circuit board|PCB]] which plugs in The only differences between the two CPUs are the system [[ROM]]s:
  3 KB (369 words) - 08:32, 12 September 2023
• DEC Modules by bus
  == [[DEC 4000]] Modules == | style="padding: 0 1em 0;" | DEC 4000-600 CPU 1MB cache [[#ref_5|[5]]]
  51 KB (6,185 words) - 15:20, 15 January 2024
• PDP-11 family differences appendix
  ...n the fine details of their behavior. (Had [[Digital Equipment Corporation|DEC]] formalized the [[PDP-11 architecture]] earlier, these might not have happ | 03 || [[LSI11 CPUs]]
  2 KB (343 words) - 03:12, 13 September 2020
• DEC part number
  ...' (sometimes the first hyphen is omitted). [[Digital Equipment Corporation|DEC]] had a system for their part numbers, such that looking at a part number w ...these numbers are ''not'' 'DEC part numbers', as defined by the applicable DEC specifications (below).
  3 KB (363 words) - 16:38, 14 August 2022
• DA10 Twelve- and Eighteen-Bit Computer Interface
  ...[[PDP-10]] [[mainframe]]s to a variety of [[Digital Equipment Corporation|DEC]] [[minicomputer]]s which could be equipped with negative I/O [[bus]]es, fo ..., it could be connected to [[KA10]] and [[KI10]] [[Central Processing Unit|CPUs]], but only to [[KL10]]s with the optional [[DIA20 In/Out Bus Controller]]
  3 KB (442 words) - 14:51, 7 March 2023
• DTE20 Ten-Eleven Interface
  ...or Interface''') is a [[peripheral]] on [[KL10]] [[Central Processing Unit|CPUs]] which allows a [[PDP-11]] to act as a [[front end]]. Depending on how the A 'restricted' DTE20 consists of a pair of [[DEC card form factor|hex]] boards (M8552, M8553) and a dual card (M8554), plugg
  2 KB (410 words) - 13:14, 12 November 2023
• DIA20 IBus Adapter
  ...nal [[device controller|controller]] on [[KL10]] [[Central Processing Unit|CPUs]] which provides an old-style [[PDP-10 I/O Bus]] (termed an 'IBus'), to all It consists of a number of [[DEC card form factor|hex]] boards (two M8550s and an M8551) plugged into an I/O
  2 KB (282 words) - 12:34, 6 November 2023
• DMA20 Memory Bus Adapter
  ...emory]] banks of [[PDP-10 memories]] will allow banks to be shared between CPUs.) It consists of ten [[DEC card form factor|hex]] boards (an M8560, M8563, and eight M8558 modules) pl
  2 KB (274 words) - 15:10, 9 November 2023
• UNIBUS Device Addresses
  ...k is specifically called out that way in a [[Digital Equipment Corporation|DEC]] document (source indicated). CPU [[memory management]] registers marked with "%" do not exist in CPUs with the [[PDP-11 Memory Management#Simplified subset|'11/40' type memory m
  7 KB (927 words) - 11:26, 12 November 2021
• UNIBUS and QBUS termination
  ...s necessary, but can be provided anywhere on the bus; most [[UNIBUS]]/QBUS CPUs do so, with the notable exception of the [[KD11-D CPU|KD11-D]] of the [[PDP ...). However, most PDP-11 CPUs (including all QBUS CPUs, such as the [[KDF11 CPUs]]) have it, and will time out unused grants. (This takes somewhat longer th
  7 KB (1,202 words) - 14:32, 28 November 2023
• KDJ11-D CPU
  ...g the [[J-11 chip set]] of the [[PDP-11]] of the [[KDJ11 CPUs]]. It is a [[DEC card form factor|quad-height]] board, the '''M7554'''; it is available in t * [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1D-UG_KDJ11-D_May87.pdf KDJ11-D/S CPU Module User's Guide]
  3 KB (529 words) - 12:01, 15 August 2022
• M9302 UNIBUS terminator
  ...is a [[DEC card form factor|dual]] format card, intended for use in the [[DEC edge connector contact identification|two top (AB) sections]] of a [[Modifi ...permanent assertion of SACK. (In many [[PDP-11]] [[Central Processing Unit|CPUs]], that will [[KY11-L to CPU interface|freeze the CPU]].)
  1 KB (229 words) - 22:33, 7 March 2023
• M8264 No-SACK Timeout Module
  ...out circuit]] which is not included in those two [[Central Processing Unit|CPUs]]. It was a [[DEC card form factor|quad]] format card, which plugged into any available [[Sma
  4 KB (740 words) - 16:41, 20 April 2022
• VAX-11/750 & VAX-11/751 Revision Control
  11/750 CPUs, beginning with Serial No. BTO3096, and 11/751 CPUs, Revision, MR (Module Revision) or PR (Part Revision). DEC Standard 012
  101 KB (10,182 words) - 14:04, 2 July 2022
• VAXcluster
  The HSC50, itself a cluster node, communicates with host cpus by way of the CI, using Digital’s MSCP (Mass Storage Control Protocol) fo DEC VAXclusters were introduced with VMS V3.0 in 1982.
  13 KB (1,908 words) - 19:25, 27 April 2024
• KA650 Revision Control
  | 2-0 MicroVAX KA650 CPUS ......................................... 8... | Revision levels are tracked according to DEC Standard 068....
  135 KB (5,037 words) - 14:06, 2 July 2022
• VAXft series
  ...t tolerant]] [[VAX]] computers produced by [[Digital Equipment Corporation|DEC]]. They used [[redundancy]] to produce reliable operation. ...cable' running between the CPUs. The cable allowed [[hardware]] in the two CPUs to check, on an [[instruction]]-by-instruction basis, that they were produc
  2 KB (307 words) - 08:39, 13 May 2024
• PDP-10 I/O Bus
  ...DT01C I/O Bus Switch allowed a device to be switched between two different CPUs. ...d circuit board|PCBs]] at each end, which plugged into slots in a standard DEC [[backplane]]; these later became the CJ connectors.
  1 KB (234 words) - 14:22, 23 October 2022

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