DLV11-J asynchronous serial line interface

From Computer History Wiki
Revision as of 00:45, 27 July 2019 by Jnc (talk | contribs) (An OK start)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

The DLV11-J asynchronous serial line interface card (M8043) was a QBUS peripheral for the PDP-11 series of computers which provided four asynchronous serial lines on a single dual-width card.

It provided both EIA RS-232 or RS-422 connectivity at speeds of 110 to 38.4K baud; it did not have any modem control. Line connection was via 10-pin Berg connector headers on the top edge of the card, using the standard DEC asynchronous serial line pinout.

Programing interface

Like the ancestral KL11, for each line the DL11-J has 2 device registers for the receive side (one Control and Status Register - CSR - and one data buffer register), and similarly, two for the transmit side. Each line has two interrupt vectors - again, one receive, and one transmit.

For the PDP-11 main console (which is always a KL11/DL11 compatible device), the standard is that 0777560 is the base address (so the receiver registers are 0777560-2, and the transmitter are 0777564-6), and 060 is the base vector. That line can be set to halt the CPU, or re-boot the system, when a 'break' is seen.

The first line after the console is always assigned the address 0776500, and vector 0300. Additional lines are assigned addresses and vectors immediately following, for DL11's #1-#16 (i.e. 0776500-676 and 0300-0476).