FLIP CHIP details

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Here are detailed descriptions of FLIP CHIPs:

M167

This is a 8-bit comparator; it compares the value of two 8-bit numbers and provides four outputs which provide the relationships between those two numbers (A=B, A>B, A>=B, and B>=A). An EQUAL IN input, on pin U2, is provided for cascading them.

Inputs (bits numbered in PDP-11 style, with LSB = bit 0):

Input Pin Input Pin
A7 F2 B7 H2
A6 H1 B6 S1
A5 E2 B5 D2
A4 F1 B4 E1
A3 C1 B3 D1
A2 J1 B2 M1
A1 K1 B1 M2
A0 B1 B0 A1

Outputs:

Pin Signal
P1 EQUAL OUT (L)
R1 EQUAL OUT (H)
V1 A>B (H)
U1 B>=A (H)
L1 A>=B (H)

M203

This contains eight R/S flip flops. They are formed from a pair of NAND gates interconnected in the usual fashion; they provide inverted S and R inputs, and normal and inverted outputs.

M225

This is a 16x16-bit scratchpad memory; this card is used in the KA11 processor of the PDP-11/20, and is documented there.

In addition to 16-bit wide input and output, and byte write controls, it also provides an 4 sets of the 4 address inputs, and 4 inputs to select the desired set of address input. (I.e. the address lines are binary encoded, but the address select lines are not.) An internal 4-way mux selects the desired set of address inputs.

Data pins:

Input Pin Output Pin
I00 AF2 O00 AE1
I01 AA1 O01 AC1
I02 AK2 O02 AL1
I03 AH1 O03 AJ1
I04 AE2 O04 AF1
I05 AD2 O05 AD1
I06 AJ2 O06 AM1
I07 AH2 O07 AK1
I08 BR2 O08 BM2
I09 BL1 O09 BM1
I10 BV2 O10 BU1
I11 BP1 O11 BR1
I12 BP2 O12 BT2
I13 BN2 O13 BN1
I14 BU2 O14 BV1
I15 BS2 O15 BS1

There may be a certain amount of variance between which pin is used for which bit; since the card is purely memory, the bits can be re-ordered without harm.

Control pins:

Address set select Pin Address set A Pin Address set B Pin Address set C Pin Address set D Pin
A0 BE1 AA0 BF2 AB0 BH1 AC0 BE2 AD0 BF1
A1 BJ1 AA1 BD1 AB1 BD2 AC1 BC1 AD1 BA1
A2 AP2 AA2 AV2 AB2 AV1 AC2 AU1 AD2 AU2
A3 AS1 AA3 AT2 AB3 AS2 AC3 AR2 AD3 AR1

Pin BK1 is 'WRITE 15/8', and pin AM2 is 'WRITE 7/0'.

In addition, pin AN1 is a control input of some sort, but it is not yet clear what it does. It is possible that it is some sort of 'output enable'.

M240

This contains six R/S flip flops. They are formed from a pair of NAND gates interconnected in the usual fashion; they provide inverted S and R inputs, and normal and inverted outputs. They differ from the standard SR flops (in the M203, above) in that they have two set inputs.

M259

This is a dual 8-bit associative memory.

M602

This is a dual pulse amplifier. It produces a negative-going pulse (nominally 50 nsec wide), triggered by an input transitioning from high to low; the input is a triple-input OR with inverting inputs.

M826

Tthis is a clock with counter?/shift-register?

External links