Honeywell 6000 series

From Computer History Wiki
Revision as of 21:10, 17 September 2017 by Jnc (talk | contribs) (final tweaks (I hope!))
Jump to: navigation, search

The Honeywell 6000 series was a long-lived family of mainframes, in production from 1970 to 1989. They are probably best-known now for being the machines that Multics ran on for most of its life, after the initial stages.

They were descendants of the GE 600 series family; after GE's computer business was sold to Honeywell in 1966, the 6000 series were Honeywell's replacements. They used integrated circuits and larger printed circuit boards, unlike the older (and obsolescent) discrete transistor GE machines.

The basic architecture of the GE and Honeywell series was the same: a tightly-coupled multi-processor, with all the CPUs sharing access to a collection of multi-port memory units. All used 36-bit words, and almost identical instruction sets; Honeywell added an Extended Instruction Set (EIS) which provided string-manipulation instructions, packed decimal instructions, etc.

Most 6000 series machines ran GCOS (General Comprehensive Operating System), an evolution of the earlier GECOS (General Electric Comprehensive Operating Supervisor) - early Honeywell documentation continued to call it GECOS.

Some models in the line had the additional hardware - the 'Appending Unit' (APU) - needed to implement the single-level memory used by Multics, which ran only on some models of the GE 600 and Honeywell 6000 series lines.

System organization

Systems were constructed of 3 main kinds of units: CPUs, memories (technically, System Control Units, or SCUs, with the memories being an integral part of the SCU - although later documentation relegates the SCU to being a logically separate control unit, and refers to the combination of an SCU and memory as a Central Memory Unit, or CMU - although this term seems not to have caught on widely), and I/O controllers.

CPUs were connected to SCUs (with a separate cable from each CPU to each SCU); I/O controllers were also conencted to SCUs (again, a separate cable for each pairing), and could interrupt the CPUs via the SCUs.

The first generation of I/O controllers was the IOM (Input/Output Multiplexer); these were later replaced by the IMU (Information Multiplexer Unit), which was programmable. Again, the term 'IOM' seems have persisted as the name for I/O Controllers. All disk drives, tape drives, etc were connected to the IOMs, via mass storage and magnetic tape processors, respectively.

Serial lines, etc, were connected to a Front End Processor ('FNP', in Multics jargon), which were connected to IOMs (although some documentation indicates they could be connected to SCUs - although perhaps only on GCOS machines). There were several generations of these. 'Unit record' devices such as card readers, etc, were attached to a 'unit record processor', likewise attached to an IOM.

The maximum numbers of CPUs, etc which could be connected to one system varied from generation to generation (below), but 6-CPU Multics systems did exist. (The practical limit was caused by most SCUs having a maximum of 8 ports; each CPU used one port, as did each IOM.) Later on an attempt was made to 'break' this limit by developing 'port sharing' technology.

Generations

There were several generations of 6000 series machines, although some of the different names were more marketing gloss than significant changes. Performance improvements between the various generations were minimal.

Note: The data below is generally sourced from Honeywell documentation, including marketing material. It is occasionally inconsistent as to the maximum number of CPUs, etc supported on any model. It is possible that the specifications changed over time.

6000 Series

The first incarnation; the CPU speed was about 1 MIPS. The GCOS machines were the models 6030, 6040, 6050, 6060, 6070 and 6080. The lower-priced, odd-number models did not include the EIS; the others did.

In 1973 the model 6180, which supported Multics, was added.

Systems could have a maximum of 4 CPUs and 4 IOMs. The first-generation SCUs used with these models, with core memory, had a maximum capacity of 256KW each (later ones, with DRAM, could hold considerably more).

Series 60, Level 66 and Level 68

These were re-badged versions of the 6000 series, in slightly lower cabinets, introduced in 1975; they did, however, offer larger memory units. The incandescent light bulbs in the control panels (which changed from the white of the original 6000's, to black) were replaced by LEDs.

The Level 66 machines were GCOS, and Level 68 were Multics. GCOS models included the 66/05, /10, /20, /40, /60 and /80. The Multics models were the 68/60 and 68/80, which were identical except that in the former, the cache was disabled.

Level 66/DPS and Level 68/DPS

A 1977 re-naming of the line (no hardware changes); the Level 66's were GCOS, and the Level 68's were Multics. The names DPS-68 (and presumably DPS-66, to match) were also used.

GCOS models seem to have included the 66/DPS05 and /DPS1 through /DPS5, with varying numbers of CPUs (2, 3 and 4 in the last three). The /DPS1-/DPS5 could all be configured with up to four SCUs and four IOMs.

DPS-8

A lightly re-engineered version (about 1/3 of the boards were idenical; 1/3, or slightly more, were lightly modified; the rest were totally different) released in 1979. The extensive 'lights and switches' control panels of the earlier machines were replaced with a console terminal, driven by a micro-computer, the 'diagnostic processor', which interfaced to the CPUs, SCUs and IOMs.

DPS-8 systems supported a maximum of 4 SCU's, although each SCU could provide up to 16 Mbytes of memory, for 64 Mbytes total. A maximum of four IOMs (albeit each considerably more powerful than earlier versions) were normally supported. The SCUs and IOMs were not separate cabinets, as in early models, but shared a cabinet with the CPU.

The low-end GCOS models - the DPS-8/20 and DPS-8/44 - used micro-code, instead of being hard-wired (as all the other 6000 series processors were). Other GCOS models included the DPS-8/47, /49, /52, /62 and /70 (the first two being implemented in 74F technology). The /47 was limited to a single CPU and IOM, and the /49 to four CPUs and two IOMs; the /70 could support up to four IOMs.

The Multics units were the DPS-8/M models - the DPS-8/52M, DPS-8/62M and DPS-8/70M. Apparently all three used the same hardware, but the two lower-performance one has delays inserted into their clocks. The /70M came with an 8KW cache; later, an optional 32KW cache was introduced. The performance with the 8KW cache was about 1.68 times that of the 6180; with the 32KW cache, about 1.85.