Difference between revisions of "LSI-11"

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The '''LSI-11''' was DEC's first cost-reduced [[PDP-11]] [[Central Processing Unit|CPU]], using the [[QBUS]] and the [[LSI-11 chip set]]. The LSI-11 is a [[DEC card form factor|quad]] board (M7264) with additional functionality on-board. They were popular in [[Original Equipment Manufacturer|OEM]] usage.
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The '''LSI-11''' was DEC's first cost-reduced [[PDP-11]] [[Central Processing Unit|CPU]], using the [[QBUS]] and the [[LSI-11 chip set]]. They were popular in [[Original Equipment Manufacturer|OEM]] usage.
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The LSI-11 is a [[DEC card form factor|quad]] board (M7264) with additional functionality on-board. (A later board, the [[LSI-11/2]], packaged just the CPU on a dual card.)
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The LSI-11 is a [[QBUS#Variable address size|Q16]] device; it only drives 16 address lines. Although it can be plugged into a Q18 or Q22 [[backplane]], it will '''only''' function with Q16 [[main memory]]. (With Q22 memory, the pins used for BDAL18-21 are used for other, internal signals by the LSI-11. The reason for the incompatability with Q18 memory is currently unknown.)
  
 
The usual CPU options were available for the LSI-11: the [[KEV11-A floating point|KEV11-A]], for the [[PDP-11 Extended Instruction Set|EIS]]/[[FIS floating point|FIS]] instructions; the [[KEV11-B Extended Instruction Set|KEV11-B]] provides EIS without FIS; the [[KEV11-C Commercial Instruction Set|KEV11-C]] provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but not the FIS).
 
The usual CPU options were available for the LSI-11: the [[KEV11-A floating point|KEV11-A]], for the [[PDP-11 Extended Instruction Set|EIS]]/[[FIS floating point|FIS]] instructions; the [[KEV11-B Extended Instruction Set|KEV11-B]] provides EIS without FIS; the [[KEV11-C Commercial Instruction Set|KEV11-C]] provides a subset of the PDP-11 [[PDP-11 Commercial Instruction Set|CIS]] (it also apparently includes the EIS, but not the FIS).

Revision as of 13:59, 22 May 2019

The LSI-11 was DEC's first cost-reduced PDP-11 CPU, using the QBUS and the LSI-11 chip set. They were popular in OEM usage.

The LSI-11 is a quad board (M7264) with additional functionality on-board. (A later board, the LSI-11/2, packaged just the CPU on a dual card.)

The LSI-11 is a Q16 device; it only drives 16 address lines. Although it can be plugged into a Q18 or Q22 backplane, it will only function with Q16 main memory. (With Q22 memory, the pins used for BDAL18-21 are used for other, internal signals by the LSI-11. The reason for the incompatability with Q18 memory is currently unknown.)

The usual CPU options were available for the LSI-11: the KEV11-A, for the EIS/FIS instructions; the KEV11-B provides EIS without FIS; the KEV11-C provides a subset of the PDP-11 CIS (it also apparently includes the EIS, but not the FIS).

It also supported the optional KUV11 Writeable Control Store.

The chip order (from the left, with the contact finger edge down, and the component side facing the viewer) is KEV11, uROM 1, uROM 0, Control, Data Path.

ODT

They were the first PDP-11 model to not have a front panel to control them; instead, as a cost-reduction measure, when the CPU is halted, specialized microcode used the main serial line as a operating console. The command set is named Octal Debugging Technique (ODT); there are commands to read and write main memory, start the CPU, etc.

The main serial interface is normally configured so that when the CPU is running, sending a break on the console serial line halts the CPU.

Variant models

Many different LSI-11 models exist, including the KD11-F and KD11-H base versions, and numerous other variants. The KD11-F version includes 4KW of MOS RAM on-board; the KD11-H version has the RAM deleted.

Others included various KEV11 chips pre-installed:

  • the KD11-L is a KD11-F with a KEV11-A
  • the KD11-N is a KD11-H with a KEV11-A
  • the KD11-P is a KD11-F with a KEV11-C
  • the KD11-Q is a KD11-H with a KEV11-C

Some models include additional cards:

Links