ME10 core memory

From Computer History Wiki
Revision as of 03:05, 7 March 2019 by Jnc (talk | contribs) (Covers the basics)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

The ME10 was a main memory system for the mid-period PDP-10s, principally the KI10. It connected to the so-called external memory bus of either the 18-bit or 22-bit address form. An ME10 contained 16KW, and had a cycle time of 1.0 µseconds.

It was a multi-port memory, with 4 ports per memory system: each port can be independently disabled. The CPU uses one port (in a multi-processor system, one per CPU); the others are used by channels (such as a DF10) for mass storage such as disks.

Each port could be independently set for its address, and for either 2- or 4-way interleaving (using address bits 21 and 35, and bits 20 and 34, respectively).