Difference between revisions of "Programmable Logic Array"
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Latest revision as of 19:12, 3 August 2023
Programmable Logic Array (usually referred to by the acronym, PLA) is the name for a chips which contain a class of configurable blocks of logic elements; the programming is done with fusible links.
They contain programmable arrays of AND gates, whose outputs are led into programmable arrays of OR gates. They were later supplemented by Programmable Array Logic chips, which were less flexible (only their AND arrays were programmable), but therefore simpler.
