Difference between revisions of "Scheme Chip"
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| − | The ''Scheme Chip''s were a series of VLSI [[LISP machine]]s intended to run [[Scheme]]. | + | The '''Scheme Chip'''s were a series of VLSI [[LISP machine]] [[microprocessor]]s intended to run [[Scheme]]. |
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* [https://dspace.mit.edu/bitstream/handle/1721.1/41168/AI_WP_225.pdf The Assq Chip and Its Progeny] | * [https://dspace.mit.edu/bitstream/handle/1721.1/41168/AI_WP_225.pdf The Assq Chip and Its Progeny] | ||
* [https://dl.acm.org/doi/pdf/10.1145/62678.62690 Scheme86 - A System for Interpreting Scheme] | * [https://dl.acm.org/doi/pdf/10.1145/62678.62690 Scheme86 - A System for Interpreting Scheme] | ||
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| + | [[Category: Microprocessors]] | ||
Latest revision as of 20:26, 19 June 2023
The Scheme Chips were a series of VLSI LISP machine microprocessors intended to run Scheme.
