Only configuration documentation is currently known for this card, and no schematics, but since this card has four banks (i.e. it has a 9x4 array of xx64 64Kx1 chips; i.e. to provide a 16 bit wide bank of 128 Kbytes, plus byte parity, there are four groups of 18 chips), it is sometimes possible to repair problems in one.
If one bank is picking or dropping bit(s), and the others are not, or if the banks have differing errors, that meant that data paths are probably all OK, and it is a simple matter of finding the bad memory chips.
By pulling memory chips (luckily, they were socketed on the board of this type which was examined, so this was pretty painless), it was possible to work out which bits are stored in which chips; the order is semi-random, so a complete table is needed.
There does not seem to be any component location identification system on the card, so one has been created for use here. Looking at the card from the component side, with the handle at the top, and the contact fingers at the bottom, there's an array of memory chips 12 columns wide, and 6 rows high; the columns are identified as A-L (from the left), and the rows as 0-5 (from the top).
Bank 0 - Columns A, E, I:
Bank 1 - Columns B, F, J:
Bank 2 - Columns C, G, K:
Bank 3 - Columns D, H, L:
The banks 2 and 3 column assignments are a guess, not verified as yet. The bit allocation seems to be the same in all banks; a few were tried in bank 1, and they matched the ones in bank 0 (suitably offset in column, of course).