Computer History Wiki - User contributions [en]

PDP-11/40

2025-12-24T09:11:55Z

Ashlin4010: Fix formatting of Infobox (I broke it last edit)

{{Infobox Machine
| name=PDP-11/40
| image=Pdp-11-40.jpg
| imgwidth = 200px
| caption=PDP-11/40 with [[TU56 DECtape Transport|TU56]] dual [[DECtape]] drive.
| manufacturer=[[Digital Equipment Corporation|DEC]]
| year introduced = January, 1973
| word size= 16 bits
| virtual address= 16 bits
| physical address= 18 bits
| bus arch= [[UNIBUS]]|
| cpu = [[KD11-A CPU|KD11-A]]
|}}
The '''PDP-11/40''', introduced in 1973, was the second machine to support 18-bit [[main memory]] [[address]]ing on the [[PDP-11]] platform, after the [[PDP-11/45]] (albeit with a subset of the [[PDP-11 Memory Management]] [[architecture]]). The [[Original Equipment Manufacturer|OEM]] version of the -11/40 is the '''PDP-11/35'''; the machines are completely identical, except for the printing on the [[front panel]] inlay.

It used the [[KD11-A CPU]], which connected to the [[KY11-D Console|KY11-D]] front panel via a pair of BC08-R [[flat cable]]s. Optional additions to the [[Central Processing Unit|CPU]] included:

* [[KT11-D Memory Management]]
* [[KE11-E Extended Instruction Set]] ([[PDP-11 Extended Instruction Set|EIS]])
* [[KE11-F Floating Instruction Set]] ([[FIS floating point]]
* [[KJ11-A Stack Limit Register]]
* [[KW11-L Line Time Clock]]

It came in two types of [[mounting box]]es: the 21" [[BA11-F Mounting Box]] (usual for the -11/40); and the 10-1/2" [[BA11-D Mounting Box]] (early units) and [[BA11-K Mounting Box]]es (later units) (usual for the -11/35).

An -11/40 with a special blue-themed front panel was used as the [[front end]] for the [[KL10]] CPU in [[DECsystem-10]]s and [[DECSYSTEM-20]]s - though the -11/40 panel was hidden behind a cabinet door on the -20.

The 11/40 was also a primary platform for early [[UNIX]].

==Configuration Changes==

[[Image:PDP11-40-geerol.jpg|150px|thumb|right|A PDP-11/40 setup]]

Early versions of the BA11-F in the -11/40 omitted the 4 fans at the bottom of the pull-out used to house the CPU, and had only the 5 fans at the top.

The BA11-D used 9-pin [[DEC power distribution connectors]], whereas the BA11-K used the 6-pin/15-pin pair, so presumably the [[backplane]] for the BA11-D had a different [[power harness]] than the one for the BA11-K (which it is confirmed had the 6/15-pin connectors).

The power harness from the [[H742 Power Supply]] was also different in later models, allowing use of an [[H754 +20V, -5V Regulator]] which provided +20V, for use with the [[MM11-U core memory]].

The front panel had round LED cutouts and the data ribbon cables were on the right. Later revisions had square LED cutouts and the ribbon cables were on the left.

==Diagnostic Software==

Listed below is a non-exhaustive list of PDP-11/40 diagnostics. In brackets is the name of the paper tape binary, most of these test can be loaded and run from XXDP directly.
Much of the PDP-11 diagnostic software has been aggregated into one place, the "[https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/index.html PDP11 Diagnostic Database]", listings and binary files can be found there.

===Modules===
*'''KD11-A - CPU'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BQEA.html BQEA] (BQEAC1) - KD11-A CPU DIAGNOSTIC
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/ZKAQ.html ZKAQ] (ZKAQG0) - PDP-11 POWER FAIL DIAGNOSTIC
** This module is best exercise by having a UniBone assert DC LO via the pwr command.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBA.html CKBA] (CKBAB0) - PDP11 45-11/40 BASIC CP TESTS

'''KT11-D - Memory Management'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTA.html BKTA] (BKTAD1) - KT11-D BASIC LOGIC TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTB.html BKTB] (BKTBB0) - KT11-D ACCESS KEYS TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTD.html BKTD] (BKTDC0) - KT11-D PROCESSORS STATES TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTF.html BKTF] (BKTFD0) - MEMORY MANAGEMENT ABORT TESTS
** Across my two pdp-11 40 CPUs neither of them will pass these tests, I am suspicious there is an ECO or other factors at play.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTG.html BKTG] (BKTGD1) - KT11-D EXERCISER

'''KE11-E - Extended Instruction Set'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBI.html CKBI] (CKBIB0) - ASH INSTRUCTION TEST
** This module tests for ECO M7238-0004, older boards may fail this test. More info can be found in the module listing.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBJ.html CKBJ] (CKBJA0) - ASHC INSTRUCTION TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBK.html CKBK] (CKBKA0) - MUL INSTRUCTION TEST
** Tests can fail because of faults in the KE11-F. KE11-F tests may not catch all failures.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBL.html CKBL] (CKBLA0) - DIV INSTRUCTION TEST
** Tests can fail because of faults in the KE11-F. KE11-F tests may not catch all failures

'''KE11-F - Floating Instruction Set'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKEA.html BKEA] (BKEAB0) - KE11F (PDP-11 FIS) INSTRUCTION TESTS
** The KE11-F is dependant on the KE11-E, test it first.
** Tests 70-72 exercise the SACK timeout logic on the M7234 Timing board, this is the only module I am aware of that does so.
** The test will print three lines of random length lengths of "@". This is misleading, the test checks the floating point abort, it interleaves floating point operations and prints. When it successfully aborts it moves onto the next test. The number of "@"s written to the screen is an indication of the latency of the abort and should be low, typically less then 6. Seeing 10s of "@" per test is a should be considered as a failure.
** EIS MUL or DIV instructions are not tested, this is important because the FIS board can have failures that will cause the EIS to malfunction, specifically Auxiliary Alu Control, see KE-5 & KF-4.
** Tests 70-72 exercise BR4 and BG4, to accelerate this testing enable SW11 (skips sub-test, subsequently iterates tests quicker)
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKEB.html BKEB] (BKEBA0) - KE11F (PDP-11 FIS) EXERCISER

'''KJ11-A - Stack Limit Register'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBF.html CKBF] (CKBFD0) - STACK LIMIT TEST
** Documentation indicates this test should take approximately 1 minute, in my experience it takes closer to 2 (this might be anomalous).
** Internally this test does 1500 passes before indicating success, this can be manually altered if desired.

'''KW11-L - Line Time Clock'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/ZKAQ.html ZKWA] (ZKWAG0) - LINE FREQUENCY CLOCK TEST
** Exercises BR6 and BG6

== hampage.hu ==
Quoting...
<i>
[[Image:pdp11-40.jpg|200px|left]]
The /40 was introduced in January, 1973. It was a higher performance version of the /20, with a [[microcode]]d multi-board CPU. 18-bit MMU (-> max. 128 kw memory), FPU and EIS/FIS (extended/floating point instruction set) were available options.

There was a 'graphical' workstation model of the /40, using a [[VT11 Graphic Display Processor]], marketed as the GT44. Many /40s were used in DECsystem-10's (KL10's, to be exact), as the frontend/IO-processor. These were painted differently, the panel looks awsome in blue too. (no, it's not just the frontpanel, that I like about the -11...)

On the picture to the left we can see two RK05's (disk pack drives) and two TU60 (DECcasette) units. 

OS's at this point: DOS/BATCH, RSX11, RT-11, RSTS.

Trivia: The 11/40 was one of the most often "cloned" machine. the soviet/tscech/polish SM-4 (CM-4), the hungarian TPA-1140 are all copies of this computer.
</i>

{{semi-stub}}

==See also==

* [[PDP-11/40E]]

==External links==

* [https://iamvirtual.ca/collection/systems/minis/PDP11-10/PDP11-10--PriceList.pdf PDP-11/10-40 Price List] (January 1, 1973)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/DEC-11-H40SA-A-D_PDP-11_40_System_manual.pdf PDP-11/40 system manual] (DEC-11-H40SA-A-D)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/1140_SystemManual.pdf PDP-11/40, -11/35 (21 inch chassis) system manual] (EK-11040-TM-002)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/PDP-1140_System_Engr_Drawings_Rev_P_Jun74.pdf PDP-11/40 system engineering drawings]
* [http://www.bitsavers.org/pdf/dec/pdp11/memos/700925_PDP-1140_Technical_Memo_Index.pdf PDP-11/40 Technical Memo Index & Abstracts] - interesting overview of a series of design memos (most also available) on the -11/40

{{PDP-11}}

[[Category: UNIBUS PDP-11s]]

KE11-E Extended Instruction Set

2025-12-24T08:07:17Z

Ashlin4010: Added Note on ECO

[[Image:M7238KE11-EEIS.jpg|350px|thumb|right|M7238 card]]

The '''KE11-E Extended Instruction Set''' is the optional [[PDP-11 Extended Instruction Set]] for the [[KD11-A CPU]] of the [[PDP-11/40]]; it implements multiply, divide, and multi-bit shift instructions. It is also used by the [[KE11-F Floating Instruction Set]] option.

Physically, it consists of a single [[DEC card form factor|hex]] board, the M7238, which plugs into a pre-wired slot in the [[Central Processing Unit|CPU]] [[backplane]], and also connects up to the basic CPU's [[microcode]] [[bus]] through three [[over the back]] BC08-R 40-[[conductor]] [[flat cable]]s which plug into [[Berg connector]]s on the M7232 μWord card of the KD11-A.

The KE11-E includes its own microcode [[Read-only memory|ROM]], which produces an additional 24 bits width of microcode (to control the [[data path]]s and [[register]]s on the M7238), but also provides 44 bits of microcode to control registers and datapaths in the basic CPU. (The CPU's microcode is 56 bits wide; the other 12 bits are unused by the KE11-E, and are sent as 0's to the CPU.)

==ECO M7238-0004==

The diagnostics module CKBI includes a test specifically to check for ECO M7238-0004, it has this to say on the matter:
<pre>
9.0 PROGRAM DESCRIPTION

THIS IS A TEST OF THE ASH INSTRUCTION. IT TESTS ASH
WITH DIFFERENT SHIFT COUNTS IN ALL THE REGISTERS.

9.1 NOTE: THE LAST ROUTINE IN THIS DIAGNOSTIC IS DESIGNED TO
VERIFY THAT ECO M7238-0004/FCO M7238-0004 (11/40 ONLY)
HAS BEEN IMPLEMENTED AND IS FUNCTIONING PROPERLY. THIS ECO/FCO
AFFECTS THE 11/40 EIS (M7238) OPTION ONLY. THUS, ALL 11/40'S
MUST PASS THIS ROUTINE. ALSO, THE ECO HAS BEEN PHASED INTO
PRODUCTION SO ALL 11/40'S WITH THE M7238 MODULE MUST PASS THE
ROUTINE IN MANUFACTURING.
FIELD SERVICE - ALL M7238 MODULES INCORPORATING THIS ECO OR FCO
WILL HAVE CS REVISION E OR ABOVE AND MUST PASS THIS ROUTINE.
ANY M7238 MODULE BELOW THIS CS REVISION LEVEL WILL FAIL THE
ROUTINE. THIS IS ACCEPTABLE ONLY IF THE CUSTOMER SOFTWARE
DOES NOT MAKE USE OF THE DECREMENTED OPERAND RESULTING FROM
THE EXECUTION OF AN EXTENDED INSTRUCTION (ASH, ASHC, MUL OR DIV)
USING DESTINATION MODE FIVE. IF THE CUSTOMER SOFTWARE DOES
MAKE USE OF THIS DECREMENTED OPERAND THEN FCO M7238-0004
(CS REV. E) MUST BE INCORPORATED AND THE LAST ROUTINE IN THE
DIAGNOSTIC MUST PASS. IF THE FIELD SERVICE TECHNICIAN HAS
DETERMINED FROM THE ABOVE CRITERIA THAT A PARTICULAR M7238
MODULE IS NOT REQUIRED TO PASS THE LAST ROUTINE, THEN HE
MAY INSERT THE APPROPRIATE CODE TO JUMP FROM THE 'SCOPE'
INSTRUCTION TO 'ENDPAS', THUS BYPASSING THE ROUTINE. SEE
THE ECO OR FCO FOR MORE INFORMATION.
</pre>
No known copies of the ECO exist.

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1140/KE11_RefMan.pdf KE11-E and KE11-F instruction set options user's manual] (EK-KE11E-OP-001) 
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KE11E-TM-002%20KE11-E%20and%20KE11-F%20Instruction%20Set%20Options%20Manual.pdf KE11-E and KE11-F instruction set options manual] (EK-KE11E-TM-002)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/KE11-E_Engineering_Drawings.pdf KE11-E extended instruction set (EIS) option engineering drawings] 

[[Category: PDP-11 UNIBUS Processors]]

PDP-11/40

2025-12-24T07:41:00Z

Ashlin4010: Added section about diagnostic software for the PDP-11/40

{{Infobox Machine
| name=PDP-11/40
| image=Pdp-11-40.jpg
| imgwidth = 200px
| caption=PDP-11/40 with [[TU56 DECtape Transport|TU56]] dual [[DECtape]] drive.
| manufacturer=[[Digital Equipment Corporation|DEC]]
| year introduced = January, 1973
| word size= 16 bits
| virtual address= 16 bits
| physical address= 18 bits
| bus arch= [[UNIBUS]]|
| cpu = [[KD11-A CPU|KD11-A]]
|}
The '''PDP-11/40''', introduced in 1973, was the second machine to support 18-bit [[main memory]] [[address]]ing on the [[PDP-11]] platform, after the [[PDP-11/45]] (albeit with a subset of the [[PDP-11 Memory Management]] [[architecture]]). The [[Original Equipment Manufacturer|OEM]] version of the -11/40 is the '''PDP-11/35'''; the machines are completely identical, except for the printing on the [[front panel]] inlay.

It used the [[KD11-A CPU]], which connected to the [[KY11-D Console|KY11-D]] front panel via a pair of BC08-R [[flat cable]]s. Optional additions to the [[Central Processing Unit|CPU]] included:

* [[KT11-D Memory Management]]
* [[KE11-E Extended Instruction Set]] ([[PDP-11 Extended Instruction Set|EIS]])
* [[KE11-F Floating Instruction Set]] ([[FIS floating point]]
* [[KJ11-A Stack Limit Register]]
* [[KW11-L Line Time Clock]]

It came in two types of [[mounting box]]es: the 21" [[BA11-F Mounting Box]] (usual for the -11/40); and the 10-1/2" [[BA11-D Mounting Box]] (early units) and [[BA11-K Mounting Box]]es (later units) (usual for the -11/35).

An -11/40 with a special blue-themed front panel was used as the [[front end]] for the [[KL10]] CPU in [[DECsystem-10]]s and [[DECSYSTEM-20]]s - though the -11/40 panel was hidden behind a cabinet door on the -20.

The 11/40 was also a primary platform for early [[UNIX]].

==Configuration Changes==

[[Image:PDP11-40-geerol.jpg|150px|thumb|right|A PDP-11/40 setup]]

Early versions of the BA11-F in the -11/40 omitted the 4 fans at the bottom of the pull-out used to house the CPU, and had only the 5 fans at the top.

The BA11-D used 9-pin [[DEC power distribution connectors]], whereas the BA11-K used the 6-pin/15-pin pair, so presumably the [[backplane]] for the BA11-D had a different [[power harness]] than the one for the BA11-K (which it is confirmed had the 6/15-pin connectors).

The power harness from the [[H742 Power Supply]] was also different in later models, allowing use of an [[H754 +20V, -5V Regulator]] which provided +20V, for use with the [[MM11-U core memory]].

The front panel had round LED cutouts and the data ribbon cables were on the right. Later revisions had square LED cutouts and the ribbon cables were on the left.

==Diagnostic Software==

Listed below is a non-exhaustive list of PDP-11/40 diagnostics. In brackets is the name of the paper tape binary, most of these test can be loaded and run from XXDP directly.
Much of the PDP-11 diagnostic software has been aggregated into one place, the "[https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/index.html PDP11 Diagnostic Database]", listings and binary files can be found there.

===Modules===
*'''KD11-A - CPU'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BQEA.html BQEA] (BQEAC1) - KD11-A CPU DIAGNOSTIC
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/ZKAQ.html ZKAQ] (ZKAQG0) - PDP-11 POWER FAIL DIAGNOSTIC
** This module is best exercise by having a UniBone assert DC LO via the pwr command.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBA.html CKBA] (CKBAB0) - PDP11 45-11/40 BASIC CP TESTS

'''KT11-D - Memory Management'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTA.html BKTA] (BKTAD1) - KT11-D BASIC LOGIC TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTB.html BKTB] (BKTBB0) - KT11-D ACCESS KEYS TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTD.html BKTD] (BKTDC0) - KT11-D PROCESSORS STATES TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTF.html BKTF] (BKTFD0) - MEMORY MANAGEMENT ABORT TESTS
** Across my two pdp-11 40 CPUs neither of them will pass these tests, I am suspicious there is an ECO or other factors at play.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKTG.html BKTG] (BKTGD1) - KT11-D EXERCISER

'''KE11-E - Extended Instruction Set'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBI.html CKBI] (CKBIB0) - ASH INSTRUCTION TEST
** This module tests for ECO M7238-0004, older boards may fail this test. More info can be found in the module listing.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBJ.html CKBJ] (CKBJA0) - ASHC INSTRUCTION TEST
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBK.html CKBK] (CKBKA0) - MUL INSTRUCTION TEST
** Tests can fail because of faults in the KE11-F. KE11-F tests may not catch all failures.
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBL.html CKBL] (CKBLA0) - DIV INSTRUCTION TEST
** Tests can fail because of faults in the KE11-F. KE11-F tests may not catch all failures

'''KE11-F - Floating Instruction Set'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKEA.html BKEA] (BKEAB0) - KE11F (PDP-11 FIS) INSTRUCTION TESTS
** The KE11-F is dependant on the KE11-E, test it first.
** Tests 70-72 exercise the SACK timeout logic on the M7234 Timing board, this is the only module I am aware of that does so.
** The test will print three lines of random length lengths of "@". This is misleading, the test checks the floating point abort, it interleaves floating point operations and prints. When it successfully aborts it moves onto the next test. The number of "@"s written to the screen is an indication of the latency of the abort and should be low, typically less then 6. Seeing 10s of "@" per test is a should be considered as a failure.
** EIS MUL or DIV instructions are not tested, this is important because the FIS board can have failures that will cause the EIS to malfunction, specifically Auxiliary Alu Control, see KE-5 & KF-4.
** Tests 70-72 exercise BR4 and BG4, to accelerate this testing enable SW11 (skips sub-test, subsequently iterates tests quicker)
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/BKEB.html BKEB] (BKEBA0) - KE11F (PDP-11 FIS) EXERCISER

'''KJ11-A - Stack Limit Register'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/CKBF.html CKBF] (CKBFD0) - STACK LIMIT TEST
** Documentation indicates this test should take approximately 1 minute, in my experience it takes closer to 2 (this might be anomalous).
** Internally this test does 1500 passes before indicating success, this can be manually altered if desired.

'''KW11-L - Line Time Clock'''
* [https://www.retrocmp.com/images/stories/joerg/pdp11_diagnostic_database/modules/ZKAQ.html ZKWA] (ZKWAG0) - LINE FREQUENCY CLOCK TEST
** Exercises BR6 and BG6

== hampage.hu ==
Quoting...
<i>
[[Image:pdp11-40.jpg|200px|left]]
The /40 was introduced in January, 1973. It was a higher performance version of the /20, with a [[microcode]]d multi-board CPU. 18-bit MMU (-> max. 128 kw memory), FPU and EIS/FIS (extended/floating point instruction set) were available options.

There was a 'graphical' workstation model of the /40, using a [[VT11 Graphic Display Processor]], marketed as the GT44. Many /40s were used in DECsystem-10's (KL10's, to be exact), as the frontend/IO-processor. These were painted differently, the panel looks awsome in blue too. (no, it's not just the frontpanel, that I like about the -11...)

On the picture to the left we can see two RK05's (disk pack drives) and two TU60 (DECcasette) units. 

OS's at this point: DOS/BATCH, RSX11, RT-11, RSTS.

Trivia: The 11/40 was one of the most often "cloned" machine. the soviet/tscech/polish SM-4 (CM-4), the hungarian TPA-1140 are all copies of this computer.
</i>

{{semi-stub}}

==See also==

* [[PDP-11/40E]]

==External links==

* [https://iamvirtual.ca/collection/systems/minis/PDP11-10/PDP11-10--PriceList.pdf PDP-11/10-40 Price List] (January 1, 1973)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/DEC-11-H40SA-A-D_PDP-11_40_System_manual.pdf PDP-11/40 system manual] (DEC-11-H40SA-A-D)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/1140_SystemManual.pdf PDP-11/40, -11/35 (21 inch chassis) system manual] (EK-11040-TM-002)
* [http://www.bitsavers.org/pdf/dec/pdp11/1140/PDP-1140_System_Engr_Drawings_Rev_P_Jun74.pdf PDP-11/40 system engineering drawings]
* [http://www.bitsavers.org/pdf/dec/pdp11/memos/700925_PDP-1140_Technical_Memo_Index.pdf PDP-11/40 Technical Memo Index & Abstracts] - interesting overview of a series of design memos (most also available) on the -11/40

{{PDP-11}}

[[Category: UNIBUS PDP-11s]]

H742 Power Supply

2023-03-28T07:49:15Z

Ashlin4010:

The '''H742 Power Supply''', and later revision '''H7420''', is a modular [[power supply]] system from [[Digital Equipment Corporation|DEC]], used with the [[BA11-F Mounting Box]]. Among other uses, that mounting box is used in [[PDP-11/40]], [[PDP-11/45]] and [[PDP-11/70]] systems to hold the [[Central Processing Unit|CPU]].

The H742/H7420 runs off standard wall [[Alternating current|AC]]; it can be [[jumper]]ed to use either 110V or 220V supply.

The main [[transformer]] in the H742/H7420 provides 20-30V AC to several [[DEC standard modular regulators]] (up to five, in spaces numbered 'A' through 'E') mounted in the H742/H7420, which provide other voltages such as +5V to the [[backplane]]s in the mounting box.

Generally the [[power harness]] supports only limited options as to which regulator can be in which spaces; e.g. the later -11/40 harness mandates that A, B and C hold [[H744 +5V Regulator]]s, D holds an [[H745 -15V Regulator]], and E may hold either an H745 or [[H754 +20V, -5V Regulator]].

A [[DEC Power Line Monitor|5409730 board]] in the H742, replaced by an 5411086 board in the H7420, supplies a modest amount of +15V [[Direct current|DC]] power to various backplanes mounted in the BA11-F, along with a [[line time clock]] signal, and AC and DC 'power OK' signals.

The harness from the H742/H7420 (the same for both, it appears) used [[DEC power distribution connectors]] to provide power to the backplanes; it normally used the [[DEC standard power wire colour coding]].

The H742/H7420 did not support the [[Remote Switching Control Bus]]; the H742/H7420 was generally plugged into an [[861 Power Controller]], which did have the remote control capability.

A later version of the basic H742 is the H742A; the difference is not yet known.

For the H7420, in addition to the board above, the differences seem to be mainly mechanical: a larger cooling fan; a change in the orientation of the +15V supply board from horizontal to vertical (perhaps to make room for the fans); and the sheet metal enclosure holding the fan, board and transformer is a single unit, not two bolted together, as in the H742.

==See also==

* [[H765 Power System]]

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1160/EK-11060-SV-01_1160cab_Feb78.pdf PDP-11/60 cabinet and power supply manual] - the H7420 is covered in Chapter 3 (pg. 32 of the scanned version)
* [https://bitsavers.org/pdf/dec/pdp11/PDP-11_Mainframe_Troubleshooting_Guide_Dec76.pdf PDP-11 Mainframe Troubleshooting Guide] - the H742 connector pinout can be found on page 114
* [https://mouser.com/ProductDetail/VCC/6073-001-634R?qs=QjVfaZ6cteJFZI1gq5P05A%3D%3D Mouser Replacement Lamp] - VCC 6073-001-634R

[[Category: DEC Electrical]]

DB11-A Bus Repeater

2023-03-27T08:50:05Z

Ashlin4010: /* External links */

The '''DB11-A Bus Repeater''' allows a [[UNIBUS]] to double the number of [[peripheral]]s connected to the [[bus]] (in terms of the combined [[analog]] load).

It [[terminator|terminates]] (in analog terms) the first section of the bus, and active [[digital]] [[logic]] repeats all the [[signal]]s though onto the second section (or from the second back to the first, when required); the two sections are thus logically connected, but not in purely analog terms.

It consists of a custom [[system unit]] [[backplane]], holding a number of smaller [[FLIP CHIP]]s; mostly [[DEC card form factor|singles]] (see table below), with one dual (M7213).

{| class="wikitable"
! Type !! Count || Function
|-
| M783 || 1 || Bus driver
|-
| M784 || 1 || Bus receiver
|-
| M785 || 4 || Bus transceiver
|-
| M7212 || 3 || Address buffer
|-
| M7213 || 1 || Buffer master
|-
| M7248 || 1 || BBSY repeater
|-
| M930 || 2 || UNIBUS terminator
|}

Board locations (as seen from the board insertion side of the backplane, not the [[wire-wrap]] pin side, as is common in [[Digital Equipment Corporation|DEC]] documentation) are:

{| class="wikitable"
! !! colspan="6" | Connector
|-
! Slot !! A !! B !! C !! D !! E !! F
|-
| 1 || colspan="2" style="text-align:center;" | UNIBUS A In || M7248 || M7212 || M7212 || M7212
|-
| 2 || colspan="2" style="text-align:center;" | UNIBUS A termination || colspan="2" style="text-align:center;" | Unused || M784 || M783
|-
| 3 || Power || Unused || colspan="2" style="text-align:center;" | M7213 || M785 || M785
|-
| 4 || colspan="2" style="text-align:center;" | UNIBUS B Out || colspan="2" | UNIBUS B termination || M785 || M785
|}

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/EK-DB11A-TM-002_DB-11A_Bus_Repeater_Manual_Aug74.pdf DB11-A Bus Repeater Manual] - (EK-DB11A-TM-002)
* [http://www.bitsavers.org/pdf/dec/unibus/DB11-A_RevS_Engineering_Drawings_Jan76.pdf DB11-A Engineering Drawings ] - Various bus drivers, repeaters and terminators

[[Category: UNIBUS]]

DB11-A Bus Repeater

2023-03-27T08:49:33Z

Ashlin4010: /* External links */

Modified UNIBUS Device

2023-03-27T08:46:56Z

Ashlin4010: /* External links */

'''Modified UNIBUS Device''' or '''MUD''' was [[DEC]]'s name for an I/O board slot in the [[backplane]]s of [[UNIBUS]] [[PDP-11]]s. It was a [[DEC card form factor|hex]] slot, and could hold any kind of device.

It differed from the older [[Small Peripheral Controller|SPC]] slot in that it was a hex-height slot, and used the pins (in the [[DEC edge connector contact identification|A-B connectors]]) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences.

The most important was that since the standard UNIBUS dual connector only contains one pin per [[bus grant line]] (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the [[QBUS]]), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors therefore do not contain grants; those pins were recycled for other functions.

Some re-assigned pins contain a number of lines for communication between a [[parity]] controller, and parity-capable [[main memory]] boards plugged into that backplane; others carry additional [[voltage]]s (primarily for [[core memory]]).

Technically, a MUD slot only describes the A-B [[DEC edge connector contact identification|connectors]]; most backplanes also provided SPC functionality in the C-F connectors (needed for signals for [[interrupt]]s or [[Direct Memory Access|DMA]], for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called a 'MUD/SPC' slot.

The [[DD11-C backplane|DD11-C]] (4-slot) and [[DD11-D backplane|DD11-D]] (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B, and SPC in C-F.

==Grants==

MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B.

A board plugged into a MUD/SPC slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through.

The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot.

Un-occupied slots needed to have a [[G7273 grant continuity card|grant continuity card]] installed.

==Added signals==

The added lines for communication between a parity controller and parity-capable memory boards were Parity Detect (used to let memory boards know that a parity controller is present); Internal SSYN (used by memory boards to let the parity controller know that their data is ready); and Parity P0 and Parity P1 (parity data).

The additional voltages were + and -15V, -5V, and +20V. Note that in some machines (the [[PDP-11/44]] and [[PDP-11/24]]) the +15V/-15 pins actually contain +12V/-12V, for use by the [[MS11-M MOS memory]] card, which needs those voltages. +15V/-15V are available in the SPC portion of some such slots.

===Pinout===

The pins which were added (changed) to create MUD are:

* AB2 - Test Point
* AN1 - Parity P1
* AP1 - Parity P0
* AR1 - -15/12 Battery
* AS1 - -15/12 Battery
* AU1 - +20V (core)
* AV1 - +20V (core)
* AV2 - +20V (core)
* BA1 - Reserved
* BB1 - Reserved
* BB2 - Test Point
* BD1 - +5V Battery
* BE1 - Internal SSYN
* BE2 - Parity Detect
* BV2 - -5V (core)

==Removed signals==

Since grants could not be supported in the number of pins available in a dual connector, all grant pins were removed, along with some ground pins.

===Pins===

The pins which changed function from normal UNIBUS to MUD are listed below.

* AB2 - Ground
* AN1 - Ground
* AP1 - Ground
* AR1 - Ground
* AS1 - Ground
* AU1 - NPG
* AV1 - BG7
* AV2 - Ground
* BA1 - BG6
* BB1 - BG5
* BB2 - Ground
* BD1 - Ground
* BE1 - Ground
* BE2 - BG4
* BV2 - Ground

==See also==

* [[Extended UNIBUS]]
* [[:Category:UNIBUS_Backplanes|UNIBUS Backplanes]]
* [[G727_grant_continuity_card|G727 Grant Continuity Card]]
* [[G7273_grant_continuity_card|G7273 Grant Continuity Card]]

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DD11-B_RevE_Engineering_Drawings_Feb74.pdf DD11-B Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-C_RevB_Engineering_Drawings_May77.pdf DD11-C Engineering Drawings ] - DD11-CK and DD11-CF wiring harness requirements can be found on pages 5 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-D_RevC_Engineering_Drawings_Feb77.pdf DD11-D Engineering Drawings ] - DD11-DK and DD11-DF wiring harness requirements can be found on pages 6 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-P_RevD_Engineering_Drawings_Feb77.pdf DD11-P Engineering Drawings ]

{{PDP-11}}

[[Category: UNIBUS]]

Modified UNIBUS Device

2023-03-27T08:42:28Z

Ashlin4010: /* See also */

'''Modified UNIBUS Device''' or '''MUD''' was [[DEC]]'s name for an I/O board slot in the [[backplane]]s of [[UNIBUS]] [[PDP-11]]s. It was a [[DEC card form factor|hex]] slot, and could hold any kind of device.

It differed from the older [[Small Peripheral Controller|SPC]] slot in that it was a hex-height slot, and used the pins (in the [[DEC edge connector contact identification|A-B connectors]]) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences.

The most important was that since the standard UNIBUS dual connector only contains one pin per [[bus grant line]] (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the [[QBUS]]), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors therefore do not contain grants; those pins were recycled for other functions.

Some re-assigned pins contain a number of lines for communication between a [[parity]] controller, and parity-capable [[main memory]] boards plugged into that backplane; others carry additional [[voltage]]s (primarily for [[core memory]]).

Technically, a MUD slot only describes the A-B [[DEC edge connector contact identification|connectors]]; most backplanes also provided SPC functionality in the C-F connectors (needed for signals for [[interrupt]]s or [[Direct Memory Access|DMA]], for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called a 'MUD/SPC' slot.

The [[DD11-C backplane|DD11-C]] (4-slot) and [[DD11-D backplane|DD11-D]] (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B, and SPC in C-F.

==Grants==

MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B.

A board plugged into a MUD/SPC slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through.

The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot.

Un-occupied slots needed to have a [[G7273 grant continuity card|grant continuity card]] installed.

==Added signals==

The added lines for communication between a parity controller and parity-capable memory boards were Parity Detect (used to let memory boards know that a parity controller is present); Internal SSYN (used by memory boards to let the parity controller know that their data is ready); and Parity P0 and Parity P1 (parity data).

The additional voltages were + and -15V, -5V, and +20V. Note that in some machines (the [[PDP-11/44]] and [[PDP-11/24]]) the +15V/-15 pins actually contain +12V/-12V, for use by the [[MS11-M MOS memory]] card, which needs those voltages. +15V/-15V are available in the SPC portion of some such slots.

===Pinout===

The pins which were added (changed) to create MUD are:

* AB2 - Test Point
* AN1 - Parity P1
* AP1 - Parity P0
* AR1 - -15/12 Battery
* AS1 - -15/12 Battery
* AU1 - +20V (core)
* AV1 - +20V (core)
* AV2 - +20V (core)
* BA1 - Reserved
* BB1 - Reserved
* BB2 - Test Point
* BD1 - +5V Battery
* BE1 - Internal SSYN
* BE2 - Parity Detect
* BV2 - -5V (core)

==Removed signals==

Since grants could not be supported in the number of pins available in a dual connector, all grant pins were removed, along with some ground pins.

===Pins===

The pins which changed function from normal UNIBUS to MUD are listed below.

* AB2 - Ground
* AN1 - Ground
* AP1 - Ground
* AR1 - Ground
* AS1 - Ground
* AU1 - NPG
* AV1 - BG7
* AV2 - Ground
* BA1 - BG6
* BB1 - BG5
* BB2 - Ground
* BD1 - Ground
* BE1 - Ground
* BE2 - BG4
* BV2 - Ground

==See also==

* [[Extended UNIBUS]]
* [[:Category:UNIBUS_Backplanes|UNIBUS Backplanes]]
* [[G727_grant_continuity_card|G727 Grant Continuity Card]]
* [[G7273_grant_continuity_card|G7273 Grant Continuity Card]]

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DB11-A_RevS_Engineering_Drawings_Jan76.pdf DD11-A Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-B_RevE_Engineering_Drawings_Feb74.pdf DD11-B Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-C_RevB_Engineering_Drawings_May77.pdf DD11-C Engineering Drawings ] - DD11-CK and DD11-CF wiring harness requirements can be found on pages 5 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-D_RevC_Engineering_Drawings_Feb77.pdf DD11-D Engineering Drawings ] - DD11-DK and DD11-DF wiring harness requirements can be found on pages 6 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-P_RevD_Engineering_Drawings_Feb77.pdf DD11-P Engineering Drawings ]

{{PDP-11}}

[[Category: UNIBUS]]

Modified UNIBUS Device

2023-03-27T08:39:03Z

Ashlin4010: /* See also */

'''Modified UNIBUS Device''' or '''MUD''' was [[DEC]]'s name for an I/O board slot in the [[backplane]]s of [[UNIBUS]] [[PDP-11]]s. It was a [[DEC card form factor|hex]] slot, and could hold any kind of device.

It differed from the older [[Small Peripheral Controller|SPC]] slot in that it was a hex-height slot, and used the pins (in the [[DEC edge connector contact identification|A-B connectors]]) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences.

The most important was that since the standard UNIBUS dual connector only contains one pin per [[bus grant line]] (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the [[QBUS]]), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors therefore do not contain grants; those pins were recycled for other functions.

Some re-assigned pins contain a number of lines for communication between a [[parity]] controller, and parity-capable [[main memory]] boards plugged into that backplane; others carry additional [[voltage]]s (primarily for [[core memory]]).

Technically, a MUD slot only describes the A-B [[DEC edge connector contact identification|connectors]]; most backplanes also provided SPC functionality in the C-F connectors (needed for signals for [[interrupt]]s or [[Direct Memory Access|DMA]], for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called a 'MUD/SPC' slot.

The [[DD11-C backplane|DD11-C]] (4-slot) and [[DD11-D backplane|DD11-D]] (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B, and SPC in C-F.

==Grants==

MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B.

A board plugged into a MUD/SPC slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through.

The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot.

Un-occupied slots needed to have a [[G7273 grant continuity card|grant continuity card]] installed.

==Added signals==

The added lines for communication between a parity controller and parity-capable memory boards were Parity Detect (used to let memory boards know that a parity controller is present); Internal SSYN (used by memory boards to let the parity controller know that their data is ready); and Parity P0 and Parity P1 (parity data).

The additional voltages were + and -15V, -5V, and +20V. Note that in some machines (the [[PDP-11/44]] and [[PDP-11/24]]) the +15V/-15 pins actually contain +12V/-12V, for use by the [[MS11-M MOS memory]] card, which needs those voltages. +15V/-15V are available in the SPC portion of some such slots.

===Pinout===

The pins which were added (changed) to create MUD are:

* AB2 - Test Point
* AN1 - Parity P1
* AP1 - Parity P0
* AR1 - -15/12 Battery
* AS1 - -15/12 Battery
* AU1 - +20V (core)
* AV1 - +20V (core)
* AV2 - +20V (core)
* BA1 - Reserved
* BB1 - Reserved
* BB2 - Test Point
* BD1 - +5V Battery
* BE1 - Internal SSYN
* BE2 - Parity Detect
* BV2 - -5V (core)

==Removed signals==

Since grants could not be supported in the number of pins available in a dual connector, all grant pins were removed, along with some ground pins.

===Pins===

The pins which changed function from normal UNIBUS to MUD are listed below.

* AB2 - Ground
* AN1 - Ground
* AP1 - Ground
* AR1 - Ground
* AS1 - Ground
* AU1 - NPG
* AV1 - BG7
* AV2 - Ground
* BA1 - BG6
* BB1 - BG5
* BB2 - Ground
* BD1 - Ground
* BE1 - Ground
* BE2 - BG4
* BV2 - Ground

==See also==

* [[Extended UNIBUS]]
* [[:Category:UNIBUS_Backplanes|UNIBUS Backplanes]]

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DB11-A_RevS_Engineering_Drawings_Jan76.pdf DD11-A Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-B_RevE_Engineering_Drawings_Feb74.pdf DD11-B Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-C_RevB_Engineering_Drawings_May77.pdf DD11-C Engineering Drawings ] - DD11-CK and DD11-CF wiring harness requirements can be found on pages 5 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-D_RevC_Engineering_Drawings_Feb77.pdf DD11-D Engineering Drawings ] - DD11-DK and DD11-DF wiring harness requirements can be found on pages 6 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-P_RevD_Engineering_Drawings_Feb77.pdf DD11-P Engineering Drawings ]

{{PDP-11}}

[[Category: UNIBUS]]

DD11-D backplane

2023-03-27T08:33:57Z

Ashlin4010:

The '''DD11-D backplane''' is a 9-slot [[Modified UNIBUS Device|MUD]] [[backplane]] [[system unit]]. It was normally installed in a [[BA11 mounting boxes|BA11 mounting box]].

There are two versions, the '''DD11-DF''' and '''DD11-CK''', intended for use in the [[BA11-F Mounting Box]] and [[BA11-K mounting box]], respectively; they differ basically only in the length of the [[power harness]], although the two provide +5VB (battery backup) on different [[pin]]s of the [[DEC power distribution connectors]]. A DD11-DP existed as well, for use in the [[BA11-P card cage]].

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DD11-D_RevC_Engineering_Drawings_Feb77.pdf DD11-D Engineering Drawings ] - DD11-DK and DD11-DF wiring harness requirements can be found on pages 6 & 7

[[Category: UNIBUS Backplanes]]

DD11-C backplane

2023-03-27T08:32:52Z

Ashlin4010:

The '''DD11-C backplane''' is a 4-slot [[Modified UNIBUS Device|MUD]] [[backplane]] [[system unit]]. It was normally installed in a [[BA11 mounting boxes|BA11 mounting box]].

There are two versions, the '''DD11-CF''' and '''DD11-CK''', intended for use in the [[BA11-F Mounting Box]] and [[BA11-K mounting box]], respectively; they differ basically only in the length of the [[power harness]], although the two provide +5VB (battery backup) on different [[pin]]s of the [[DEC power distribution connectors]]. A DD11-CP existed as well, for use in the [[BA11-P card cage]].

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DD11-C_RevB_Engineering_Drawings_May77.pdf DD11-C Engineering Drawings ] - DD11-CK and DD11-CF wiring harness requirements can be found on pages 5 & 7

[[Category: UNIBUS Backplanes]]

DD11-C backplane

2023-03-27T08:32:40Z

Ashlin4010:

Modified UNIBUS Device

2023-03-27T08:25:46Z

Ashlin4010:

'''Modified UNIBUS Device''' or '''MUD''' was [[DEC]]'s name for an I/O board slot in the [[backplane]]s of [[UNIBUS]] [[PDP-11]]s. It was a [[DEC card form factor|hex]] slot, and could hold any kind of device.

It differed from the older [[Small Peripheral Controller|SPC]] slot in that it was a hex-height slot, and used the pins (in the [[DEC edge connector contact identification|A-B connectors]]) to carry UNIBUS signals - mostly pin-compatible with the original dual UNIBUS slot, but there were a few important differences.

The most important was that since the standard UNIBUS dual connector only contains one pin per [[bus grant line]] (suitable only for an 'in' or 'out' UNIBUS connector), not separate 'grant in' and 'grant out' pins (as on the [[QBUS]]), a full-function UNIBUS slot is not possible with only two connectors. The MUD connectors therefore do not contain grants; those pins were recycled for other functions.

Some re-assigned pins contain a number of lines for communication between a [[parity]] controller, and parity-capable [[main memory]] boards plugged into that backplane; others carry additional [[voltage]]s (primarily for [[core memory]]).

Technically, a MUD slot only describes the A-B [[DEC edge connector contact identification|connectors]]; most backplanes also provided SPC functionality in the C-F connectors (needed for signals for [[interrupt]]s or [[Direct Memory Access|DMA]], for devices which did those), with most UNIBUS signals present in both; the combination is sometimes called a 'MUD/SPC' slot.

The [[DD11-C backplane|DD11-C]] (4-slot) and [[DD11-D backplane|DD11-D]] (9-slot) and later backplanes generally provided MUD slots, not the earlier SPC slots; however, generally the slots in these later backplanes are MUD/SPC - other than the entrance and exit slots, which have normal two-slot UNIBUS in/out in A-B, and SPC in C-F.

==Grants==

MUD/SPC slots were wired to bring all 5 UNIBUS grant lines through the device; this was performed in rows C (for NPG) and D (for BGx), not the 'pseudo-UNIBUS' rows A/B.

A board plugged into a MUD/SPC slot generally had a header which routed the grant (and matching request) line for the desired priority level to the on-board interrupt circuity, and passed the other grant lines through.

The DMA (NPG) grant line generally had a jumper on the backplane, which had to be removed if a DMA device was plugged into the slot.

Un-occupied slots needed to have a [[G7273 grant continuity card|grant continuity card]] installed.

==Added signals==

The added lines for communication between a parity controller and parity-capable memory boards were Parity Detect (used to let memory boards know that a parity controller is present); Internal SSYN (used by memory boards to let the parity controller know that their data is ready); and Parity P0 and Parity P1 (parity data).

The additional voltages were + and -15V, -5V, and +20V. Note that in some machines (the [[PDP-11/44]] and [[PDP-11/24]]) the +15V/-15 pins actually contain +12V/-12V, for use by the [[MS11-M MOS memory]] card, which needs those voltages. +15V/-15V are available in the SPC portion of some such slots.

===Pinout===

The pins which were added (changed) to create MUD are:

* AB2 - Test Point
* AN1 - Parity P1
* AP1 - Parity P0
* AR1 - -15/12 Battery
* AS1 - -15/12 Battery
* AU1 - +20V (core)
* AV1 - +20V (core)
* AV2 - +20V (core)
* BA1 - Reserved
* BB1 - Reserved
* BB2 - Test Point
* BD1 - +5V Battery
* BE1 - Internal SSYN
* BE2 - Parity Detect
* BV2 - -5V (core)

==Removed signals==

Since grants could not be supported in the number of pins available in a dual connector, all grant pins were removed, along with some ground pins.

===Pins===

The pins which changed function from normal UNIBUS to MUD are listed below.

* AB2 - Ground
* AN1 - Ground
* AP1 - Ground
* AR1 - Ground
* AS1 - Ground
* AU1 - NPG
* AV1 - BG7
* AV2 - Ground
* BA1 - BG6
* BB1 - BG5
* BB2 - Ground
* BD1 - Ground
* BE1 - Ground
* BE2 - BG4
* BV2 - Ground

==See also==

* [[Extended UNIBUS]]

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DB11-A_RevS_Engineering_Drawings_Jan76.pdf DD11-A Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-B_RevE_Engineering_Drawings_Feb74.pdf DD11-B Engineering Drawings ]
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-C_RevB_Engineering_Drawings_May77.pdf DD11-C Engineering Drawings ] - DD11-CK and DD11-CF wiring harness requirements can be found on pages 5 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-D_RevC_Engineering_Drawings_Feb77.pdf DD11-D Engineering Drawings ] - DD11-DK and DD11-DF wiring harness requirements can be found on pages 6 & 7
* [http://www.bitsavers.org/pdf/dec/unibus/DD11-P_RevD_Engineering_Drawings_Feb77.pdf DD11-P Engineering Drawings ]

{{PDP-11}}

[[Category: UNIBUS]]

H742 Power Supply

2023-03-25T21:05:07Z

Ashlin4010: /* External links */

The '''H742 Power Supply''', and later revision '''H7420''', is a modular [[power supply]] system from [[Digital Equipment Corporation|DEC]], used with the [[BA11-F Mounting Box]]. Among other uses, that mounting box is used in [[PDP-11/40]], [[PDP-11/45]] and [[PDP-11/70]] systems to hold the [[Central Processing Unit|CPU]].

The H742/H7420 runs off standard wall [[Alternating current|AC]]; it can be [[jumper]]ed to use either 110V or 220V supply.

The main [[transformer]] in the H742/H7420 provides 20-30V AC to several [[DEC standard modular regulators]] (up to five, in spaces numbered 'A' through 'E') mounted in the H742/H7420, which provide other voltages such as +5V to the [[backplane]]s in the mounting box.

Generally the [[power harness]] supports only limited options as to which regulator can be in which spaces; e.g. the later -11/40 harness mandates that A, B and C hold [[H744 +5V Regulator]]s, D holds an [[H745 -15V Regulator]], and E may hold either an H745 or [[H754 +20V, -5V Regulator]].

A [[DEC Power Line Monitor|5409730 board]] in the H742, replaced by an 5411086 board in the H7420, supplies a modest amount of +15V [[Direct current|DC]] power to various backplanes mounted in the BA11-F, along with a [[line time clock]] signal, and AC and DC 'power OK' signals.

The harness from the H742/H7420 (the same for both, it appears) used [[DEC power distribution connectors]] to provide power to the backplanes; it normally used the [[DEC standard power wire colour coding]].

The H742/H7420 did not support the [[Remote Switching Control Bus]]; the H742/H7420 was generally plugged into an [[861 Power Controller]], which did have the remote control capability.

A later version of the basic H742 is the H742A; the difference is not yet known.

For the H7420, in addition to the board above, the differences seem to be mainly mechanical: a larger cooling fan; a change in the orientation of the +15V supply board from horizontal to vertical (perhaps to make room for the fant); and the sheet metal enclosure holding the fan, board and transformer is a single unit, not two bolted together, as in the H742.

==See also==

* [[H765 Power System]]

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1160/EK-11060-SV-01_1160cab_Feb78.pdf PDP-11/60 cabinet and power supply manual] - the H7420 is covered in Chapter 3 (pg. 32 of the scanned version)
* [https://bitsavers.org/pdf/dec/pdp11/PDP-11_Mainframe_Troubleshooting_Guide_Dec76.pdf PDP-11 Mainframe Troubleshooting Guide] - the H742 connector pinout can be found on page 114

[[Category: DEC Electrical]]

H742 Power Supply

2023-03-25T21:04:34Z

Ashlin4010: /* External links */

The '''H742 Power Supply''', and later revision '''H7420''', is a modular [[power supply]] system from [[Digital Equipment Corporation|DEC]], used with the [[BA11-F Mounting Box]]. Among other uses, that mounting box is used in [[PDP-11/40]], [[PDP-11/45]] and [[PDP-11/70]] systems to hold the [[Central Processing Unit|CPU]].

The H742/H7420 runs off standard wall [[Alternating current|AC]]; it can be [[jumper]]ed to use either 110V or 220V supply.

The main [[transformer]] in the H742/H7420 provides 20-30V AC to several [[DEC standard modular regulators]] (up to five, in spaces numbered 'A' through 'E') mounted in the H742/H7420, which provide other voltages such as +5V to the [[backplane]]s in the mounting box.

Generally the [[power harness]] supports only limited options as to which regulator can be in which spaces; e.g. the later -11/40 harness mandates that A, B and C hold [[H744 +5V Regulator]]s, D holds an [[H745 -15V Regulator]], and E may hold either an H745 or [[H754 +20V, -5V Regulator]].

A [[DEC Power Line Monitor|5409730 board]] in the H742, replaced by an 5411086 board in the H7420, supplies a modest amount of +15V [[Direct current|DC]] power to various backplanes mounted in the BA11-F, along with a [[line time clock]] signal, and AC and DC 'power OK' signals.

The harness from the H742/H7420 (the same for both, it appears) used [[DEC power distribution connectors]] to provide power to the backplanes; it normally used the [[DEC standard power wire colour coding]].

The H742/H7420 did not support the [[Remote Switching Control Bus]]; the H742/H7420 was generally plugged into an [[861 Power Controller]], which did have the remote control capability.

A later version of the basic H742 is the H742A; the difference is not yet known.

For the H7420, in addition to the board above, the differences seem to be mainly mechanical: a larger cooling fan; a change in the orientation of the +15V supply board from horizontal to vertical (perhaps to make room for the fant); and the sheet metal enclosure holding the fan, board and transformer is a single unit, not two bolted together, as in the H742.

==See also==

* [[H765 Power System]]

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1160/EK-11060-SV-01_1160cab_Feb78.pdf PDP-11/60 cabinet and power supply manual] - the H7420 is covered in Chapter 3 (pg. 32 of the scanned version)
* [https://bitsavers.org/pdf/dec/pdp11/PDP-11_Mainframe_Troubleshooting_Guide_Dec76.pdf PDP-11 Mainframe TroubleshootingGuide] - the H742 connector pinout can be found on page 114

[[Category: DEC Electrical]]