Computer History Wiki - User contributions [en]

KE11-F Floating Instruction Set

2025-12-25T07:20:26Z

Jnc: Not a high-performance implementation

[[Image:M7239KE11-FFIS.jpg|thumb|right|300px|M7239 card]]

The '''KE11-F Floating Instruction Set‏‎''' is the optional [[floating point]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]].

It is not a high-performance floating point implementation, since that would require a [[barrel shifter]] (i.e. additional [[hardware]], increasing the cost), to perform multi-bit shifts (potentially needed for additions and subtractions, to align the mantissas) in a single [[cycle]]; instead, it uses [[microcode]] [[loop]]s to perform such shifts.

Physically, it consists of a single [[DEC card form factor|quad]] board, the M7239, which plugs into a pre-wired slot in the [[Central Processing Unit|CPU]] [[backplane]].

It requires the installation of the [[KE11-E Extended Instruction Set]], which allows the microcode of the basic CPU to be extended.

The KE11-F includes its own microcode [[read-only memory|ROM]], which provides an additional 8 bits width of microcode (to control the [[data path]]s and [[register]]s on the M7239), but it also uses microcode stored on the KE11-E, to control registers and data paths elsewhere.

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1140/KE11_RefMan.pdf KE11-E and KE11-F instruction set options user's manual] (EK-KE11E-OP-001) 
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KE11E-TM-002%20KE11-E%20and%20KE11-F%20Instruction%20Set%20Options%20Manual.pdf KE11-E and KE11-F instruction set options manual] (EK-KE11E-TM-002)
* [https://manx-docs.org/collections/hcps/KE11-FIS.pdf KE11-F floating instruction set (FIS) option engineering drawings]

[[Category: PDP-11 UNIBUS Processors]]

Microcode

2025-12-25T07:15:40Z

Jnc: Allows loops; not the only use; typos

'''Microcode''' (in the form of a '''microprogram''') refers to a technique for implementing the functionality needed to control the internal operation of a [[Central Processing Unit|CPU]].

On each '''microcycle''' (analogous, internally, to the cycles of the main CPU), a '''microinstruction''' is [[fetch]]ed, and used to control the operation of the CPU's internal [[hardware]] elements during that microcycle: routing data out of [[register]]s (including internal registers not visible to the programmer) and/or [[main memory]], through the [[Arithmetic logic unit|ALU]] (while selecting which [[operator|operation]] is to be performed by it), and then storing the results as appropriate. They are thus analogous to the [[instruction]]s of the main CPU, but at a much lower level.

==Background==

The earliest generation of CPU's used collections of [[gate]]s and [[flip-flop]]s to implement the functionality of controlling the operation of the internal elements. As the [[instruction set]]s and overall [[architecture]] of early computers became more complex, the design of those combinatorial [[logic]] networks became more challenging.

In 1947, the [[Whirlwind]] computer introduced the concept of a '''control store'''; a wide [[read-only memory]] whose outputs directly controlled internal elements of the CPU. (E.g. one bit in a control word might control the latching of an internal register.)

The CPU cycled through the [[word]]s in the control store, to execute instructions. Viewing (and implementing) the internal operation of the CPU in this way made the design task easier.

==Enhancements==

In 1951, [[Maurice Wilkes]] suggested more widespread use of that technique (to get rid of the design burden, and chance of errors, in using un-structured logic aggregations for control); he added [[conditional branch]]ing (which also allowed [[loop]]ing), to make microcode more flexible. Over time, more concepts from [[higher-level language]]s have been added to microcode, such as [[subroutine]]s.

Although early microcode was implemented in read-only memory (the Whirlwind ROM was a [[diode]] matrix), some later computers included high-speed [[Random Access Memory|RAM]] for part of the control store, so that the instruction set could be dynamically extended to, for example, speed up applications.

Recently, microcode has been augmented with [[programmable logic array]]s, which are usually given the job of decoding instructions (something done more efficiently in combinatorial logic).

==Other advantages and uses==

Once microprogramming came into more general use, a number of other advantages, and uses, appeared.

With much of the control for a microprogrammed machine in the microprogram, bugs in the CPU could often be fixed by replacing the microprogram alone, without required hardware changes. (With the coming of the [[microprocessor]], where the microprogram is often in ROM in the chip, this is usually no longer possible.)

Microprogramming also made it possible to offer a range (in performance and cost terms) of machines which all had the same basic architecture, but different internal implementations; microcode could be used to make the different machines all support the same instruction set. This was originally, and most influentially, displayed by the [[IBM System/360]] line of computers. This too is now not common, since it is not usual to offer multiple implementations with differing performance at the same time; however, it can be used to meet an analogous goal, making new generations of microprocessors implement the identical instruction set to previous ones.

The System/360 also showed another use for microcode: System/360 computers included microcode to [[emulate]] earlier IBM computers (such as the [[IBM 1401]]); in an era when most programming was done in [[assembly language]], this allowed people to upgrade to a System/360 machine without discarding their investment in software for the earlier machine.

Once a microcoded CPU had been designed, it was relatively easy to expand the [[instruction set]] to include more complex instructions (something whose only per-unit repeated cost was larger microcode memories). For much of the lifetime of computers, the CPU was faster than the main memory; in such an environment, it made sense to make the instructions of the CPU as powerful (complicated) as possible, so a single instruction fetch (which is, of course, pure overhead in terms of the actual computation) does as much as possible. Such complex instructions are more easily implemented with a microcode approach, than with combinatorial logic.

==Another meaning==

Prior to the modern term/concept, 'microcoding' had another fairly common (but totally unrelated) meaning. Old [[instruction set architecture|ISA's]] often had instructions where a single [[operation code]] could accomplish many different low-level operations (such as clearing various registers, and clearing or setting particular [[condition codes|condition code]] bits). Each possible low-level operation was assigned a particular bit in the instruction word; setting more than one of those bits caused all of the selected low-level operations to be performed. Doing so as often termed 'microcoding'. Some combinations were quite useful (and occasionally were given their own names in the [[assembly language]] for that machine); see [[PDP-8 architecture#Group 1 "operate" instruction operations|here]] for an example).

==Further reading==

* M. V. Wilkes, [https://www.cs.princeton.edu/courses/archive/fall10/cos375/BestWay.pdf The Best Way to Design an Automatic Computing Machine], Report of Manchester University Computer Inaugural Conference, July 1951, pp. 16–18 - Wilkes' original note on microcode
* M. V. Wilkes, J. B. Stringer, [https://ur.booksc.eu/dl/53713365/d07ff7 Microprogramming and the design of the control circuits in an electronic digital computer], Proc. Cambridge Phil. Soc., Part 2, Volume 49, pp. 230-238, April, 1953 - Wilkes' full article on microcode 
* S. G. Tucker, [https://dokumen.tips/documents/microprogram-control-for-system360.html ''Microprogram control for System/360''], IBM Systems Journal, Vol. 6, No.4, 1967 - provides a good general overview of the 'state of the art' at the time

==External links==

* [http://www.edwardbosworth.com/CPSC5155/PH4/Ch04/Ch04_Microprogramming.pdf Control Units: Hardwired & Microprogrammed]
* [https://bitsavers.org/pdf/ibm/370/GF20-0385-0_An_Introduction_to_Microprogramming_Dec71.pdf An Introduction to Microprogramming]

[[Category: Hardware Basics]]

Loop

2025-12-25T07:01:54Z

Jnc: typos

A '''loop''' is a construct in a [[program]] where a section of the program is executed over and over again; usually there is some test which causes the loop to '''terminate''' at some point.

The first [[programming language]] to have loops was [[FORTRAN]], which allowed an '''index variable''' to start at one constant value, and be incremented (or decremented) by another constant until the value had reached a third constant, at which point the loop terminated. While the loop was active, a block of statements was executed in every pass through the loop.

In [[assembly language]], the same concept applies, except that the loop is constructed manually, using a [[conditional branch]] [[instruction]] to decide whether or not to terminate the loop, or go around again.

Modern programming languages offer more flexible looping constructs; e.g. the [[C programming language]] allows arbitrary statements to initialize the loop, and to be performed on each pass through the loop; the termination test is likewise an arbitrary [[expression]].

[[Category: Software Basics]]

Digital Equipment Corporation

2025-12-19T04:59:20Z

Jnc: /* See also */ +DEC Packaged System Nomenclature

'''Digital Equipment Corporation''', or '''DEC''', was a large computer company (at one time, the second-largest in the world after [[International Business Machines|IBM]]). They made [[minicomputer]]s, their signature product (and the one that led to their success), for a period, the most popular kind of computers in the world. Their product range eventually extended from small [[mainframe]]s to [[personal computer]]s.

It was started in 1957, in an old wool mill in Maynard, Massachusetts. The original product line was modules, [[System Module]]s. Once those were established, they started producing computers using them.

They reached the peak of their success in the 1980s, with their [[VAX]] line. However, they were unable to successfully adapt to the rise of personal computers, which turned computers into commodities, and were bought by [[Compaq]] in 1998.

{{semi-stub}}

==See also==

* [[List of Programmed Data Processors]]
* [[Taxonomy of DEC consoles]]
* [[DEC indicator panel]]
* [[DEC Semiconductor Chips]]
* [[DEC part number]]s
* [[DEC engineering drawing numbers]]
* [[DEC acronyms]]
* [[DEC Software-related Order Codes]]
* [[DEC Packaged System Nomenclature]]
* [[Edited Option/Module List]]
* [[:Category:DEC Documentation Errors|DEC Documentation Errors]]
* [[:Category:DEC Hardware|DEC Hardware]]
* [[:Category:DEC Boards|DEC Boards]]
* [[:Category:DEC Architectures|DEC Architectures]]
* [[:Category:DEC Buses|DEC Buses]]
* [[:Category:DEC Systems|DEC Systems]]
* [[:Category:DEC Processors|DEC Processors]]
* [[:Category:DEC Memories|DEC Memories]]
* [[:Category:DEC Peripherals|DEC Peripherals]]
** [[:Category:DEC Storage Controllers|DEC Storage Controllers]]
** [[:Category:DEC Disk Drives|DEC Disk Drives]]
** [[:Category:DEC Tape Drives|DEC Tape Drives]]
* [[:Category:DEC Terminals|DEC Terminals]]
* [[:Category:DEC Software|DEC Software]]
** [[:Category:DEC Operating Systems|DEC Operating Systems]]
* [[DEC Modules by bus]]
* [[Digital Technical Journal]]

==Further reading==

* Glenn Rifkin, George Harrar, ''The Ultimate Entrepreneur: The Story of Ken Olsen and Digital Equipment Corporation'', Contemporary, Chicago, 1988 - The best general history of DEC, but stops at 1987
* Edgar H. Schein, ''DEC is Dead, Long Live DEC'', Berett-Koehler, San Francisco, 2003
* Clayton M. Christensen, ''The Innovator's Dilemma: When New Technologies Cause Great Firms to Fail'', Harvard Business School, Boston, 1997 - Briefly discusses DEC's inability to adapt to the world with personal computers
* Alan R. Earls, ''Digital Equipment Corporation (Images of America)'', Arcadia, Charleston, 2004 - Mostly covers the early years

==External links==

===Books===

* [https://www.computerhistory.org/pdp-1/_media/pdf/dec.digital_1957_to_the_present_(1978).1957-1978.102630349.pdf Digital Equipment Corporation - Nineteen Fifty-Seven To the Present], 1972-78 - Thumbnail entries, but good coverage


* Jamie Parker Pearson, [http://gordonbell.azurewebsites.net/digital/digital%20at%20work%201992.pdf ''Digital at Work: Snapshots from the First Thirty-Five Years''], Digital, Burlington, 1992 - good overview with many direct quotations from DEC engineers

* C. Gordon Bell, J. Craig Mudge, John. E. McNamara, [http://gordonbell.azurewebsites.net/Computer_Engineering/contents.html Computer Engineering: A DEC View of Hardware Systems Design], Digital Press, Bedford, 1978 - a fair amount of technical detail


===Websites===

* [https://gordonbell.azurewebsites.net/Digital/DECMuseum.htm Gordon Bell's CyberMuseum for Digital Equipment Corp]
** [https://gordonbell.azurewebsites.net/Digital/timeline/dechistory.htm Digital 41 Year History CD]
** [https://gordonbell.azurewebsites.net/CGB%20Files/DEC_Is_Dead_Bell_Appendix_Schein_Book.pdf Appendix for Edgar H. Schein “DEC is Dead, Long Live DEC”] - An interesting take on where/how DEC went wrong
* [https://www.abortretry.fail/p/work-at-the-mill Work at the Mill] - "the Story of Digital Equipment Corporation"
* [https://web.archive.org/web/20210104122645/https://digital.com/digital-equipment-corporation/ The Tragic Tale Of DEC, The Computing Giant That Died Too Soon] (archived) 
* [http://www.decconnection.org/digitalstechnology.htm Digital's Technology Heritage]
* [https://www.ultimate.com/phil/pdp10/dec.disks DEC disk history]
* [http://www.vaxarchive.org/hardware/cables.html Cables Reference Guide]
* [http://www.avanthar.com/healyzh/decemulation/decemu.html The DEC Emulation Website]

{{Nav DEC}}

[[Category: Manufacturers]]
[[Category: Computer Manufacturers]]
[[Category: Digital Equipment Corporation]]
[[Category: PDP-10 Users]]

Help:Disambiguation pages

2025-12-19T04:55:54Z

Jnc: +ARC

Here is a list of otherwise-unlinked-to disambiguation pages, so they don't show up in [[Special:LonelyPages|Orphaned pages]].

* [[ARC]]
* [[Batch]]
* [[Card]]
* [[Condition]]
* [[DM11]]
* [[ECL]]
* [[EMI]]
* [[FP]]
* [[Frame]]
* [[Hack]]
* [[Handler]]
* [[IAS]]
* [[Index]]
* [[ISP]]
* [[ITS]]
* [[KD11]]
* [[KE11]]
* [[KEF11]]
* [[KK11]]
* [[Link]]
* [[MDM]]
* [[MM11]]
* [[MOS]]
* [[MRV11]]
* [[MUD]]
* [[MX15]]
* [[MXV11]]
* [[Monitor]]
* [[PC]]
* [[PS]]
* [[Refresh]]
* [[Return]]
* [[SAIL]]
* [[Socket]]
* [[Suspended]]
* [[TOS]]
* [[Tape]]
* [[TU79]]
* [[Vector]]

[[Category: Help]]
[[Category: Disambiguation pages]]

Remote Switching Control Bus

2025-12-17T11:13:50Z

Jnc: Missing article

The '''Remote Switching Control Bus''' (also known as the '''DEC Power Bus''') was a power control [[bus]] used across many [[Digital Equipment Corporation|DEC]] product lines to allow remote control of power. It contained three lines: a [[ground return]], a 'power on', and an 'emergency shutdown'. (Not all devices used the last, e.g. the illustrated example below.)

[[Image:PwrControlBusConn.jpg|150px|thumb|right|Cable connector]]

The bus was connected using 3-pin AMP MATE-N-LOK connectors: all units with a remote control input used a male shell (with female sockets); all the cables (normally 3-conductor, #22 gauge, but 2-conductor is seen, as on the right) had female shells (with male pins), on both ends.

The male shell (housing) was a 1-480304-0, and took 61173-1 sockets (i.e. female pins); the female shell was a 1-480305-0, and took 61174-1 male pins. (There are a large number of different pin options: 30-22, 24-18, and 20-14 gauge; tin and gold plated; and brass and phosphor-bronze material. The part numbers given are for tinned brass, 30-22 gauge.)

AMP has been bought by TE Connectivity, but these MATE-N-LOK connectors are still in production, and available from the usual suppliers.

[[Category: DEC Electrical]]

Tandberg Data

2025-12-05T13:17:12Z

Jnc: Add some links

'''Tandberg Data''' is now more known for producing [[mass storage]] products, but in the past they also manufactured computer [[terminal]]s, e.g. the [[TDV 2115]], [[Tandberg TDV 2200/9|TDV 2200]], and [[Tandberg TDV 2215|TDV 2215]] terminals, including at least one "intelligent" terminal - i.e. a [[microcomputer]].

The TDV 2115, TDV 2200, and [[Tandberg TDV 1200|TDV 1200]] terminals were also delivered as customized [[ND Notis]] terminals for [[Norsk Data]].
The [[TDV 2114]] was an "intelligent" terminal running Tandberg OS on an [[Intel 8080]] [[microprocessor]]. [[CP/M]] would later also be available requiring a small hardware modification, whereas the later [[Intel 8085|8085]]-based TDV-2324 computer could run both TOS-II and CP/M without any modifications needed at all.

[[Category: Computer Manufacturers]]

Low-Level Formatting DEC MFM Disks

2025-11-13T23:39:21Z

Jnc: Avoid redir

There are several situations in which you may want (or even need) to format a [[Modified Frequency Modulation|MFM]] disk from [[Digital Equipment Corporation|DEC]]:

* Testing for bad blocks
* Reformatting from a PC-like low-level format
* Reformatting for use on another type of [[RQDX Series of MFM Disk & Floppy QBUS Controllers|RQDX]] MFM controller
* Reformatting for spoofing another disk model
* ...

Another scenario might be that you want to prepare a foreign MFM disk model as a replacement for a DEC MFM disk.

You can even reformat [[Run-length limited coding|RLL]]-type disks for usage on MFM controllers at the price of losing some disk space.

== Preparations ==

All you need is:

* A [[MicroVAX 2000]] / [[VAXstation 2000]]

or:

* An [[RQDX1/RQDX2 MFM Disk & Floppy QBUS Controllers|RQDX1, RQDX2]], or [[RQDX3 MFM Disk & Floppy QBUS Controller|RQDX3]] [[QBUS]] MFM controller suitable for your MFM disk, and
* An [[RX50]] Dual Floppy Drive, and
* A [[MicroPDP-11]], or
* A [[MicroVAX I]] / [[VAXstation I]], or
* A [[MicroVAX II]] / [[VAXstation II]], or
* A later [[QBUS]] based [[MicroVAX]] / [[VAXstation]]

== Using a VAXstation 2000 or MicroVAX 2000 and its ROM resident Diagnostics ==

=== Formatting a Known Hard Disk ===

Example of formatting an [[RD32]] hard disk.

Enter the following commands at your MicroVAX 2000 / VAXstation 2000 console prompt:

>>> '''TEST 70'''

VSfmt_QUE_unitno (0-2) ? '''0''' [enter the drive number of the hard disk]

VSfmt_STS_Siz........... '''RD32''' [formatter recognized DUA0 as a RD32]

VSfmt_QUE_SerNbr (0-999999999) '''29042836''' [enter the serial number for the drive]
[or enter a unique number for each unit]

VSfmt_QUE_RUsure (DUAx 1/0) ? '''1''' [where x equals the unit number]
[enter 1 for YES, 0 for NO]

VSfmt_STS_RdMbb.............OK [manufacturer's bad block located]

VSfmt_STS_FMTing............OK [disk formatted OK]

VSfmt_STS_ChkPss............OK [check pass completed OK]

VSfmt_STS_BBRvec := x [x = number of bad blocks revectored]

VSfmt_RES_Succ [disk is successfully formatted]

>>>

=== Formatting an Unknown Hard Disk ===

>>> '''TEST 70'''

VSfmt_QUE_unitno (0-2) ? '''0''' [Enter drive number]

VSfmt_STS_Siz .......... ???? [Formatter does not recognize drive type]

VSfmt_STS_EntUIB [Formatter wants drive details]

[this example is from the VS2000 technical manual]

xbnsiz :=54 [enter the number of transfer blocks]

dbnsiz :=48 [enter the number of diagnostic blocks]

lbnsiz :=83236 [enter the number of logical blocks]

rbnsiz :=200 [enter the number of replacement blocks]

surpun :=6 [enter the number of surfaces per unit]

cylpun :=820 [enter the number of cylinders per unit]

wrtprc :=820 [enter the write precompensation cylinder]

rctsiz :=4 [enter the size of the revectoring control table (RCT)]

rctnbr :=8 [enter the number of copies of the RCT]

secitl :=1 [enter the sector interleave]

stsskw :=2 [enter the surface to surface skew]

ctcskw :=9 [enter the cylinder to cylinder skew]

mediai :=627327008 [enter the MSCP media ID]

* Note this number is not dependent on disk geometry, but is the magic number for VMS to report on the type of disk. *
At this point, the formatter exits the query mode.

The next output to the screen is:
VSfmt_QUE_SerNbr (0-999999999) [enter the serial number for the drive]
[or enter a unique number for each unit]

VSfmt_QUE_RUsure (DUAx 1/0) ? [where x equals the unit number]
[enter 1 for YES, 0 for NO]

The formatter is now running, and the output should look like:

VSfmt_STS_RdMbb.............OK [manufacturer's bad block located]

VSfmt_STS_FMTing............OK [disk formatted OK]

VSfmt_STS_ChkPss............OK [check pass completed OK]

VSfmt_STS_BBRvec := x [x = number of bad blocks revectored]

VSfmt_RES_Succ [disk is successfully formatted]

>>>

== Using a MicroVAX I and the VAX Diagnostic Supervisor ==

Get the [http://xxx.com MicroVAX I diagnostic floppies set images]:

[[Writing Floppy-Fixed Disk and Tape Images to Real Media using VMS | Write <code>BL-T857D-DE MICROVAX I Diagnostics 2(3).RX5</code> onto an RX50 floppy or workalike.]]

Put floppy BL-T857D-DE into RX50 drive 0.

Boot VAX Diagnostic Supervisor (VDS):
B/10 DUA0

Load EHXRQ diagnostic
ATT RQDX1 HUB DUA 772150
ATT RX50 DUA DUA0
SET LOAD DUA0:[SYS0.SYSMAINT]
LOAD EHXRQ

Prepare & start formatting e.g. an RD52:
ATTACH RD52 DUA DUA1
SELECT DUA1
START /SECTION=FORMATTER

== Using a MicroVAX II or later MicroVAX and the MicroVAX Diagnostic Monitor ==

== Using a MicroPDP and the XXDP Diagnostics ==

ZRQBxx RQDX1/2

ZRQCxx RQDX3

PDP11_DiagnosticHandbook_XXDP_1988 mit Text.pdf

DR> STA

CHANGE HW (L) ? Y

# UNITS (D) ? 1

UNIT 0
Enter controller IP address (O) 172150 ?
What unit do you want to format [0-255] (D) 0 ? 1
Would you like to revector a single LBN only [Y/N] (L) N ?
Do you want to use the "AUTOFORMAT" Mode [Y/N] (L) Y ? N

Would you like to use the RCT - Revector known bad blocks [Y/N] (L) N ?

**** WARNING ****

[text about don't proceed if you're just kidding deleted]

Do you wish to continue [Y/N] (L) Y ?

MSCP Controller Model: 19
Microcode Version: 4

Do you want to use manufacturing bad block information [Y/N] (A) N ?

Downline load UIT [Y/N] (A) Y ?

UIT Drive Name
-------------------------------------------------------
0 RD51
1 RD52 part # 30-21721-02 (1 light on front panel)
2 RD52 part # 30-23227-02 (2 lights on front panel)
3 RD53
4 RD31
5 RD54
6 RD32

Enter Unit Identifier Table (UIT) [0-7] (D) ? 5

Continue if bad block information is inaccessible [Y/N] (A) N ? Y

Please type in the serial number [8-10 digits] (A) ? 05388342

Formatting of Drive 1 Begin.

[a long sequences of messages is displayed here, 1 per minute, showing the
progress of formatting and what step is in progress on which block number.]

Format Completed.

00001 Rev LBNs
00000 Bad RBNs
00000 Bad DBNs
00000 Bad XBNs
00001 retired

FCT was not used.

Drive 1 has been formatted successfully.

ZRQC EOP 1
0 TOTAL ERRS

DR>

[[Category: DEC Disk Drives]]
[[Category: MSCP Disk Drives]]
[[Category: DEC Non-removable-media Disks]]
[[Category: ST506 Disk Drives]]

Periodic Payment License

2025-11-13T23:08:07Z

Jnc: Avoid redir

The '''Periodic Payment License''' (PPL) from [[Digital Equipment Corporation|DEC]] was a kind of software leasing system, which was introduced about 1987.

Instead of buying a relatively expensive traditional '''Paid-Up''' license (with unlimited validity), one could start with a one-time '''Initial License Charge''' and monthly '''Periodic Payment License''' (PPL) fees.

Which of the two options leads to lower overall costs depends on the period of use. Let's have a look at an example:

Q2001-1P [[VAX 8550]] [[VMS]] INITIAL LICENSE FEE 1 x 3,150 = 3,150
Q2001-JP VAX 8550 VMS MONTHLY PERIODIC PAYMENT LICENSE FEE 41 x 1,134 = 46,494
Total = 49,644

Q2001-UZ VMS PAID-UP LICENSE 49,875

The break-even point is reached after 41 months (three years and five months) of use, from then on the "perpetual" license is cheaper, with depreciation and interest not taken into account.

[[Category: Digital Equipment Corporation]]

KDJ11-B CPU

2025-11-13T00:24:11Z

Jnc: +Category: DEC Documentation Errors

[[Image:m8190.jpg|200px|thumb|right|M8190]]

The '''KDJ11-B''' CPU board (M8190) is the second-generation [[QBUS]] [[Central Processing Unit|CPU]] card using the [[J-11 chip set]] of the [[PDP-11]] (the first being the the [[KDJ11-A CPU]]). It is a [[DEC card form factor|quad-height]] board, and is used in the [[PDP-11/83]] and [[PDP-11/84]] systems.

Its principal improvement over the KDJ11-A is its support of the [[Private Memory Interconnect]] [[bus]], a high-performance variant of the QBUS; it also supports the [[KTJ11-B UNIBUS adapter]], a QBUS->[[UNIBUS]] adapter used in the PDP-11/84.

It also provides a built-in [[asynchronous serial line|serial]] console, [[Read-only memory|ROM]]s to contain diagnostic and [[bootstrap]] programs, and an [[EEPROM]] to contain configuration information.

Like the KDJ11-A, the -B also contains an 8K-byte write-through [[cache]] (set size 1, block size 1 16-bit [[word]]), protected by [[parity]]. The KDJ11-B additionally provides two sets of tag fields for each cache entry, so that the CPU and [[Direct Memory Access|DMA]] from the QBUS can interact with the cache simultaneously. Cache control logic inspects DMA transfers and invalidates cache entries for memory words which are written to by a device.

Also like the KDJ11-A, it can also use the [[FPJ11 floating point accelerator]] [[integrated circuit|chip]] to speed up the [[FP11 floating point|FP11]] implementation in the J-11.

As far as is known, the various models of the KDJ11-B differ only in their speed (CPU and [[clock]] [[crystal]]) and whether or not they come with the FPJ11. [[Digital Equipment Corporation|DEC]] documentation refers to certain models being used in certain machines, but as far as is known, in fact any model will work in any machine.

==Cache disable==

There is a [[jumper]] that will disable the cache, for testing; it is jumper W20, on the lower right side of the board.

The 'KDJ11-B CPU Module User's Guide' (EK-KDJ1B-UG-001) has an erroneous entry regarding this jumper; it says (pg. 2-2, pg. 69 of the PDF) that "W20 installed" means "This condition is reserved". It should read "W20 ''removed'' - This condition is reserved".

==Cache problems==

The KDJ11-B cache implementation makes hard-to-diagnose stability problems a possibility. Below are some problems observed in a [https://forum.vcfed.org/index.php?threads/july-2024-ebay-qbus-lot-repair-thread.1249049/ VCFed Forums repair thread from July 2024]:

===Intermittent CPU stoppage===

During testing of [[Clearpoint QED1]] and [[MSV11-J]] [[PMI]] memories, the system would randomly stop while running '''VMJAB0''', the [[MSV11-J]] exerciser from [[XXDP]]. There was no error printout, no trap messages, no HALT to [[ODT]], and the '''RUN''' lamp was out. The system came up from a restart and reported no errors in its self-tests. '''OKDAG0''', the KDJ11-B cluster diagnostics, reported no errors, even with the switches set to 000300Q for extended cache tag and data RAM tests. After entering field service mode in '''VMJAB0''' and disabling the J-11 cache, '''VMJAB0''' would run without error or stoppage. After an extended run of '''VMJAB0''', the system power-on diagnostics stopped with an error #162, which did not state that it was cache related, but should be -- #62 is a cache error, and for errors greater than 100, one subtracts 100 and uses the resulting number.

This problem was found to be a failing cache SRAM at position E10. The faulty chip was located through process of elimination, and was the fourth chip replaced. All other cache RAMs were OK.

===Consistent Error 62 with printout===

During burn-in testing of a repaired KDJ11-B from a large lot of scrap [[QBus]] boards, the KDJ11-B began stopping on every reset with a #62 cache error. The error could be bypassed with a '''CTRL+O 4''' bypass. Once bypassed, the system could boot into [[XXDP]], but '''OKDAG0''' KDJ11-B cluster diagnostics reported no problems, even when run with the switches set to 000300Q for extended cache tag and data RAM tests.

This problem was found to be a failing cache SRAM at position E104, which is in the DMA tag RAM array. The faulty chip was located through process of elimination, and was the eleventh chip replaced. All other cache RAMs were OK.

===Consistent Error 62 with lockup===

During burn-in testing of a repaired KDJ11-B from a large lot of scrap [[QBus]] boards, the KDJ11-B began locking up on every reset with test #62 displayed on the lights. The system locked up hard and could not be HALTed to [[ODT]] without a reboot. No error was printed to the console. The [[EEPROM]] was moved to another KDJ11-B and configured to enter [[ODT]] on power-on, and skip all testing. This allowed booting into [[XXDP]] and running '''OKDAG0''', KDJ11-B cluster diagnostics. With switches set to 000300Q for extended cache tag and data RAM tests, '''OKDAG0''' would stop with the message:

'''ERROR IN RECORDING HITS THROUGH HITS/MISS REGISTER'''

Error printout indicated that the hit/miss shift register was not recording any hits, and remaining 000000Q regardless of the hit pattern attempting to be written to it.

The hit/miss register is implemented in the J-11 processor itself, but is fed signals from the DC350 gate array, which contains the cache control registers. These signals are combined through a 74S260 dual 5-input NOR gate at E22. The 74S260 had failed, and resolved the error upon replacement.

==DC350 Gate Array Incompatibilities==

During the diagnosis of a cache problem in this [https://forum.vcfed.org/index.php?threads/july-2024-ebay-qbus-lot-repair-thread.1249049/ VCFed Forums repair thread from July 2024], it was discovered that DC350 gate arrays may not be interchangeable between board revisions. A LSI gold lid gate array from an early KDJ11-B with green top-side ECO was replaced with a silver lid gate array made in Japan from a later revision KDJ11-B. This resulted in a "mostly working" KDJ11-B, but '''OKDAG0''' cluster diagnostics would randomly stop to [[ODT]] or loop endlessly without printout of pass completion or errors, and never prompted for user input for the KDJ11-B lamp register test. It is assumed that the DC350 revision was incompatible with the board revision.

==See also==

* [[KDJ11 PMI/UNIBUS backplane]]
* [[KDJ11-D CPU]]

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1B-UG_KDJ11-B_Nov86.pdf KDJ11-B CPU Module User's Guide] (EK-KDJ1B-UG-001)
* [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-247AA-MG-001_KDJ11-B_CPU_System_Maintenance_Nov88.pdf KDJ11-B CPU System Maintenance] (EK-247AA-MG-001)
* [http://www.bitsavers.org/pdf/dec/pdp11/1173/KDJ11-B_Processor_Spec_Jun1984.pdf KDJ11-B Processor Specification]
* [http://www.bitsavers.org/pdf/dec/pdp11/1184/MP-02015-01_11-84_Maintenance_Print_Set_198412.pdf 11/84 Field Maintenance Print Set (MP-02015-001)] - Contains KDJ11-B Field Maintenance Print Set (MP-01969-01) on pp. 94-126

[[Category: PDP-11 QBUS Processors]]
[[Category: Private Memory Interconnect]]
[[Category: DEC Documentation Errors]]

KDJ11-B CPU

2025-11-13T00:21:44Z

Jnc: Doc error on the 'disable cache' jumper

[[Image:m8190.jpg|200px|thumb|right|M8190]]

The '''KDJ11-B''' CPU board (M8190) is the second-generation [[QBUS]] [[Central Processing Unit|CPU]] card using the [[J-11 chip set]] of the [[PDP-11]] (the first being the the [[KDJ11-A CPU]]). It is a [[DEC card form factor|quad-height]] board, and is used in the [[PDP-11/83]] and [[PDP-11/84]] systems.

Its principal improvement over the KDJ11-A is its support of the [[Private Memory Interconnect]] [[bus]], a high-performance variant of the QBUS; it also supports the [[KTJ11-B UNIBUS adapter]], a QBUS->[[UNIBUS]] adapter used in the PDP-11/84.

It also provides a built-in [[asynchronous serial line|serial]] console, [[Read-only memory|ROM]]s to contain diagnostic and [[bootstrap]] programs, and an [[EEPROM]] to contain configuration information.

Like the KDJ11-A, the -B also contains an 8K-byte write-through [[cache]] (set size 1, block size 1 16-bit [[word]]), protected by [[parity]]. The KDJ11-B additionally provides two sets of tag fields for each cache entry, so that the CPU and [[Direct Memory Access|DMA]] from the QBUS can interact with the cache simultaneously. Cache control logic inspects DMA transfers and invalidates cache entries for memory words which are written to by a device.

Also like the KDJ11-A, it can also use the [[FPJ11 floating point accelerator]] [[integrated circuit|chip]] to speed up the [[FP11 floating point|FP11]] implementation in the J-11.

As far as is known, the various models of the KDJ11-B differ only in their speed (CPU and [[clock]] [[crystal]]) and whether or not they come with the FPJ11. [[Digital Equipment Corporation|DEC]] documentation refers to certain models being used in certain machines, but as far as is known, in fact any model will work in any machine.

==Cache disable==

There is a jumper that will disable the cache, for testing; it is jumper W20, on the lower right side of the board.

The 'KDJ11-B CPU Module User's Guide' (EK-KDJ1B-UG-001) has an erroneous entry regarding this jumper; it says (pg. 2-2, pg. 69 of the PDF) that "W20 installed" means "This condition is reserved". It should read "W20 ''removed'' - This condition is reserved".

==Cache problems==

The KDJ11-B cache implementation makes hard-to-diagnose stability problems a possibility. Below are some problems observed in a [https://forum.vcfed.org/index.php?threads/july-2024-ebay-qbus-lot-repair-thread.1249049/ VCFed Forums repair thread from July 2024]:

===Intermittent CPU stoppage===

During testing of [[Clearpoint QED1]] and [[MSV11-J]] [[PMI]] memories, the system would randomly stop while running '''VMJAB0''', the [[MSV11-J]] exerciser from [[XXDP]]. There was no error printout, no trap messages, no HALT to [[ODT]], and the '''RUN''' lamp was out. The system came up from a restart and reported no errors in its self-tests. '''OKDAG0''', the KDJ11-B cluster diagnostics, reported no errors, even with the switches set to 000300Q for extended cache tag and data RAM tests. After entering field service mode in '''VMJAB0''' and disabling the J-11 cache, '''VMJAB0''' would run without error or stoppage. After an extended run of '''VMJAB0''', the system power-on diagnostics stopped with an error #162, which did not state that it was cache related, but should be -- #62 is a cache error, and for errors greater than 100, one subtracts 100 and uses the resulting number.

This problem was found to be a failing cache SRAM at position E10. The faulty chip was located through process of elimination, and was the fourth chip replaced. All other cache RAMs were OK.

===Consistent Error 62 with printout===

During burn-in testing of a repaired KDJ11-B from a large lot of scrap [[QBus]] boards, the KDJ11-B began stopping on every reset with a #62 cache error. The error could be bypassed with a '''CTRL+O 4''' bypass. Once bypassed, the system could boot into [[XXDP]], but '''OKDAG0''' KDJ11-B cluster diagnostics reported no problems, even when run with the switches set to 000300Q for extended cache tag and data RAM tests.

This problem was found to be a failing cache SRAM at position E104, which is in the DMA tag RAM array. The faulty chip was located through process of elimination, and was the eleventh chip replaced. All other cache RAMs were OK.

===Consistent Error 62 with lockup===

During burn-in testing of a repaired KDJ11-B from a large lot of scrap [[QBus]] boards, the KDJ11-B began locking up on every reset with test #62 displayed on the lights. The system locked up hard and could not be HALTed to [[ODT]] without a reboot. No error was printed to the console. The [[EEPROM]] was moved to another KDJ11-B and configured to enter [[ODT]] on power-on, and skip all testing. This allowed booting into [[XXDP]] and running '''OKDAG0''', KDJ11-B cluster diagnostics. With switches set to 000300Q for extended cache tag and data RAM tests, '''OKDAG0''' would stop with the message:

'''ERROR IN RECORDING HITS THROUGH HITS/MISS REGISTER'''

Error printout indicated that the hit/miss shift register was not recording any hits, and remaining 000000Q regardless of the hit pattern attempting to be written to it.

The hit/miss register is implemented in the J-11 processor itself, but is fed signals from the DC350 gate array, which contains the cache control registers. These signals are combined through a 74S260 dual 5-input NOR gate at E22. The 74S260 had failed, and resolved the error upon replacement.

==DC350 Gate Array Incompatibilities==

During the diagnosis of a cache problem in this [https://forum.vcfed.org/index.php?threads/july-2024-ebay-qbus-lot-repair-thread.1249049/ VCFed Forums repair thread from July 2024], it was discovered that DC350 gate arrays may not be interchangeable between board revisions. A LSI gold lid gate array from an early KDJ11-B with green top-side ECO was replaced with a silver lid gate array made in Japan from a later revision KDJ11-B. This resulted in a "mostly working" KDJ11-B, but '''OKDAG0''' cluster diagnostics would randomly stop to [[ODT]] or loop endlessly without printout of pass completion or errors, and never prompted for user input for the KDJ11-B lamp register test. It is assumed that the DC350 revision was incompatible with the board revision.

==See also==

* [[KDJ11 PMI/UNIBUS backplane]]
* [[KDJ11-D CPU]]

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-KDJ1B-UG_KDJ11-B_Nov86.pdf KDJ11-B CPU Module User's Guide] (EK-KDJ1B-UG-001)
* [http://www.bitsavers.org/pdf/dec/pdp11/1173/EK-247AA-MG-001_KDJ11-B_CPU_System_Maintenance_Nov88.pdf KDJ11-B CPU System Maintenance] (EK-247AA-MG-001)
* [http://www.bitsavers.org/pdf/dec/pdp11/1173/KDJ11-B_Processor_Spec_Jun1984.pdf KDJ11-B Processor Specification]
* [http://www.bitsavers.org/pdf/dec/pdp11/1184/MP-02015-01_11-84_Maintenance_Print_Set_198412.pdf 11/84 Field Maintenance Print Set (MP-02015-001)] - Contains KDJ11-B Field Maintenance Print Set (MP-01969-01) on pp. 94-126

[[Category: PDP-11 QBUS Processors]]
[[Category: Private Memory Interconnect]]

Instruction set

2025-11-06T08:53:03Z

Jnc: 'instruction set' is better equivalent for 'order code' than 'object code' (see EDSAC document)

An '''instruction set''' refers to the repertoire of [[instruction]]s provided by any particular [[Central Processing Unit|CPU]] [[architecture]].

Also a key part of an instruction set are the means provided for indicating sources and destinations for data processed by those instruction, the '''addressing modes''' of the instruction set. For example, some early machines only included a single [[register]], the accumulator, and were otherwise a [[load-store architecture]]; eventually provision for multiple registers became common. Also, it is now common for instructions to be able to use a [[stack]] as the source or destination for data.

Some early computers used the alternative term '''order code''' for the instruction set (and '''order''' for [[instruction]]). This was more common in the UK; especially at Cambridge (on the [[EDSAC]], and descendants such as the [[LEO]]). In the US, uses included several [[Lincoln Laboratory]] computers.

{{semi-stub}}

==External links==

* [https://www.cl.cam.ac.uk/relics/orders.notes.html The EDSAC Order Code]

[[Category: Computer Basics]]

Instruction

2025-11-06T08:52:30Z

Jnc: 'instruction set' is better equivalent for 'order code' than 'object code' (see EDSAC document)

An '''instruction''' is, at the highest level of abstraction, the smallest unit of computation which a [[programmer]] can direct the [[Central Processing Unit|CPU]] to perform.

In more practical terms, the CPU operates by fetching items from [[main memory]]; each item contains a single directive for the CPU (e.g. add the contents of one [[register]] to another, or move a unit of data from a register, to main memory) - those items are instructions. (An instruction is usually a [[word]], but on some CPUs, multiple instructions could be packed in each word, while on others, some instructions took multiple words.)

Some early computers used the alternative term '''order''' for instruction (and '''order code''' for [[instruction set]]). This was more common in the UK; especially at Cambridge (on the [[EDSAC]], and descendants such as the [[LEO]]). In the US, uses included several [[Lincoln Laboratory]] computers, and the [[PDP-1]].

{{semi-stub}}

==External links==

* [https://www.cl.cam.ac.uk/relics/orders.notes.html The EDSAC Order Code]

[[Category: Computer Basics]]

Talk:Instruction

2025-11-05T19:10:12Z

Jnc: /* Order/order code */ Where should I look for PDP-1 usage?

==Order/order code==

I actually have the impression that the 'order/order code' terminology was more common in the UK; at Cambridge (see [https://www.cl.cam.ac.uk/relics/orders.notes.html The EDSAC Order Code], and descendants such as the [[LEO]]); and at Manchester (see [https://www.cs.man.ac.uk/CCS/res/res02.htm From Cathode Ray Tube to Ferranti Mark I]). In the US, [[Whirlwind]] mostly used 'instruction' and 'operation code'. [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 13:11, 4 November 2025 (UTC)

I had a look through some [[PDP-1]] documentation, but didn't see 'order' being used. Where should I look? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 19:10, 5 November 2025 (UTC)

Instruction

2025-11-05T19:06:46Z

Jnc: 'order'/'order code' in the UK

An '''instruction''' is, at the highest level of abstraction, the smallest unit of computation which a [[programmer]] can direct the [[Central Processing Unit|CPU]] to perform.

In more practical terms, the CPU operates by fetching items from [[main memory]]; each item contains a single directive for the CPU (e.g. add the contents of one [[register]] to another, or move a unit of data from a register, to main memory) - those items are instructions. (An instruction is usually a [[word]], but on some CPUs, multiple instructions could be packed in each word, while on others, some instructions took multiple words.)

Some early computers used the alternative term '''order''' for instructions, and '''order code''' for [[Object code|machine code]]. This was more common in the UK; especially at Cambridge (on the [[EDSAC]], and descendants such as the [[LEO]]). In the US, uses included several [[Lincoln Laboratory]] computers, and the [[PDP-1]].

{{semi-stub}}

==See also==

* [[Instruction set]]

==External links==

* [https://www.cl.cam.ac.uk/relics/orders.notes.html The EDSAC Order Code]

[[Category: CPU Basics]]

Average Response Computer

2025-11-05T07:53:58Z

Jnc: Explain name more clearly

The '''Average Response Computer''' (sometimes referred to as the '''ARC-1''') was not actually a [[computer]] (as implied by the name), but a [[digital]] [[transistor]] data recording/analysis device. It took a number of data samples, provided by an [[analog-to-digital converter]], and summed and averaged them (hence the 'computer', since 'computing' is being done), to remove the [[noise]]. It was built at [[Lincoln Laboratory]] in 1958. Its importance was as a predecessor to the [[LINC]] (see the tale in the Clark history, below).

==Further reading==

* W. A. Clark, R. M. Brown, M. H. Goldstein, C. E. Molnar, D. F. O'Brien, H.E. Zieman, "The Average Response Computer (ARC): A Digital Device for Computing Averages and Amplitude and Time Histograms of Electrophysiological Responses", ''IRE Trans. Biomed. Electronics'', 1961
* W. A. Clark, Section B, "Average Response Computer (ARC-1)", in [https://dspace.mit.edu/bitstream/handle/1721.1/52163/RLE_QPR_049_XIV.pdf?sequence=1 Communications Biophysics Quarterly Progress Report, No. 49], [[Research Laboratory of Electronics]], April, 1958 - includes a description, block diagram and sample data

==External links==

* Wesley A. Clark, [https://www.digibarn.com/stories/linc/documents/LINC-Personal-Workstation/LINC-Personal-Workstation.pdf The LINC Was Early and Small], [[Association for Computing Machinery|ACM]], ''Proceedings of the ACM Conference on the History of Personal Workstations'', 1986, pp. 133-155 - covers the ARC on pp. 136-137
* John C. Conley, [https://bitsavers.trailing-edge.com/pdf/dec/pdp1/memos/M-1086_Apr60.pdf Average Response Computer Program (ARC)], 1960 - program to implement the functionality of the ARC on a [[PDP-1]]

[[Category: Test Equipment]]

Whirlwind

2025-11-04T20:17:27Z

Jnc: First computer used interactively

'''Whirlwind''' was one of the very first computers; it was enormously influential, for several reasons. It was the first [[real-time]] computer, unlike all the other first-generation computers, which were intended only for large-scale computations for numerical [[application]]s. Associated with that, it was used interactively, rather than in [[batch processing]] mode, and had several successors in that - which set the path for most of today's computers.

Finally, Whirlwind was also the first computer with [[core memory]], which was invented for it (some time after it had first come into service; it initially used [[Williams tube|electrostatic]] [[vacuum tube]] [[main memory]]). It was built at [[Massachusetts Institute of Technology|MIT]] (MIT's first computer), originally for use in a flight simulator, but wound up being used to prototype the [[SAGE]] air defence system.

It was built out of vacuum tubes, and had a [[word]] size of 16 bits. It used a predecessor to [[microcode]] for internal control [[logic]] (it used a sequence of hard-wired control words for control, effectively [[read-only memory|ROM]], but did not include any ability to alter the order of [[execute|execution]] thereof.)

[[Instruction]]s included a 12-bit [[absolute address]]; when its [[main memory]] later exceeded that size, a [[bank switching]] mechanism had to be added. It had only a single [[register|accumulator]], and no [[index register]]s.

In common with other very early machines, its [[architecture]] was somewhat peculiar (by current standards). Its [[control flow]] capabilities were limited and primitive; it had [[conditional branch]]ing, but almost no support of any kind for [[subroutine]]s (it did have a '[[jump]] and save the old [[Program Counter|PC]] in the accumulator' instruction), and no provision for [[stack]]s. As a result of all that, extensive use was made of [[self-modifying code]] (including to return from a subroutine). It had neither [[interrupt]]s or [[trap]]s (but could be caused to [[halt]] on an [[arithmetic overflow]]).

The standard input/output device was a [[Flexowriter]] (very similar to a [[Teletype]]); it functioned as a [[printing terminal]] (initially only for output), and could also read and punch [[paper tape]]s. (A high-speed Ferranti photo-electric paper tape reader was also added later, as was a [[line printer]].) Eventually, the system was enhanced with a [[magnetic tape drive]] and a [[drum]]. A [[vector graphics|vector]] [[video display]] and a [[light pen]] input pointing device were also added.

{{semi-stub}}

==See also==

* [[Memory Test Computer]] - a now little-known, but important, early descendant
* [[TX-0]] - an important descendant, which led to another, [[TX-2]]
* [[LINC]] - another important, albeit somewhat distant, descendant of Whirlwind

==Further reading==

* Kent C. Redmond, Thomas M. Smith, ''Project Whirlwind: The History of a Computer Pioneer'', Digital Press, Bedford, 1980

==External links==

* [http://www.bitsavers.org/pdf/mit/whirlwind/ Bitsavers] - large collection of material
** [http://www.bitsavers.org/pdf/mit/whirlwind/M-series/2M-0277_Whirlwind_Programming_Manual_Oct58.pdf Whirlwind Programming Manual]
** [http://www.bitsavers.org/pdf/mit/whirlwind/R-series/R-127_Whirlwind_I_Computer_Block_Diagrams_Volume_1_Sep47.pdf Whirlwind I Computer Block Diagrams]
** [http://www.bitsavers.org/pdf/mit/whirlwind/R-series/R-221_Whirlwind_I_Operational_Logic_May54.pdf Whirlwind I Operation Logic] - good, detailed overview of the internal architecture
* [https://dome.mit.edu/handle/1721.3/37455 Project Whirlwind] - large collection of contemporary documents; e.g. bi-weekly progress reports
* [https://www.historia-mollimercium.com/whirlwind/ww.html MIT/CHM Whirlwind Software Recovery] - Many links to other sites
** [https://www.historia-mollimercium.com/whirlwind/Whirlwind-Software-Recovery-Project-v6d.pdf Recovering Software for the Whirlwind Computer]
** [https://www.historia-mollimercium.com/whirlwind/Whirlwind-The-Physical-Artifact.pdf Whirlwind, the Physical Artifact]
* [https://computerhistory.org/blog/the-whirlwind-computer-at-chm/ The Whirlwind Computer at CHM]
* [https://computerhistory.org/blog/gambling-on-whirlwind-how-the-us-navy-spent-3-million-and-got-a-computer-game/ Gambling on Whirlwind: How the US Navy Spent $3M and got a Computer Game]
* [https://web.archive.org/web/20201227113758/https://www.cadhistory.net/03%20MIT%20CAD%20Roots%201945-1965.pdf Computer-Aided Design’s Strong Roots at MIT] - has a fair amount about Whirlwind

[[Category: Early Computers]]
[[Category: 16-bit Computers‎]]
[[Category: Unique Computers]]

Lincoln Laboratory

2025-11-04T19:59:08Z

Jnc: /* External links */ Fix link org

'''Lincoln Laboratory''', while formally a part of [[Massachusetts Institute of Technology|MIT]], is effectively an independent research organization.

It is in some sense a descendant of the Radiation Laboratory, set up at MIT in WWII to do work on radar (although the only connection is that some people from the Rad Lab later worked at Lincoln). Lincoln was set up in 1951 to help build the [[Semi-Automatic Ground Environment]], the US's first air defense system. It has been involved in research work useful for national defense, and more recently, other national priorities as well, ever since.

The [[Memory Test Computer]] was built there in 1952, by Group 62 and Group 63, to test the first [[core memory]], intended for use in [[Whirlwind]] (which was used for a prototype of SAGE). The [[TX-0]] computer was built at Lincoln Laboratory in 1955, to try out using [[transistor]]s to build a computer. It was later followed by the [[TX-2]], which was the host for [[Sketchpad]].

==Computers done at Lincoln==

Several innovative early computers were created at Lincoln Laboratory. They include:

* [[Memory Test Computer]] - first computer with [[core memory]]
* [[TX-0]] - supposedly the first [[transistor]] computer
* [[TX-2]]
* [[FX-1]] - magnetic film memory experiment
* [[LINC]] - supposedly the first [[personal computer]]

{{semi-stub}}

==Further reading==

* Ed. Eva C. Freeman, ''MIT Lincoln Laboratory: Technology in the National Interest'', MIT Lincoln Laboratory, Lexington, 1995
* Ed. Alan A. Grometstein, [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/MIT_Lincoln_Laboratory_history_book.pdf ''MIT Lincoln Laboratory: Technology in Support of National Security''], MIT Lincoln Laboratory, Lexington, 2011

==External links==

* [https://web.archive.org/web/20140930203157/http://www.ll.mit.edu/employment/orgtechdivisions.html Organization of Technical Divisions]
* [https://www.ll.mit.edu/about/history History]
** [https://www.ll.mit.edu/about/history/sage-semi-automatic-ground-environment-air-defense-system SAGE: Semi-Automatic Ground Environment Air Defense System]]
* [https://web.archive.org/web/20140930210150/http://www.ll.mit.edu/about/about.html About Lincoln Laboratory]
** [https://web.archive.org/web/20140828220219/http://www.ll.mit.edu/about/History/RadLab.html MIT Radiation Laboratory]
* [https://web.archive.org/web/20140828223103/http://www.ll.mit.edu/about/History/SAGE_TOCpage.html SAGE: Semi-Automatic Ground Environment Air Defense System]
** [https://web.archive.org/web/20140828221136/http://www.ll.mit.edu/about/History/newthreat.html A New Threat]
** [https://web.archive.org/web/20140828224042/http://www.ll.mit.edu/about/History/origins.html Lincoln Laboratory Origins]
** [https://web.archive.org/web/20161204075643/http://www.ll.mit.edu/about/History/projectcharles.html Lincoln Laboratory Origins (part 2)]
** [https://web.archive.org/web/20140828213825/http://www.ll.mit.edu/about/History/SAGEairdefensesystem.html The SAGE Air Defense System]
** [https://web.archive.org/web/20140828221740/http://www.ll.mit.edu/about/History/earlydigitalcomputing.html Early Digital Computing]
** [https://web.archive.org/web/20150208150649/http://www.ll.mit.edu/about/History/digitalcomputing_2.html Early Digital Computing (part 2)]
** [https://web.archive.org/web/20140828223207/http://www.ll.mit.edu/about/History/capecodprototype.html Cape Cod SAGE Prototype]
** [https://web.archive.org/web/20140811144042/http://www.ll.mit.edu/about/History/capecodprototype-2.html Cape Cod SAGE Prototype (part 2)]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars.html Early-Warning Radars]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars2.html Part 2: MIT Lincoln Laboratory develops UHF early-warning radar]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars3.html Part 3: Jug Handle, Boston Hill, and Texas Tower radars]
** [https://web.archive.org/web/20140828221442/http://www.ll.mit.edu/about/History/transition.html SAGE Transition] - covers the creation of [[MITRE]]
** [https://web.archive.org/web/20140828222855/http://www.ll.mit.edu/about/History/reflections.html Reflections on SAGE]

** [https://web.archive.org/web/20140828223543/http://www.ll.mit.edu/about/History/newcallings.html New Callings]
* [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/historybook.html MIT Lincoln Laboratory's History Book]
* [https://web.archive.org/web/20160811032204/http://www.ll.mit.edu/about/History/60-innovations.pdf 60 Innovations Over Sixty Years: Highlights of Technology Advances at MIT Lincoln Laboratory]
* [http://bitsavers.org/pdf/mit/lincolnLaboratory/ Lincoln Laboratory] - documents at [[Bitsavers]]
* [https://www.billbuxton.com/LincolnLab.pdf Interaction at Lincoln Laboratory in the 1960’s] - session at CHI 2005

[[Category: Research Organizations]]

Lincoln Laboratory

2025-11-04T19:53:06Z

Jnc: /* External links */ +Interaction at Lincoln Laboratory in the 1960’s

'''Lincoln Laboratory''', while formally a part of [[Massachusetts Institute of Technology|MIT]], is effectively an independent research organization.

It is in some sense a descendant of the Radiation Laboratory, set up at MIT in WWII to do work on radar (although the only connection is that some people from the Rad Lab later worked at Lincoln). Lincoln was set up in 1951 to help build the [[Semi-Automatic Ground Environment]], the US's first air defense system. It has been involved in research work useful for national defense, and more recently, other national priorities as well, ever since.

The [[Memory Test Computer]] was built there in 1952, by Group 62 and Group 63, to test the first [[core memory]], intended for use in [[Whirlwind]] (which was used for a prototype of SAGE). The [[TX-0]] computer was built at Lincoln Laboratory in 1955, to try out using [[transistor]]s to build a computer. It was later followed by the [[TX-2]], which was the host for [[Sketchpad]].

==Computers done at Lincoln==

Several innovative early computers were created at Lincoln Laboratory. They include:

* [[Memory Test Computer]] - first computer with [[core memory]]
* [[TX-0]] - supposedly the first [[transistor]] computer
* [[TX-2]]
* [[FX-1]] - magnetic film memory experiment
* [[LINC]] - supposedly the first [[personal computer]]

{{semi-stub}}

==Further reading==

* Ed. Eva C. Freeman, ''MIT Lincoln Laboratory: Technology in the National Interest'', MIT Lincoln Laboratory, Lexington, 1995
* Ed. Alan A. Grometstein, [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/MIT_Lincoln_Laboratory_history_book.pdf ''MIT Lincoln Laboratory: Technology in Support of National Security''], MIT Lincoln Laboratory, Lexington, 2011

==External links==

* [https://www.ll.mit.edu/about/history History]
** [https://www.ll.mit.edu/about/history/sage-semi-automatic-ground-environment-air-defense-system SAGE: Semi-Automatic Ground Environment Air Defense System]]
* [https://web.archive.org/web/20140930210150/http://www.ll.mit.edu/about/about.html About Lincoln Laboratory]
** [https://web.archive.org/web/20140930203157/http://www.ll.mit.edu/employment/orgtechdivisions.html Organization of Technical Divisions]
* [https://web.archive.org/web/20140828220219/http://www.ll.mit.edu/about/History/RadLab.html MIT Radiation Laboratory]
* [https://web.archive.org/web/20140828223103/http://www.ll.mit.edu/about/History/SAGE_TOCpage.html SAGE: Semi-Automatic Ground Environment Air Defense System]
** [https://web.archive.org/web/20140828221136/http://www.ll.mit.edu/about/History/newthreat.html A New Threat]
** [https://web.archive.org/web/20140828224042/http://www.ll.mit.edu/about/History/origins.html Lincoln Laboratory Origins]
** [https://web.archive.org/web/20161204075643/http://www.ll.mit.edu/about/History/projectcharles.html Lincoln Laboratory Origins (part 2)]
** [https://web.archive.org/web/20140828213825/http://www.ll.mit.edu/about/History/SAGEairdefensesystem.html The SAGE Air Defense System]
** [https://web.archive.org/web/20140828221740/http://www.ll.mit.edu/about/History/earlydigitalcomputing.html Early Digital Computing]
** [https://web.archive.org/web/20150208150649/http://www.ll.mit.edu/about/History/digitalcomputing_2.html Early Digital Computing (part 2)]
** [https://web.archive.org/web/20140828223207/http://www.ll.mit.edu/about/History/capecodprototype.html Cape Cod SAGE Prototype]
** [https://web.archive.org/web/20140811144042/http://www.ll.mit.edu/about/History/capecodprototype-2.html Cape Cod SAGE Prototype (part 2)]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars.html Early-Warning Radars]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars2.html Part 2: MIT Lincoln Laboratory develops UHF early-warning radar]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars3.html Part 3: Jug Handle, Boston Hill, and Texas Tower radars]
** [https://web.archive.org/web/20140828221442/http://www.ll.mit.edu/about/History/transition.html SAGE Transition] - covers the creation of [[MITRE]]
** [https://web.archive.org/web/20140828222855/http://www.ll.mit.edu/about/History/reflections.html Reflections on SAGE]

** [https://web.archive.org/web/20140828223543/http://www.ll.mit.edu/about/History/newcallings.html New Callings]
* [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/historybook.html MIT Lincoln Laboratory's History Book]
* [https://web.archive.org/web/20160811032204/http://www.ll.mit.edu/about/History/60-innovations.pdf 60 Innovations Over Sixty Years: Highlights of Technology Advances at MIT Lincoln Laboratory]
* [http://bitsavers.org/pdf/mit/lincolnLaboratory/ Lincoln Laboratory] - documents at [[Bitsavers]]
* [https://www.billbuxton.com/LincolnLab.pdf Interaction at Lincoln Laboratory in the 1960’s] - session at CHI 2005

[[Category: Research Organizations]]

ARC-1

2025-11-04T19:46:58Z

Jnc: Redir - alt name

#Redirect [[Average Response Computer]]

ARC

2025-11-04T19:35:58Z

Jnc: Turn into dab

'''ARC''' might refer to:

* [[Augmentation Research Center]] - ground-breaking research group at the [[Stanford Research Institute]]
* [[Average Response Computer]] - important predecessor to the ground-breaking [[LINC]]

{{disambiguation}}

Average Response Computer

2025-11-04T19:29:16Z

Jnc: Alterate name 'ARC-1'

The '''Average Response Computer''' (sometimes referred to as the '''ARC-1''') was not actually a [[computer]] (as implied by the name), but a [[digital]] [[transistor]] data recording/analysis device. It took a number of data samples, provided by an [[analog-to-digital converter]], and summed and averaged them (hence the 'computer'), to remove the [[noise]]. It was built at [[Lincoln Laboratory]] in 1958. Its importance was as a predecessor to the [[LINC]] (see the tale in the Clark history, below).

==Further reading==

* W. A. Clark, R. M. Brown, M. H. Goldstein, C. E. Molnar, D. F. O'Brien, H.E. Zieman, "The Average Response Computer (ARC): A Digital Device for Computing Averages and Amplitude and Time Histograms of Electrophysiological Responses", ''IRE Trans. Biomed. Electronics'', 1961
* W. A. Clark, Section B, "Average Response Computer (ARC-1)", in [https://dspace.mit.edu/bitstream/handle/1721.1/52163/RLE_QPR_049_XIV.pdf?sequence=1 Communications Biophysics Quarterly Progress Report, No. 49], [[Research Laboratory of Electronics]], April, 1958 - includes a description, block diagram and sample data

==External links==

* Wesley A. Clark, [https://www.digibarn.com/stories/linc/documents/LINC-Personal-Workstation/LINC-Personal-Workstation.pdf The LINC Was Early and Small], [[Association for Computing Machinery|ACM]], ''Proceedings of the ACM Conference on the History of Personal Workstations'', 1986, pp. 133-155 - covers the ARC on pp. 136-137
* John C. Conley, [https://bitsavers.trailing-edge.com/pdf/dec/pdp1/memos/M-1086_Apr60.pdf Average Response Computer Program (ARC)], 1960 - program to implement the functionality of the ARC on a [[PDP-1]]

[[Category: Test Equipment]]

Average Response Computer

2025-11-04T18:23:31Z

Jnc: Important predecessor to the LINC

The '''Average Response Computer''' was not actually a [[computer]] (as implied by the name), but a [[digital]] [[transistor]] data recording/analysis device. It took a number of data samples, provided by an [[analog-to-digital converter]], and summed and averaged them (hence the 'computer'), to remove the [[noise]]. It was built at [[Lincoln Laboratory]] in 1958. Its importance was as a predecessor to the [[LINC]] (see the tale in the Clark history, below).

==Further reading==

* W. A. Clark, R. M. Brown, M. H. Goldstein, C. E. Molnar, D. F. O'Brien, H.E. Zieman, "The Average Response Computer (ARC): A Digital Device for Computing Averages and Amplitude and Time Histograms of Electrophysiological Responses", ''IRE Trans. Biomed. Electronics'', 1961
* W. A. Clark, Section B, "Average Response Computer (ARC-1)", in [https://dspace.mit.edu/bitstream/handle/1721.1/52163/RLE_QPR_049_XIV.pdf?sequence=1 Communications Biophysics Quarterly Progress Report, No. 49], [[Research Laboratory of Electronics]], April, 1958 - includes a description, block diagram and sample data

==External links==

* Wesley A. Clark, [https://www.digibarn.com/stories/linc/documents/LINC-Personal-Workstation/LINC-Personal-Workstation.pdf The LINC Was Early and Small], [[Association for Computing Machinery|ACM]], ''Proceedings of the ACM Conference on the History of Personal Workstations'', 1986, pp. 133-155 - covers the ARC on pp. 136-137
* John C. Conley, [https://bitsavers.trailing-edge.com/pdf/dec/pdp1/memos/M-1086_Apr60.pdf Average Response Computer Program (ARC)], 1960 - program to implement the functionality of the ARC on a [[PDP-1]]

[[Category: Test Equipment]]

Oscilloscope

2025-11-04T18:19:33Z

Jnc: Move to new cat

An '''oscilloscope''' is a piece of [[electronic]] test equipment, used for observing the [[voltage]] of an incoming [[signal]] as a function of time; it can be used to observe the behaviour of both [[analog]] and [[digital]] [[circuit]]s. It allows the observer to see the waveforms present in the circuit as it operates; it is also used for [[debug]]ging equipment which has developed a fault. They are actually very old devices, preceding by some decades the first [[computer]]s; before them, they were used on analog equipment (such as [[radar]]s).

The first generations were built around a [[cathode ray tube|CRT]]; it displayed a point, formed by a single [[electron]] beam. Analog circuitry repetitively swept the beam across the face of the tube horizontally, and [[amplifier]]s used the input [[signal]] to deflect the beam vertically.

Devices with the functionality of an oscilloscope (i.e. they display the waveform of an incoming signal) still exist, but they are mostly completely different internally, now being principally digital, internally. Modern ones are similar to a [[logic analyzer]], in that the incoming signal is sampled, and the samples stored, and displayed on an [[Light Emitting Diode|LED]] or [[liquid-crystal display|LCD]] screen. The only difference from a logic analyzer is that a [[analog-to-digital converter]] is the first stage of processing of the input signal, so many more values of the input data are possible.

[[Category: Test Equipment]]

Category:Test Equipment

2025-11-04T18:18:19Z

Jnc: Need this one

Laboratory test/debugging equipment.

[[Category: Basics]]
[[Category: Hardware]]

IBM 701

2025-11-04T13:16:52Z

Jnc: /* External links */ +The Computer Pioneers - The Development of the IBM 701

{{Infobox Machine
| name = IBM 701
| manufacturer = [[International Business Machines]]
| year design started = February, 1951
| year announced = April, 1952
| year first shipped = December, 1952
| year discontinued = June, 1954
| form factor = [[mainframe]]
| word size = 18 or 36 bits


| logic type = [[vacuum tube]]s

| instruction speed = 60 μsec (basic add) 
456 μsec (multiply)

| predecessor = [[IBM 604]]
| successor = [[IBM 704]]
| price = US$15,000/month (rental only)
}}

The '''IBM 701''' (initially known as the '''IBM Defense Calculator''') was IBM's first commercial computer; it was later described as being "key to IBM's transition from punched-card machines to electronic computers". It was a [[vacuum tube]] scientific [[mainframe]] (built at a time when computers were generally only used for scientific, and not business, computing).

It was announced in April, 1952. 19 were produced (18 by June, 1954, when production ended; the last was a later special order for use in weather forecasting by the US government).

It was a fairly modern machine in architectual terms, compared to its close contemporary, the [[IBM 650]]; it was parallel, not [[serial computer|serial]], and it used [[binary]] internally. It used [[Williams tube]] [[electrostatic]] [[cathode ray tube]]s for [[main memory]]; each tube held 1K [[bit]]s, and a bank contained 36 tubes. Configurations could have either one or two banks.

[[Secondary storage]] included up to 4 [[drum]]s, each holding 2048 long-words, capable of transferring 800 words/second. A system included four [[magnetic tape drive]]s, using 1/2" plastic tape; the first magnetic tape on a computer.

Other [[peripheral]]s included a [[printer]], and [[punched card]] reader and punch.

==Further reading==

* Charles J. Bashe, Lyle R. Johnson, John H. Palmer, Emerson W. Pugh, ''IBM's Early Computers'', MIT Press, Cambridge, 1986

{{semi-stub}}

==External links==

* [http://www.bitsavers.org/pdf/ibm/701/ 701] - documentation at [[Bitsavers]]
** Werner Buchholz, [http://www.bitsavers.org/pdf/ibm/701/Buchholz_IBM_701_System_Design_Oct53.pdf The System Design of the IBM Type 701 Computer], ''Proceedings of the Institute of Radio Engineers'', Vol. 41 No. 10, October, 1953 pp. 1262-1275
** Clarence E. Frizzell, [http://www.bitsavers.org/pdf/ibm/701/Buchholz_IBM_701_System_Design_Oct53.pdf Engineering Description of the IBM Type 701 Computer], ''Proceedings of the Institute of Radio Engineers'', Vol. 41 No. 10, October, 1953 pp. 1275-1287
** Harold D. Ross, [http://www.bitsavers.org/pdf/ibm/701/Buchholz_IBM_701_System_Design_Oct53.pdf The Arithmetic Element of the IBM Type 701 Computer], ''Proceedings of the Institute of Radio Engineers'', Vol. 41 No. 10, October, 1953 pp. 1287-1294

* [https://ethw.org/Archives:The_Computer_Pioneers:_The_Development_of_the_IBM_701 Archives: The Computer Pioneers - The Development of the IBM 701]

[[Category: IBM Mainframes]]

Talk:Instruction

2025-11-04T13:11:42Z

Jnc: /* Order/order code */ That terminology was actually more common in the UK

IBM 701

2025-11-04T13:10:19Z

Jnc: /* External links */ Add Bitsavers stuff; IBM page went offline

{{Infobox Machine
| name = IBM 701
| manufacturer = [[International Business Machines]]
| year design started = February, 1951
| year announced = April, 1952
| year first shipped = December, 1952
| year discontinued = June, 1954
| form factor = [[mainframe]]
| word size = 18 or 36 bits


| logic type = [[vacuum tube]]s

| instruction speed = 60 μsec (basic add) 
456 μsec (multiply)

| predecessor = [[IBM 604]]
| successor = [[IBM 704]]
| price = US$15,000/month (rental only)
}}

The '''IBM 701''' (initially known as the '''IBM Defense Calculator''') was IBM's first commercial computer; it was later described as being "key to IBM's transition from punched-card machines to electronic computers". It was a [[vacuum tube]] scientific [[mainframe]] (built at a time when computers were generally only used for scientific, and not business, computing).

It was announced in April, 1952. 19 were produced (18 by June, 1954, when production ended; the last was a later special order for use in weather forecasting by the US government).

It was a fairly modern machine in architectual terms, compared to its close contemporary, the [[IBM 650]]; it was parallel, not [[serial computer|serial]], and it used [[binary]] internally. It used [[Williams tube]] [[electrostatic]] [[cathode ray tube]]s for [[main memory]]; each tube held 1K [[bit]]s, and a bank contained 36 tubes. Configurations could have either one or two banks.

[[Secondary storage]] included up to 4 [[drum]]s, each holding 2048 long-words, capable of transferring 800 words/second. A system included four [[magnetic tape drive]]s, using 1/2" plastic tape; the first magnetic tape on a computer.

Other [[peripheral]]s included a [[printer]], and [[punched card]] reader and punch.

==Further reading==

* Charles J. Bashe, Lyle R. Johnson, John H. Palmer, Emerson W. Pugh, ''IBM's Early Computers'', MIT Press, Cambridge, 1986

==External links==

* [http://www.bitsavers.org/pdf/ibm/701/ 701] - documentation at [[Bitsavers]]
** Werner Buchholz, [http://www.bitsavers.org/pdf/ibm/701/Buchholz_IBM_701_System_Design_Oct53.pdf The System Design of the IBM Type 701 Computer], ''Proceedings of the Institute of Radio Engineers'', Vol. 41 No. 10, October, 1953 pp. 1262-1275
** Clarence E. Frizzell, [http://www.bitsavers.org/pdf/ibm/701/Buchholz_IBM_701_System_Design_Oct53.pdf Engineering Description of the IBM Type 701 Computer], ''Proceedings of the Institute of Radio Engineers'', Vol. 41 No. 10, October, 1953 pp. 1275-1287
** Harold D. Ross, [http://www.bitsavers.org/pdf/ibm/701/Buchholz_IBM_701_System_Design_Oct53.pdf The Arithmetic Element of the IBM Type 701 Computer], ''Proceedings of the Institute of Radio Engineers'', Vol. 41 No. 10, October, 1953 pp. 1287-1294


{{semi-stub}}

[[Category: IBM Mainframes]]

Talk:LINC

2025-10-29T09:39:52Z

Jnc: /* Early history and names*/ - The source(s) for the changes to the name?

==Early history and names==

I'm curious about the source for the changes to the name.

I would tend to put a fair amount of faith in Severo Ornstein's [https://archive.computerhistory.org/resources/access/text/2019/03/102785079-05-01-acc.pdf ''Computing in the Middle Ages''], since he was there at the time. On the other hand, that as written decades later, and his memory might have dropped a few bits. Are there some contemporary documents from Lincoln and MIT that you are relying on? I took a quick look on Bitsavers, but didn't see anything.

'Computing in the Middle Ages' confirms that the machine was initially named the 'α-Linc'. However, it insists that the name then became 'LINC' at Lincoln, shortly later (pg. 140 of the PDF). What else can I look at? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 09:39, 29 October 2025 (UTC)

User:Jnc

2025-10-29T09:32:04Z

Jnc: /* Prototypes */ Add alpha (α)

[[Image:jnc.jpg|250px|thumb|right|Me]]

Although I have a wide interest in older computers, I worked with [[PDP-11]]'s ''extremely'' extensively 'back in the day', and consider them perhaps the most elegant [[architecture]] ever devised (the power and flexibility they obtained with only 16-bit wide [[instruction]]s were a revelation when they first appeared), so I started out by focusing on them. I also worked a lot on early [[UNIX]] (whose bang/buck ratio has ''never'' been surpassed, and almost certainly '''never''' will), back when it ''only'' ran on PDP-11's, before it was [[portable]]. (All of that was in the context of my work on the [[Internet]] - and, yes, it '''''is''''' spelled with a 'I'.)

For more about me, see my [http://www.chiappa.net/~jnc home page]. I joined the project here at the end of November, 2015‎‎, and have been working on it ever since. [https://gunkies.org/w/index.php?title=RK11_disk_controller&oldid=11294 This] seems to have been [https://gunkies.org/w/index.php?title=Special:Contributions/Jnc&dir=prev&limit=500&target=Jnc my first edit].

Also, I'm an admin here on the CHWiki, so if there are any admin-type tasks you need doing (e.g. deleting a page with a typo in the name; [https://en.wikipedia.org/wiki/Wikipedia:History_merging merging edit histories]; etc) just drop me a line ('''jnc at alum dot mit dot edu''').

==Prototypes==

"α" - "μ" - "·" - "•"

Technical Instruction Reference - Maintenance Installation Service Manual - Pocket Service Guide

Illustrated Parts Breakdown - Engineering Drawings - Field Maintenance Print Set

<nowiki>
'''xxx''' might refer to:
</nowiki>

<nowiki>
{{disambiguation}}
</nowiki>

<nowiki>
 
</nowiki>

==Useful links==

===Here===

* [[Special:Preferences|Preferences]] - includes personal edit count
* [[User:Jnc/Online|Online]] - Index to things I have put online
* [https://gunkies.org/w/index.php?title=User:Jnc&action=purge Purge cache] (edit as appropriate)
* [http://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=Category%3A&namespace=0&hideredirects=1 Category list]
* [https://gunkies.org/wiki/Special:ListUsers?username=&group=&creationSort=1&desc=1&wpsubmit=&wpFormIdentifier=mw-listusers-form&limit=100 New users]
* [[Special:LinkSearch|External links search]]
* [[Special:Log/rights|User rights log]] 
* [[Computer History Wiki:News]]
* [[MediaWiki:Sidebar]]
* [[Special:WhatLinksHere/Template:Stub|Stub articles]]
* [[Special:WhatLinksHere/Template:Semi-stub|Semi-stubs]]
* [[:Category:Disambiguation pages|Disambiguation pages]]
* [[:Category:Pages with broken file links|Pages with broken file links]]
* [[:Category:Wikipedia Content|Wikipedia content]]
* [http://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=Jnc&namespace=2 My pages]
* [[User:Jnc/ToCat|ToCat]]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=Infobox&namespace=10&hideredirects=1 Infobox templates]:
** [[:Template:Infobox Machine|Infobox Machine]]
** [[:Template:Infobox CPU|Infobox CPU]]
** [[:Template:Infobox Disk drive|Infobox Disk drive]]
** [[:Template:Infobox Tape drive|Infobox Tape drive]]
** [[:Template:Infobox Terminal|Infobox Terminal]]
** [[:Template:Infobox Software|Infobox Software]]
** [[:Template:Infobox OS|Infobox OS]]
** [[:Template:Infobox App|Infobox App]]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=16&namespace=10&hideredirects=1 16-bit register templates]:
** [[:Template:16bit-header‎|16bit-header‎]]
** [[:Template:16bit-bitout|16bit-bitout]]
** [[:Template:16bitoctal-bitout‎|16bitoctal-bitout‎]]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=32&namespace=10&hideredirects=1 32-bit register templates]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=36&namespace=10&hideredirects=1 36-bit register templates]

===External===

* [https://en.wikipedia.org/wiki/Wikipedia:Administrators%27_guide/Granting_and_revoking_user_rights Granting and revoking user rights]
** [[Special:ListGroupRights|List Group Rights]] - on the CHWiki
** [[Special:UserRights|User Rights]] - on the CHWiki
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/ University of Queensland Computer Museum manual collection] - clone at [[Bitsavers]]
* [http://www.bitsavers.org/scandocs.trailing-edge.com/ scandocs.trailing-edge] - a clone of another dead site
* [https://ed-thelen.org/comp-hist/ Antique (lonesome) Computers] - Ed Thelen's awesome history site
** [https://ed-thelen.org/comp-hist/merged.html Documents, Links & Videos]

==Pages I have added==

===Fundamentals===


[[Architecture]]
- [[‎Algorithm]]
- [[Syntax]]
- [[Semantics]]
- [[Identifier]]
- [[Namespace]]
- [[Hierarchy]]



[[Type]]
- [[Normalization]]
- [[Variable]]
- [[Operand]]
- [[Operator]]
- [[Expression]]
- [[Argument]]
- [[Tree]]



[[Computer]]
- [[Arbitration]]
- [[Port]]
- [[Interface]]
- [[Address]]
- [[Address space]]
- [[Mapping]]
- [[Network]]



[[Electric field]]
- [[Magnetic field]]
- [[Electro-magnetic]]
- [[‎Electro-magnetic radiation]]
- [[‎Photon]]
- [[Microwave]]
- [[Magnet]]
- [[Electron]]
- [[Electrostatic]]



[[Conductor]]
- [[Insulator]]
- [[Dielectric]]
- [[Resistor]]
- [[Capacitor]]
- [[Inductor]]
- [[Ground]]
- [[Contact]]
- [[Relay]]
- [[Fuse]]
- [[Circuit breaker]]



[[Current]]
- [[Ampere]]
- [[Voltage]]
- [[Volt]]
- [[Direct current]]
- [[Alternating current]]
- [[Three-phase power]]
- [[Frequency]]
- [[Phase]]
- [[Impedance]]
- [[Transformer]]



[[Circuit]]
- [[Signal]]
- [[Signal return]]
- [[Ground return]]
- [[Propagation delay‎]]



[[Noise]]
- [[Interference]]
- [[Crosstalk]]
- [[‎Coaxial cable]]
- [[Transmission line‎]]
- [[Terminator‎]]
- [[Single-ended signalling‎]]
- [[Differential pair]]
- [[Fiber optic‎‎]]



[[State machine‎]]
- [[Least Recently Used replacement algorithm]]
- [[Recursive acronym]]



[[Oscilloscope‎]]
- [[Logic analyzer]]



[[Radar‎]]


===Components===


[[Chassis]]
- [[Switch]]
- [[Fusible link]]
- [[‎D Subminiature Connector]]



[[Crystal]]
- [[Electronic]]
- [[Vacuum tube]]
- [[Diode]]
- [[Klystron]]
- [[Semiconductor]]
- [[Transistor]]
- [[Laser]]



[[Bipolar]]
- [[Metal Oxide Semiconductor]]
- [[‎Micro-electronics]]
- [[Integrated circuit]]
- [[Liquid-crystal display]]



[[Mounting box]]
- [[Backplane]]
- [[Connector‎]]
- [[Harness]]
- [[Power harness]]
- [[Bus bar‎]]



[[Power supply‎]]
- [[VI conversion]]
- [[Voltage regulator‎]]
- [[Linear power supply]]
- [[Switching power supply]]
- [[Buck converter‎]]
- [[Amplifier]]



[[Analog]]
- [[Digital]]
- [[Hardware]]
- [[Gate]]
- [[Logic]]
- [[Registered]]



[[Programmable Logic Array]]
- [[Programmable Array Logic]]
- [[Gate array]]
- [[‎Field-programmable gate array]]



[[Gray code]]
- [[Positive logic]]
- [[Negative logic]]
- [[‎Wired-OR]]
- [[Serial]]
- [[Parallel]]
- [[Transceiver]]



[[Encoding]]
- [[Frequency Modulation‎]]
- [[Modified Frequency Modulation‎]]
- [[Non Return to Zero]]
- [[Non Return to Zero Inverted]]
- [[Phase Encoding]]
- [[Group Coded Recording]]



[[Bit stuffing]]
- [[Run-length limited coding]]



[[Real-time]]
- [[Synchronous]]
- [[Asynchronous]]
- [[Meta-stability]]
- [[Synchronizer]]
- [[Arbiter]]
- [[Clock]]



[[Logic family]]
- [[Resistor-transistor logic‎]]
- [[Diode-transistor logic‎]]
- [[Transistor-transistor logic‎]]
- [[Open collector]]
- [[Emitter-coupled logic]]
- [[Tri-state]]
- [[74 series]]



[[Plug-board]]
- [[Wire-wrap]]
- [[Printed circuit board]]
- [[Etch]]
- [[Trace]]
- [[Chip socket‎]]
- [[‎DIP switch]]
- [[Surface mount]]



[[Jumper]]
- [[Berg connector]]
- [[Flat cable]]
- [[Flexprint cable‎‎]]
- [[Over the back‎]]
- [[Cabinet]]


===Hardware===


[[Computing device]]
- [[Analog computer]]
- [[Serial computer]]
- [[Parallel computer]]



[[Notable early computing devices]]
- [[‎Bell Telephone Laboratories relay computing devices]]
- [[Automatic Sequence Controlled Calculator]]
- [[Colossus]]
- [[‎Atanasoff-Berry Computer]]



[[ENIAC]]
- [[Atanasoff-Mauchly controversy]]
- [[Selective Sequence Electronic Calculator]]



[[Data path]]
- [[Hardware port]]
- [[Address bus]]
- [[Data bus]]
- [[Front panel‎]]
- [[Switch register‎]]



[[Inverter]]
- [[Flip-flop]]
- [[Register]]
- [[Shift register]]
- [[Register file]]
- [[‎Counter]]
- [[Buffer]]
- [[First-In First-Out buffer]]
- [[Ring buffer]]



[[Adder]]
- [[Arithmetic logic unit‎]]
- [[Central Processing Unit]]
- [[Bus Address Register]]
- [[Moby]]



[[Instruction]]
- [[Operation code]]
- [[Fetch]]
- [[Execute]]
- [[Single-step]]
- [[Instruction set]]
- [[‎Instruction set architecture]]



[[Program Counter]]
- [[Instruction Register]]
- [[Processor Status Word]]
- [[Condition codes]]



[[Index register]]
- [[General register]]
- [[Pointer]]
- [[Stack]]
- [[Stack Pointer]]
- [[Array]]
- [[Random access]]



[[Pipeline]]
- [[Superscalar‎]]
- [[Vector processing]]
- [[Out-of-order execution‎‎]]
- [[Register renaming‎]]



[[Co-processor‎‎]]
- [[Floating point processor]]
- [[Floating point accelerator]]
- [[Multi-processor]]
- [[Channel]]
- [[Front end]]



[[Interrupt]]
- [[Interrupt vector]]
- [[Trap]]



[[Microcode]]
- [[Firmware]]



[[Memory]]
- [[Main memory]]
- [[Access time]]
- [[Cycle time]]
- [[Memory interleaving]]
- [[Cache]]
- [[Content-addressable memory]]
- [[Multi-port memory]]
- [[‎Shared memory]]



[[Plug compatible]]
- [[Backward compatibility‎]]
- [[Program compatible]]



[[Repairing un-documented MOS memory boards]]


===Architecture===


[[‎Input]]
- [[‎Output]]
- [[Input/output]]
- [[Peripheral]]
- [[Device controller]]



[[Segment]]
- [[Memory management‎]]
- [[Base and bounds]]
- [[Protection key‎]]
- [[Bank switching‎]]
- [[Swapping]]



[[Physical address]]
- [[Virtual address]]
- [[Virtual memory]]
- [[Page table‎]]
- [[Page fault]]
- [[Single-level store]]



[[Jump]]
- [[Conditional branch]]
- [[Control flow]]
- [[Loop]]
- [[Subroutine]]
- [[No-op]]
- [[Halt]]



[[Object code]]
- [[Absolute address]]
- [[Relocatable binary]]
- [[Symbol table]]



[[Load-store architecture]]
- [[Reduced Instruction Set Computer]]
- [[Complex Instruction Set Computer]]
- [[Extended Arithmetic Element]]
- [[Commercial Instruction Set]]



[[Bootstrap]]
- [[Diagnostic]]
- [[Device driver]]
- [[Program compatible]]
- [[Simulator]]
- [[Emulator]]



[[Programmed I/O]]
- [[Direct Memory Access]]
- [[Bus grant]]
- [[Bus request line]]
- [[Bus grant line]]



[[Supercomputer]]
- [[Mainframe]]
- [[Minicomputer]]
- [[Workstation]]
- [[Microcomputer]]



[[Microcontroller]]
- [[Microprocessor]]
- [[Motherboard‎‎]]
- [[Daughter-board]]



[[Embedded system‎]]
- [[Personal computer]]
- [[Smart-phone]]

‎
===Devices===


[[Delay line]]
- [[Williams tube]]
- [[Core memory]]
- [[Static RAM]]
- [[Dynamic RAM]]
- [[Memory refresh]]



[[Secondary storage]]
- [[Mass storage]]
- [[Magnetic storage]]
- [[Drive]]
- [[Head]]



[[Drum]]
- [[Disk]]
- [[Fixed-head disk‎]]
- [[‎Removable-pack disk]]
- [[Non-removable-media disk]]
- [[RAID]]
- [[Fibre Channel]]



[[Magnetic tape]]
- [[Magnetic tape drive]]
- [[Magnetic tape controller]]



[[Punched card]]
- [[Paper tape]]
- [[Printer]]
- [[Electrostatic printer]]
- [[Laser printer]]



[[Terminal]]
- [[Keyboard]]
- [[Printing terminal]]
- [[Distribution panel]]
- [[Teletype]]
- [[‎Flexowriter]]
- [[Joystick]]
- [[Mouse]]



[[Data communication‎‎]]
- [[Communication link‎]]
- [[Baud rate]]
- [[Modem]]
- [[Half-duplex]]
- [[Full-duplex]]
- [[Dial-up]]



[[Serial line]]
- [[Asynchronous serial line]]
- [[Synchronous serial line]]
- [[Sync character‎‎]]
- [[Universal Asynchronous Receiver/Transmitter]]
- [[Serial interface]]



[[20mA current loop serial line interface]]
- [[EIA RS-232 serial line interface]]
- [[EIA RS-422 serial line interface]]
- [[EIA RS-423 serial line interface]]
- [[ITU V.35 serial line interface]]



[[Synchronous Data Link Control]]
- [[High-Level Data Link Control]]



[[Packet radio]]



[[Display]]
- [[Cathode ray tube]]
- [[Raster]]
- [[Resolution]]
- [[Display refresh]]
- [[Video terminal]]
- [[Video display]]
- [[Graphics terminal]]



[[Light pen]]
- [[Cursor]]
- [[Graphics]]
- [[Character generator]]
- [[Vector graphics]]
- [[Display program‎]]
- [[Bit-mapped display]]
- [[Pixel]]



[[Parallel interface]]
- [[SCSI]]
- [[Line time clock‎]]
- [[Real-time clock‎]]


===Software===


[[Bit]]
- [[Byte]]
- [[Word]]
- [[Octet]]
- [[Character]]



[[Binary]]
- [[One's complement‎]]
- [[Two's complement‎]]
- [[Binary-coded decimal]]
- [[Bi-quinary‎]]
- [[Decimal]]
- [[‎Multiple precision]]
- [[Floating point]]



[[SIXBIT]]
- [[RADIX-50]]
- [[ASCII]]
- [[Extended Binary Coded Decimal Interchange Code]]
- [[ASCIZ]]



[[Multi-media]]
- [[Font]]



[[Gray code]]
- [[Parity]]
- [[Checksum]]
- [[Cyclic redundancy check‎]]
- [[Error-correcting code]]



[[Software]]
- [[Program]]
- [[Self-modifying code‎]]
- [[Pure code]]
- [[Optimum programming]]



[[Programmer]]
- [[Debug]]
- [[Backup]]



[[Statement]]
- [[Conditional]]
- [[Exception]]
- [[Condition handler]]
- [[Unwind]]



[[Stack frame]]
- [[Call stack]]
- [[Local variable]]
- [[Scope]]
- [[Structure]]
- [[List]]



[[Programming language]]
- [[‎High-level language]]
- [[Source code]]
- [[Assembly language]]
- [[Macro]]
- [[‎Conditional assembly]]



[[Overlay]]
- [[Debugger]]
- [[Compiler]]
- [[Cross-compiler]]
- [[Interpreter]]
- [[Threaded code]]



[[Subroutine package]]
- [[Library]]
- [[Run-time system]]
- [[Run-time library‎]]
- [[Operating environment]]
- [[Application Programming Interface]]



[[Parser]]
- [[Garbage collection]]
- [[Object-oriented‎‎]]



[[Job]]
- [[Process]]
- [[Thread]]
- [[Task]]
- [[System call]]
- [[Scheduler]]



[[Batch operating system]]
- [[Disk operating system]]
- [[Single-tasking]]
- [[Multi-tasking]]
- [[Time-sharing]]
- [[Real-time system]]
- [[Virtual machine]]



[[Kernel]]
- [[Microkernel]]
- [[Hypervisor‎]]
- [[Kernel process]]



[[Record]]
- [[File]]
- [[File system]]
- [[Directory]]
- [[Hard link]]
- [[Byte stream‎]]
- [[Pipe]]
- [[Flow control]]



[[User interface]]
- [[Graphical user interface]]
- [[Window]]
- [[Command processor]]
- [[Daemon]]
‎- [[Spooler]]



[[Application]]
- [[Editor]]
- [[Text editor]]
- [[Screen editor]]
- [[Image editor‎]]
- [[Word processor]]
- [[Database]]



[[Portable]]
- [[Software port]]
- [[Open source]]


===DEC hardware===


[[DEC engineering drawing numbers]]
- [[DEC part number]]s
- [[DEC edge connector contact identification]]
- [[DEC alphabet]]
- [[MicroNote]]



[[System Module]]
- [[FLIP CHIP details]]
- [[DEC card form factor]]
- [[System unit]]



[[H960 rack]]
- [[BA123 Enclosure]]
- [[BA213 Enclosure]]
- [[DEC mounting boxes]]
- [[BA11 mounting boxes]]
- [[DEC indicator panel]]



[[BA11-A mounting box]]
- [[BA11-C Mounting Box]]
- [[BA11-D Mounting Box]]
- [[BA11-E Mounting Box]]
- [[BA11-F Mounting Box]]
- [[BA11-K mounting box]]
- [[BA11-L mounting box]]
- [[BA11-P card cage]]



[[BA11-M mounting box]]
- [[BA11-N mounting box]]
- [[BA11-S mounting box]]



[[‎SC008 Star Coupler]]



[[Remote Switching Control Bus‎]]
- [[861 Power Controller]]



[[DEC standard power wire colour coding]]
- [[DEC power distribution connectors]]



[[H720 Power Supply]]
- [[H742 Power Supply]]
- [[H765 Power System]]
- [[H777 Power Supply‎]]
‎- [[H780 power supply]]
- [[‎H786 power supply]]
- [[‎H7861 power supply]]
- [[DEC Power Line Monitor]]



[[DEC standard modular regulators‎]]
- [[H744 +5V Regulator]]
- [[H745 -15V Regulator]]
- [[H754 +20V, -5V Regulator]]


===DEC peripherals===


[[MASSBUS]]
- [[M-bus]]
- [[Standard Drive Bus]]
- [[‎Low End System Interconnect]]
- [[‎Standard Tape Interconnect]]
- [[System Communication Architecture]]



[[Computer Interconnect]]



[[ReGIS]]



[[DECtape]]
- [[LINC tape]]



[[TU16 Tape Transport]]
- [[TU20 Tape Transport]]
- [[‎TU30 Magnetic Tape Transport]]
- [[TU40]]
- [[TU41]]
- [[TU70 Magnetic Tape Drive]]
- [[TU71 Magnetic Tape Drive]]
- [[TU72 Magnetic Tape Drive]]
- [[‎TU77 Magnetic Tape Transport]]
- [[‎TU-79 Tape Transport]]
- [[TU79 Magnetic Tape Transport]]



[[TE16 DECmagtape Transport]]
- [[TS03 DECmagtape Transport]]
- [[TS04 Tape Transport]]
- [[TS05 Tape Transport]]



[[TA78 Magnetic Tape Drive]]
- [[‎TA79 Magnetic Tape Drive]]
- [[TA81 Streaming Tape Unit]]



[[TM78 Magnetic Tape Formatter]]
- [[TX01 Magnetic Tape Controller]]
- [[TX02 Magnetic Tape Controller]]



[[HSC50 Hierarchical Storage Controller]]
- [[‎HSC70 Mass Storage Server]]



[[RS08 disk drive]]
- [[RS64 disk drive]]
- [[RS03/04 disk drive]]



[[RK02/03 disk drive]]
- [[RP01 disk drive]]
- [[RP02 disk drive]]
- [[RP03 disk drive]]
- [[RP04 disk drive]]
- [[RX01/02 floppy drive]]



[[‎RC25 disk drive]]
- [[‎R80 Disk Drive]]
- [[RA71 disk drive]]
- [[RA72 disk drive]]
‎- [[RA73 disk drive]]



[[RZ35 disk drive]]
- [[RZ55 disk drive]]



[[PC04/PC05 High-Speed Paper-Tape Reader/Punch]]



[[DEC asynchronous serial line pinout]]



[[VT05 Alphanumeric Display Terminal]]
- [[VT240 Series terminal]]
- [[VT320]]


====UNIBUS====


[[‎UNIBUS and QBUS termination]]
- [[Non-Processor Request and Grant]]
- [[UNIBUS parity‎]]
- [[UNIBUS Device Addresses]]
- [[Floating device address space]]
- [[‎Floating device vectors]]
- [[UNIBUS priority plug]]



[[UNIBUS map]]
- [[BC11A UNIBUS cable‎]]
- [[UNIBUS H854 header pinout]]
- [[DB11-A Bus Repeater]]



[[UNIBUS backplanes]]
- [[DD11 backplanes]]
- [[‎DD11-A backplane]]
- [[DD11-B backplane]]
- [[DD11-C backplane‎]]
- [[DD11-D backplane‎]]
- [[DD11-P backplane‎]]



[[Small Peripheral Controller]]
- [[Modified UNIBUS Device]]
- [[Extended UNIBUS]]



[[G727 grant continuity card]]
- [[G7273 grant continuity card]]
- [[‎M930 UNIBUS terminator]]
- [[M9300 UNIBUS B Terminator]]
- [[M9302 UNIBUS terminator]]
- [[M105 Address Selector]]
- [[M8264 No-SACK Timeout Module]]
- [[UA11 Unibus Analyzer]]



[[UNIBUS memories]]
- [[MM11-B core memory]]
- [[MM11-C core memory]]
- [[MM11-D core memory]]
- [[MM11-E and MM1-F core memories]]
- [[MM11-K core memory]]
- [[MM11-L core memory]]
- [[MM11-U core memory]]
- [[MM11-W core memory]]
- [[MM11-Y core memory]]



[[M7259 Parity Control Module]]
- [[M7850 parity controller]]



[[MS11 32KB MOS memory]]
- [[MS11-L MOS memory‎‎]]
- [[MS11-M MOS memory‎‎]]
- [[MS11-P MOS memory]]
- [[Extended UNIBUS memories]]



[[UNIBUS boot ROMs]]
- [[BM792 ROM]]
- [[BM873 ROM]]
- [[M9301 ROM]]
- [[M9312 ROM]]



[[DA11-B DMA UNIBUS Link]]
- [[DA11-F UNIBUS Window]]
- [[DW11 UNIBUS-to-LSI-11 Bus Converter]]
- [[DX11-B System 360/370 Channel to PDP-11 Unibus Interface]]



[[KW11-L Line Time Clock]]
- [[‎KW11-P Programmable Real-Time Clock]]
- [[‎KW11-W Watchdog Timer]]



[[KG11-A Exclusive-OR and CRC Block Check Option]]



[[RH11 MASSBUS controller]]



[[RC11 disk controller]]
- [[RK11-C disk controller]]
- [[RP11 disk controller]]
- [[RL11 disk controller]]
- [[RX11 floppy disk controller]]
- [[RX211 floppy disk controller‎]]



[[TC11 DECtape controller]]
- [[TM11 magtape controller]]
- [[TM02 magtape controller]]
- [[TM03 magtape controller]]



[[VT11 Graphic Display Processor]]
- [[VS11 Graphic System]]
- [[VS100]]



[[IMP11-A ARPANET interface‎‎]]
- [[IMP11-B ARPANET Interface]]
- [[‎ANTS/ISI IMP Interface]]
- [[‎LH-DH/11 Local/Distant Host Controller]]
- [[‎VDH/11 Very Distant Host Controller]]
- [[Stanford 1822 Interface]]
- [[UNIBUS Experimental Ethernet interface‎]]
- [[Interlan NI1010A/NI2010A Ethernet interface]]



[[DR11 parallel interface]]
- [[DR11-A General Device Interface]]
- [[DR11-B parallel interface]]
- [[DR11-C general device interface]]
- [[DR11-K parallel interface]]
- [[DR11-L general-purpose interface]]
- [[DR11-M general-purpose interface]]
- [[DR11-W Direct Memory Access Interface]]



[[KL11 Teletype Control‎]]
- [[DL11-W serial line unit/real-time clock option]]
- [[DL11 asynchronous serial line interface]]
- [[DC11 asynchronous serial line interface]]
- [[DH11 asynchronous serial line interface]]
- [[DJ11 Asynchronous 16-Line Multiplexer]]
- [[DM11 Asynchronous 16-line Single-Speed Multiplexer]]
- [[DHU11 asynchronous serial line interface]]



[[‎DM11-BA Modem Control Multiplexor]]
- [[DM11-BB Modem Control Option]]
- [[DM11 distribution panel]]
- [[DN11 Automatic Calling Unit Interface]]
- [[DF11 Communications Line Adapter]]



[[DP11-A Synchronous Line Interface‎‎]]
- [[‎DS11 Multiple Line Synchronous Interface]]
- [[‎DU11 synchronous serial line interface]]
- [[DUP11 synchronous serial line interface]]
- [[DQ11 NPR Synchronous Line Interface]]
- [[‎DV11 Communications Multiplexer]]
- [[DMP11 Synchronous Controller]]
- [[‎DMR11 Synchronous Controller]]



[[PC11 High-Speed Paper-Tape Reader/Punch Control]]
- [[CD11 High-Speed Punched Card Reader Control Unit]]
- [[CR11 Controller]]
- [[MIT UNIBUS XGP interface]]
- [[Knight TV system]]


====QBUS====


[[DMA Request and Grant]]
- [[CD interconnect]]
- [[Private Memory Interconnect]]



[[QBUS backplanes]]
- [[QBUS peripherals]]
- [[LSI-11 Bus interface chips]]
- [[Upgrading QBUS backplanes]]



[[H9270 backplane]]
- [[‎H9273 backplane]]
- [[H9276 backplane]]
- [[TEV11 Terminator]]
- [[M9047 grant continuity card]]



[[QBUS memories]]
- [[PMI memories]]
- [[MMV11-A QBUS core memory|MMV11-A]]
- [[MSV11-A static MOS memory]]
- [[MSV11-B MOS memory]]
- [[MSV11-C MOS memory]]
- [[MSV11-L MOS Random-Access Memory]]
- [[MSV11-P MOS Random-Access Memory]]
- [[MSV11-M QBUS memory]]
- [[MSV11-Q QBUS memory]]
- [[MSV11-R memory module]]
- [[CMV-504|CMV-[25]xx]]
- [[CMV-4000|CMV-[14]000]]
- [[MK8022]]
- [[National Semiconductor NS23M]]
- [[National Semiconductor NS23C]]
- [[Q-RAM 11]]



[[QBUS ROMs]]
- [[‎REV11 DMA Refresh/Bootstrap/Terminator]]
- [[BDV11 Bus Terminator/ROM‎]]
- [[MRV11-A Read-Only Memory Module]]
- [[‎MRV11-B UV PROM-RAM Memory Module]]
- [[MRV11-C Read-Only Memory Module]]
- [[MRV11-D Universal Programmable Read-Only Memory]]



[[KDA50 disk controller]]
- [[KFQSA]]



‎[[TSV05 Tape Transport Subsystem]]



[[VSV11 Graphic System]]



[[DRV11 Parallel Line Unit]]
- [[DRV11-B Direct Memory Access Interface]]
- [[DRV11-J High-Density Parallel Interface]]
- [[DRV11-WA General Purpose DMA Interface]]



[[QBUS asynchronous serial interfaces]]
- [[DLV11 asynchronous serial line interface]]
- [[DLV11-E asynchronous serial line interface]]
- [[DLV11-F asynchronous serial line interface]]
- [[DLV11-J asynchronous serial line interface]]
- [[DZV11 asynchronous serial line interface]]
- [[DZQ11 asynchronous serial line interface]]
- [[DHV11 asynchronous serial line interface]]
- [[DHQ11 asynchronous serial line interface]]



[[DMV11 Synchronous Controller]]
- [[DPV11 synchronous serial line interface]]
- [[DUV11 Line Interface]]



[[MLH-DH/LSI11 Multiple Channel Controller]]
- [[‎Digital ETHERNET Q-Bus Network Adapter]]
- [[DIGITAL Ethernet Local-Area-Network to Q-bus Adapter]]



[[MXV11-A Multifunction Option Module]]
- [[MXV11-B Multifunction Option Module]]


===DEC machines===


[[List of Programmed Data Processors]]
- [[PDP-4]]
- [[PDP-9]]
- [[PDP-1-X]]
- [[PDP-X]]



[[Three cycle data break]]



[[KLESI Low-End Storage Interconnect]]



[[PDP-15]]
- [[UNICHANNEL 15 System]]
- [[MX15-A Memory Bus Multiplexer]]
- [[MX15-B Memory Multiplexer]]


====PDP-8's====


[[LINC]]
- [[LINC-8]]
- [[PDP-8/S]]
- [[PDP-8/L]]
- [[PDP-8/A]]
- [[PDP-12]]



[[OMNIBUS]]
- [[‎PDP-8 Memory Extension units]]
- [[FPP8/A Floating Point Processor]]
- [[MM8-E Memory System]]



[[RF08 disk controller]]
- [[DF32 disk controller]]
- [[RL8-A disk controller]]



[[TC01 DECtape Control]]
- [[TC08 DECtape Controller]]
- [[‎TD8-E Simple DECtape Control]]


====PDP-10's====


[[PDP-10 Memory Bus]]
- [[PDP-10 I/O Bus]]



[[PDP-6]]
- [[KA10]]
- [[KI10]]
- [[KL10]]
- [[KS10]]



[[MCA20 Cache]]
- [[MCA25 KL Cache/Paging Upgrade]]
- [[DMA20 Memory Bus Adapter‎]]
- [[DIA20 IBus Adapter‎]]
- [[DTE20 Ten-Eleven Interface‎]]



[[‎BBN Pager]]
- [[‎SC-40]]



[[PDP-10 memories‎‎]]
- [[MA10 core memory]]
- [[MB10 core memory]]
- [[MD10 core memory]]
- [[ME10 core memory]]
- [[MF10 core memory]]
- [[MG10 core memory]]
- [[MH10 core memory]]



[[MA20 core memory]]
- [[MB20 core memory]]
- [[MF20 MOS memory]]
- [[MG20 MOS memory]]



[[DF10 Data Channel‎]]
- [[‎DX10 Data Channel]]
- [[MX10 Memory Multiplexer]]



[[RH10 MASSBUS controller‎]]
- [[DX20 Programmed Device Adapter]]



[[DA10 Twelve- and Eighteen-Bit Computer Interface]]



[[CI20 Computer Interconnect]]
- [[‎NIA20 Network Interconnect Adapter]]



[[‎DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem]]



[[RP10 disk controller]]



[[TD10 DECtape Control]]



[[RIM10B Loader]]


====PDP-11's====


[[PDP-11 Extended Instruction Set]]
- [[FP11 floating point]]
- [[FIS floating point]]
- [[PDP-11 Commercial Instruction Set]]
- [[PDP-11 Memory Management]]
- [[PDP-11 stacks]]
- [[PDP-11 family differences appendix]]



[[KA11 CPU]]
- [[KC11 CPU]]
- [[KY11-A Programmer's Console‎‎]]



[[‎KS11 Memory Protection and Relocation option]]
- [[KT11-B Paging Option]]
- [[KA11 changes for the KT11-B]]
- [[KT11-B Technical Manual]]
- [[KT11-B Major State circuitry]]



[[PDP-11/05]]
- [[PDP-11/40E]]
- [[PDP-11/34A]]
- [[PDP-11/74]]



[[KB11-A CPU]]
- [[KB11-B CPU]]
- [[KB11-C CPU]]
- [[KB11-D CPU]]



[[KD11-A CPU]]
- [[KD11-B CPU]]
- [[KD11-D CPU]]
- [[KD11-E CPU]]
- [[KD11-EA CPU]]
- [[KD11-K CPU‎]]
- [[KD11-Z CPU]]
- [[KD11-E/EA microcode]]



[[KY11 consoles]]
- [[‎KY11-D Programmer's Console]]
- [[KY11-J Programmer's Console]]
- [[KY11-LA Operator's Console]]
- [[KY11-LB Programmer's Console]]
- [[KY11-L to CPU interface]]
‎- [[KY11-P programmer's console]]



[[KE11-E Extended Instruction Set]]
- [[KT11-C Memory Management Unit]]
- [[KT11-D Memory Management Unit]]
- [[KJ11-A Stack Limit Register]]



[[KE11-F Floating Instruction Set]]
- [[FP11-A Floating-Point Processor]]
- [[FP11-B Floating-Point Processor]]
- [[FP11-C Floating-Point Processor]]
- [[FP11-E Floating Point Processor]]
- [[FP11-F Floating-Point Processor]]



[[KE11-A Extended Arithmetic Element]]
- [[KE11-B Extended Arithmetic Element]]



[[‎KE44-A Commercial Instruction Set Processor]]



[[KK11-A Cache Memory]]
- [[KK11-B Cache Memory]]



[[KDJ11 PMI/UNIBUS backplane]]
- [[KM11-A Maintenance Set]]



[[MS11 Semiconductor Memory System]]
- [[MJ11 memory system]]
- [[MK11 memory system]]
- [[MS11-K MOS memory]]



[[LSI-11 chip set‎‎]]
- [[LSI-11 CPUs]]
- [[LSI-11]]
- [[LSI-11/2]]
- [[KEV11-B Extended Instruction Set‎]]
- [[KEV11-C Commercial Instruction Set‎]]
- [[KUV11 Writeable Control Store‎]]



[[T-11 chip]]



[[F-11 chip set]]
- [[KDF11 CPUs]]
- [[KDF11-U CPU]]
- [[KDF11-U CPU pinout]]
- [[KTF11-A memory management chip]]
- [[KEF11-A floating point chip]]
- [[KEF11-B‎ CIS chip]]
- [[FPF11 floating point processor‎]]
- [[KT24 UNIBUS map option]]



[[FPJ11 floating point accelerator]]
- [[KDJ11 CPUs]]
- [[KDJ11-B CPU]]
- [[KDJ11-D CPU]]
- [[KDJ11-E CPU]]
- [[KTJ11-B UNIBUS adapter]]
- [[PDP-11/83]]



[[QBUS CPU ODT‎‎]]



[[RH70 MASSBUS controller]]
- [[‎ML11 MOS Memory System]]



[[Able ENABLE]]
- [[Able UNIVERTER]]



[[PDP-11 Bootstrap Loader]]
- [[PDP-11 Absolute Loader]]



[[DEC bootstrap device codes]]


====VAXen====


[[VAXserver]]
- [[VAXstation]]



[[Synchronous Backplane Interconnect]]
- [[‎CPU/Memory Interconnect]]
- [[VAX Bus Interconnect]]
- [[‎Laser System Bus]]



[[KA780 CPU‎]]
- [[‎FP780 Floating-Point Accelerator]]
- [[MS780 Memory System]]
- [[‎MA780 Multiport Memory Option]]
- [[‎‎DW780 Unibus Adapter]]
- [[RH780 Massbus Adapter]]
- [[DR780 High-Performance Channel Interface]]
- [[CI780 Computer Interconnect Adapter]]



[[KA750 CPU]]
- [[FP750 Floating-Point Accelerator]]
- [[‎DW750 Second Unibus Interface]]
- [[UI750 Unibus Interface]]
- [[DR750 General Purpose Interface]]



[[‎KA730 CPU]]



[[‎KA820 CPU]]



[[‎VAX 8600 series]]
- [[‎VAX 10000 series]]



[[‎VAXstation I]]
- [[VAXstation 3100 series]]
- [[‎KD32 CPU]]



[[VAXserver 3100 series]]
- [[‎VAXserver 3300/3400]]
- [[VAXserver 3500/3600]]
- [[VAXserver 4000 series‎]]
- [[VAXserver 4000 Model 300]]



[[‎DR32 Device Interconnect]]
- [[Hierarchical Storage Controller]]


====Alphas====


[[DEC 4000 AXP series]]


===Other manufacturers===


[[Texas Instruments]]
- [[Fairchild Semiconductor]]
- [[Intel]]
- [[MIPS]]



[[Systems Concepts]]
- [[Able Computer]]
- [[‎Storage Technology Corporation]]
- [[‎Century Data Systems]]
- [[Seagate Technology]]
- [[Advanced Computer Communications]]



[[Eckert-Mauchly Computer Corporation]]
- [[Remington Rand Univac]]
- [[Remington Rand]]
- [[Sperry Rand‎]]
- [[‎Unisys]]
‎- [[Engineering Research Associates]]
- [[Control Data Corporation]]
- [[‎Burroughs]]



[[Systems Engineering Laboratories]]
- [[Gould Electronics]]
- [[‎Berkeley Computer Corporation]]
- [[Data General]]



[[Leo Computers]]
- [[Elliott Brothers]]
- [[English Electric Computers]]
- [[EMI Electronics]]
- [[GEC Computers]]
- [[International Computers and Tabulators]]
- [[International Computers Limited]]
- [[MICRAL]]



[[‎Symbolics]]
- [[Datapoint]]
- [[‎Interdata]] ‎
- [[‎Compaq]]
- [[NeXT Computer, Inc]]



[[Cisco]]



[[Valid Logic Systems]]



[[CompuServe]]
- [[Tymshare]]
- [[GeoCities]]
- [[America Online]]


===Non-DEC machines===




[[Automatic Computing Engine]]
- [[Pilot ACE]]
- [[DEUCE]]



[[Manchester Baby]]
- [[Manchester Mark I]]
- [[Ferranti Mark 1]]



[[Atlas]]
- [[GEC 4000 Series]]



[[EDVAC]]
- [[‎IAS computer]]
- [[Whirlwind]]
- [[Memory Test Computer]]
- [[Semi-Automatic Ground Environment]]
- [[AN/FSQ-7]]



[[UNIVAC I]]
- [[LGP-30]]
- [[Bendix G-15]]
- [[Packard Bell PB 250]]
- [[Series 16]]
- [[Series 16 instructions]]



[[Burroughs B5000‎]]
- [[CDC 6400]]
- [[CDC 6600‎]]
- [[ILLIAC IV]]



[[‎GE 600 series]]
- [[GE-635]]
- [[GE-645]]
- [[Honeywell 6000 series‎‎]]



[[IBM 604]]
- [[IBM 650]]
- [[IBM 700 series]]
- [[IBM 701]]
- [[IBM 704]]
- [[IBM 709]]



[[‎IBM 1401]]
- [[IBM 1620]]
- [[IBM 7000 series]]
- [[IBM 7030 Stretch]]
- [[IBM 7070]]
- [[IBM 7090]]
- [[IBM 7094]]



[[Standard Modular System‎]]
- [[‎IBM I/O channel]]



[[Data General Nova 3]]



[[‎CalComp Model 215 Disk Drive]]
- [[Trident disk drives]]



[[Xerox Graphics Printer]]
- [[Xerox 860 Information Processing System]]
- [[Xerox Alto]]
- [[Alto-1822 Interface]]
- [[Dover]]



[[CONS]]
- [[CADR]]
- [[SUN workstation]]
- [[Sun-1]]



[[KENBAK-1]]
- [[Datapoint 2200]]



[[‎MICRAL N]]
- [[‎Altair 8800]]
- [[IMSAI 8080]]
- [[‎Sol-20]]
- [[Apple IIc]]
- [[Apple IIGS]]
- [[IBM PC‎]]
- [[IBM-compatible PC]]



[[Lear Siegler ADM-3A]]
- [[Term-Mite ST Smart Terminal]]



[[Extended Industry Standard Architecture]]
- [[Micro Channel architecture]]
- [[Peripheral Component Interconnect]]
- [[Storage Module Device]]
- [[‎VERSAbus]]
- [[‎Universal Serial Bus]]


===Chips===


[[Intel 1103]]



[[Intel 8085]]
- [[Intel x86]]
- [[Intel 80486‎]]
- [[Intel Pentium]]
- [[‎Am29000]]



[[Real mode‎]]
- [[Protected mode‎]]
- [[Triple fault]]



[[Motorola M68000 Family]]
- [[Motorola MC68000]]
- [[Motorola MC68030]]
- [[Motorola MC68040]]
- [[Motorola MC68060]]



[[National Semiconductor NS405 and NS455 Terminal Management Processor]]


===UNIX===


[[UNIX Second Edition]]
- [[UNIX Third Edition]]
- [[UNIX Fourth Edition]]



[[UNIX file system]]
- [[Repairing early UNIX file systems]]



[[UNIX V6 internals]]
- [[UNIX V6 memory layout]]
- [[UNIX V6 dump analysis‎‎]]
- [[xv6]]



[[Installing UNIX Sixth Edition]]
- [[Upgrading UNIX Sixth Edition]]
- [[Running UNIX V6 on an -11/23]]
- [[Installing UNIX Sixth Edition on Ersatz-11]]
- [[Running an LSI-11 from UNIX V6]]



[[Installing Unix Seventh Edition]]



[[LSX]]
- [[MINI-UNIX]]
- [[CB-UNIX]]
- [[PWB/UNIX]]
- [[‎USG UNIX]]
- [[UNIX/370]]



[[MERT operating system]]



[[Network UNIX]]
- [[Digital UNIX]]



[[2.10BSD]]
- [[2.11BSD]]
- [[4.4BSD]]
- [[BSD Fast File System]]



[[PDP-11 C stack operation]]
- [[UNIX a.out file]]
- [[Typesetter C]]
- [[Standard I/O library]]


===Software systems===


[[Compatible Time-Sharing System]]
- [[OS/360]]
- [[‎CP operating system]]
- [[‎ITS Internals Manual]]
- [[ITS machine configurations]]
- [[TOPS-10]]
- [[TENEX]]
- [[CAL Time-Sharing System]]



[[ELF operating system]]
- [[MOS operating system]]
- [[FAT file system]]



[[MACRO-11]]
- [[Interactive Application System]]
- [[XXDP diagnostic package]]



[[Michigan Algorithm Decoder]]
- [[ALGOL]]
- [[BCPL]]
- [[BLISS]]
- [[B programming language]]
- [[DIBOL]]
- [[FOCAL]]
- [[‎PL/I]]
- [[Java]]



[[Mac OS]]
- [[macOS]]]]



[[‎List of emulators]]
- [[Ersatz-11]]
- [[Bochs]]
- [[PDP11GUI]]



[[Computer-aided design]]
- [[Terminal emulator]]



[[Video game]]
‎- [[Conway's Life]]



[[Interim File System]]



[[X Window System]]
- [[Stanford University Design System]]



[[TJ-2]]
- [[RUNOFF]]
- [[PostScript]]
- [[Sketchpad]]
- [[Vi editor]]
- [[Epsilon]]
- [[Mozilla]]



[[Hello, world]]
- [[PLATO]]
- [[lex]]
- [[flex]]


===Networking===


[[Communication network]]
- [[Data network]]
- [[Circuit-switching]]
- [[Physical network]]
- [[Network interface]]



[[Broadcast]]
- [[Multicast]]



[[Wide area network‎]]
- [[Local area network‎]]
- [[Carrier-Sense Multiple Access with Collision Detection‎‎]]



[[Switching node]]
- [[Gateway]]
- [[Host]]
- [[Client]]
- [[Server]]



[[Routing architecture‎]]
- [[Path selection‎‎]]
- [[Routing table‎]]
- [[Routing loop]]
- [[Link state]]
- [[Routing protocol‎‎]]



[[Packet]]
- [[Datagram]]
- [[Packet switch]]
- [[Internetwork]]
- [[Router]]
- [[Big-endian]]
- [[Little-endian]]



[[Protocol]]
- [[Protocol suite]]
- [[Application protocol]]
- [[Internetworking layer]]
- [[Reliable byte stream‎]]
- [[End to end]]



[[Networking port]]
- [[Connection]]
- [[Sequence number‎]]
- [[Acknowledgement]]
- [[Timeout]]
- [[Retransmission]]
- [[Host table]]



[[International Network Working Group]]
- [[TCP and Internet Meetings]]
- [[‎TCP and IP bake offs]]
- [[Internet Engineering Task Force‎]]



[[1822 interface]]
- [[Network Control Program (ARPANET)]]
- [[Host-to-IMP Protocol‎]]
- [[‎Terminal Interface Processor]]
- [[Terminal Interface Unit]]
- [[Port Expander]]
- [[C Gateway]]



[[Digital Data Communications Message Protocol]]
- [[Packet Radio Network]]
- [[‎Media Access Control Address]]
- [[Address Resolution Protocol]]



[[PARC Universal Packet]]
- [[EFTP]]



[[Internet]]
- [[Internet Protocol]]
- [[User Datagram Protocol‎]]
- [[Transmission Control Protocol]]
- [[Domain Name System]]



[[Interior gateway protocol‎]]
- [[Routing Information Protocol‎]]
- [[Open Shortest Path First‎‎]]
- [[Intermediate System to Intermediate System‎]]



[[Exterior gateway protocol‎‎]]
- [[Autonomous System‎]]
- [[Exterior Gateway Protocol‎‎]]
- [[Border Gateway Protocol‎‎]]
- [[Nimrod]]



[[Telnet]]
- [[File Transfer Protocol‎‎]]
- [[Email]]
- [[Simple Mail Transfer Protocol‎]]
- [[Hypertext Transfer Protocol]]
- [[World Wide Web]]
- [[Browser]]



[[Hypertext]]
- [[Hypertext Markup Language‎‎]]
- [[Network File System]]



[[Request for Comments]]
- [[Internet Experiment Note]]



[[ALOHA System]]
- [[CYCLADES]]
- [[Usenet]]



[[Internet service provider]]
- [[‎Relcom]]
- [[‎Netnews]]
- [[Worm]]


===Other===


[[Computer operator]]
- [[User]]
- [[Multi-user]]
- [[End-user]]



[[Original Equipment Manufacturer]]
- [[Field service‎]]
- [[Engineering Change Order]]



[[Vonada's Engineering Maxims]]
- [[Backronym]]



[[Defense Advanced Research Projects Administration]]
- [[Information Processing Techniques Office]]
- [[Institute for Advanced Study]]
- [[SRI International]]
- [[Augmentation Research Center]]
- [[MITRE]]



[[Research Laboratory of Electronics]]
- [[Lincoln Laboratory]]
- [[Project MAC‎]]
- [[MIT Laboratory for Computer Science]]
- [[MIT Artificial Intelligence Laboratory‎]]
- [[MIT Computer Science and Artificial Intelligence Laboratory]]



[[Stanford University]]
- [[Stanford Artificial Intelligence Laboratory]]
- [[Project GENIE]]



[[Bell Laboratories]]
- [[UNIX Support Group]]
- [[Bell System Technical Journal]]



[[‎Annals of the History of Computing]]
- [[Charles Babbage Institute]]
- [[Computer History Museum]]
- [[Bitsavers]]
- [[1000 BiT]]
- [[Living Computer Museum]]
- [[‎Super Dimension Fortress]]
- [[Computer Conservation Society]]
- [[Centre for Computing History]]



[[IEEE]]
- [[Association for Computing Machinery]]
- [[American Federation of Information Processing Societies]]
- [[Turing Award]]



[[Varian Associates]]
- [[Ampex]]



[[General Electric]]
- [[‎Honeywell]]
- [[Remington Rand]]
- [[Xerox]]



[[Associated Electrical Industries]]
- [[English Electric]]
- [[General Electric Company]]



[[Route 128]]
- [[‎Silicon Valley]]



[[Charles Babbage]]
- [[‎Tommy Flowers]]
- [[Russell and Sigurd Varian]]



[[‎John Vincent Atanasoff]]
- [[J. Presper Eckert]]
- [[John Mauchly]]
- [[Alan Turing]]
- [[John von Neumann]]



[[C. Gordon Bell]]
- [[Seymour Cray]]
- [[Gordon Moore]]
- [[Robert Noyce]]



[[Paul Allen]]
- [[Les Earnest]] ‎
- [[Douglas Engelbart]]
- [[Butler Lampson]]
- [[J. C. R. Licklider]]
- [[Louis Pouzin]]
- [[Dennis Ritchie]]
- [[Jerry Saltzer]]
- [[Ken Thompson]]


==Pages I have substantially upgraded==

===Generic===


[[Dual Inline Package]]
- [[Random Access Memory]]



[[Operating system]]
- [[Symbolic link]]


===DEC===


[[Digital Equipment Corporation]]
- [[FLIP CHIP]]



[[TU10 magtape drive]]
- [[TU56 DECtape Transport]]
- [[TU60 DECasetteTape Transport]]



[[RK05 disk drive]]
- [[RK06/07 disk drive]]
- [[RL01/02 disk drive]]
- [[RM02/03 disk drive]]
- [[RP05 disk drive]]
- [[RP06 disk drive]]
- [[RA60 Disk Drive]]



[[RX33 Flexible Disk Drive]]
- [[RX50 dual-diskette drive]]



[[RA70 disk drive]]
- [[RA80 Disk Drive]]
- [[RA82 disk drive]]
- [[RM80 Disk Drive]]



[[PDP-1]]
- [[PDP-5]]
- [[DECmate]]



[[PDP-8]]
- [[PDP-8/I]]
- [[PDP-8/E]]



[[PDP-10]]
- [[TM10 Magnetic Tape Control]]



[[PDP-11 architecture]]
- [[UNIBUS]]
- [[QBUS]]



[[PDP-11/04]]
- [[PDP-11/05]]
- [[PDP-11/10]]
- [[PDP-11/24]]
- [[PDP-11/34]]
- [[PDP-11/40]]
- [[PDP-11/44]]
- [[PDP-11/45]]
- [[PDP-11/70]]
- [[PDP-11/84]]



[[RF11 disk controller]]
- [[RK11 disk controller]]
- [[RK611 disk controller]]



[[PCL11 Communications System]]
- [[Chaosnet interface]]



[[DZ11 asynchronous serial line interface]]



[[CR11 Card Readers]]



[[M782 Interrupt Control]]



[[KWV11-C programmable real-time clock‎]]



[[KEV11-A floating point]]
- [[KDF11-A CPU]]
- [[KDF11-B CPU]]
- [[J-11 chip set]]
- [[KDJ11-A CPU]]



[[MSV11-D MOS memory]]
- [[MSV11-J memory module]]



[[CXY08 8-Line Asynchronous Multiplexer]]



[[VAX-11/725]]
- [[VAX-11/750]]
- [[MS750 Memory System]]



[[VAX 8250]]
- [[VAX 8350]]
- [[VAX 6000 series]]
- [[VAX 7000 series]]
- [[VAX 9000 series]]



[[MicroVAX I]]
- [[MicroVAX II]]
- [[MicroVAX 3100 series]]
- [[MicroVAX 3500/3600]]



[[VAXstation 3200/3500]]
- [[VAXstation 3520/3540]]
- [[VAXstation 4000 Model 96]]
- [[VAXstation 8000]]



[[VAXft series]]


===Hardware===


[[International Business Machines]]
- [[Computer Control Corporation]]



[[‎VMEbus]]



[[‎SDS Sigma series]]



[[Maxc]]
- [[S-1 supercomputer]]


===Software===


[[Multics]]
- [[Incompatible Timesharing System]]



[[PDP-7 UNIX]]
- [[UNIX First Edition]]
- [[UNIX Sixth Edition]]



[[FORTRAN]]



[[Emacs editors‎‎]]
- [[QED (text editor)]]
- [[What You See Is What You Get]]



[[Spacewar!]]


===Networking===


[[Bridge]]



[[Interface Message Processor]]
- [[ANTS terminal system]]
- [[Ethernet]]
- [[CHAOSnet]]



[[Network Control Protocol]]
- [[TCP/IP]]
- [[Point-to-Point Protocol]]


===Other===


[[Technology Square]]

Virtual address

2025-10-27T11:58:57Z

Jnc: Link to address

A '''virtual address''' is an [[address]] emitted by [[object code|code]] running when it is not running on a 'bare machine' (i.e. the machine is not using a 1:1 correspondence between the addresses used by code running in the [[Central Processing Unit|CPU]], and the actual addresses of [[main memory]], the latter usually referred to as [[physical address]]es).

When running a [[time-sharing]] [[operating system]], the [[memory management]] [[hardware]] provides mapping of memory addresses emitting by code belonging to a [[user]]/[[process]], to protect both the OS itself, and other users/processes, from errors or malicious behaviour.

Originally this protection was provided by '[[base and bounds]] [[register]]s', which allowed the entire memory of a user/process to be relocated into a contiguous block of main memory. Now, [[virtual memory]] is usually used, which provides this protection/relocation as one of its many benefits.

[[Category: CPU Basics]]

User:Jnc

2025-10-27T11:56:20Z

Jnc: /* Pages I have added */ +2

[[Image:jnc.jpg|250px|thumb|right|Me]]

Although I have a wide interest in older computers, I worked with [[PDP-11]]'s ''extremely'' extensively 'back in the day', and consider them perhaps the most elegant [[architecture]] ever devised (the power and flexibility they obtained with only 16-bit wide [[instruction]]s were a revelation when they first appeared), so I started out by focusing on them. I also worked a lot on early [[UNIX]] (whose bang/buck ratio has ''never'' been surpassed, and almost certainly '''never''' will), back when it ''only'' ran on PDP-11's, before it was [[portable]]. (All of that was in the context of my work on the [[Internet]] - and, yes, it '''''is''''' spelled with a 'I'.)

For more about me, see my [http://www.chiappa.net/~jnc home page]. I joined the project here at the end of November, 2015‎‎, and have been working on it ever since. [https://gunkies.org/w/index.php?title=RK11_disk_controller&oldid=11294 This] seems to have been [https://gunkies.org/w/index.php?title=Special:Contributions/Jnc&dir=prev&limit=500&target=Jnc my first edit].

Also, I'm an admin here on the CHWiki, so if there are any admin-type tasks you need doing (e.g. deleting a page with a typo in the name; [https://en.wikipedia.org/wiki/Wikipedia:History_merging merging edit histories]; etc) just drop me a line ('''jnc at alum dot mit dot edu''').

==Prototypes==

"μ" - "·" - "•"

Technical Instruction Reference - Maintenance Installation Service Manual - Pocket Service Guide

Illustrated Parts Breakdown - Engineering Drawings - Field Maintenance Print Set

<nowiki>
'''xxx''' might refer to:
</nowiki>

<nowiki>
{{disambiguation}}
</nowiki>

<nowiki>
 
</nowiki>

==Useful links==

===Here===

* [[Special:Preferences|Preferences]] - includes personal edit count
* [[User:Jnc/Online|Online]] - Index to things I have put online
* [https://gunkies.org/w/index.php?title=User:Jnc&action=purge Purge cache] (edit as appropriate)
* [http://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=Category%3A&namespace=0&hideredirects=1 Category list]
* [https://gunkies.org/wiki/Special:ListUsers?username=&group=&creationSort=1&desc=1&wpsubmit=&wpFormIdentifier=mw-listusers-form&limit=100 New users]
* [[Special:LinkSearch|External links search]]
* [[Special:Log/rights|User rights log]] 
* [[Computer History Wiki:News]]
* [[MediaWiki:Sidebar]]
* [[Special:WhatLinksHere/Template:Stub|Stub articles]]
* [[Special:WhatLinksHere/Template:Semi-stub|Semi-stubs]]
* [[:Category:Disambiguation pages|Disambiguation pages]]
* [[:Category:Pages with broken file links|Pages with broken file links]]
* [[:Category:Wikipedia Content|Wikipedia content]]
* [http://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=Jnc&namespace=2 My pages]
* [[User:Jnc/ToCat|ToCat]]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=Infobox&namespace=10&hideredirects=1 Infobox templates]:
** [[:Template:Infobox Machine|Infobox Machine]]
** [[:Template:Infobox CPU|Infobox CPU]]
** [[:Template:Infobox Disk drive|Infobox Disk drive]]
** [[:Template:Infobox Tape drive|Infobox Tape drive]]
** [[:Template:Infobox Terminal|Infobox Terminal]]
** [[:Template:Infobox Software|Infobox Software]]
** [[:Template:Infobox OS|Infobox OS]]
** [[:Template:Infobox App|Infobox App]]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=16&namespace=10&hideredirects=1 16-bit register templates]:
** [[:Template:16bit-header‎|16bit-header‎]]
** [[:Template:16bit-bitout|16bit-bitout]]
** [[:Template:16bitoctal-bitout‎|16bitoctal-bitout‎]]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=32&namespace=10&hideredirects=1 32-bit register templates]
* [https://gunkies.org/w/index.php?title=Special%3APrefixIndex&prefix=36&namespace=10&hideredirects=1 36-bit register templates]

===External===

* [https://en.wikipedia.org/wiki/Wikipedia:Administrators%27_guide/Granting_and_revoking_user_rights Granting and revoking user rights]
** [[Special:ListGroupRights|List Group Rights]] - on the CHWiki
** [[Special:UserRights|User Rights]] - on the CHWiki
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/ University of Queensland Computer Museum manual collection] - clone at [[Bitsavers]]
* [http://www.bitsavers.org/scandocs.trailing-edge.com/ scandocs.trailing-edge] - a clone of another dead site
* [https://ed-thelen.org/comp-hist/ Antique (lonesome) Computers] - Ed Thelen's awesome history site
** [https://ed-thelen.org/comp-hist/merged.html Documents, Links & Videos]

==Pages I have added==

===Fundamentals===


[[Architecture]]
- [[‎Algorithm]]
- [[Syntax]]
- [[Semantics]]
- [[Identifier]]
- [[Namespace]]
- [[Hierarchy]]



[[Type]]
- [[Normalization]]
- [[Variable]]
- [[Operand]]
- [[Operator]]
- [[Expression]]
- [[Argument]]
- [[Tree]]



[[Computer]]
- [[Arbitration]]
- [[Port]]
- [[Interface]]
- [[Address]]
- [[Address space]]
- [[Mapping]]
- [[Network]]



[[Electric field]]
- [[Magnetic field]]
- [[Electro-magnetic]]
- [[‎Electro-magnetic radiation]]
- [[‎Photon]]
- [[Microwave]]
- [[Magnet]]
- [[Electron]]
- [[Electrostatic]]



[[Conductor]]
- [[Insulator]]
- [[Dielectric]]
- [[Resistor]]
- [[Capacitor]]
- [[Inductor]]
- [[Ground]]
- [[Contact]]
- [[Relay]]
- [[Fuse]]
- [[Circuit breaker]]



[[Current]]
- [[Ampere]]
- [[Voltage]]
- [[Volt]]
- [[Direct current]]
- [[Alternating current]]
- [[Three-phase power]]
- [[Frequency]]
- [[Phase]]
- [[Impedance]]
- [[Transformer]]



[[Circuit]]
- [[Signal]]
- [[Signal return]]
- [[Ground return]]
- [[Propagation delay‎]]



[[Noise]]
- [[Interference]]
- [[Crosstalk]]
- [[‎Coaxial cable]]
- [[Transmission line‎]]
- [[Terminator‎]]
- [[Single-ended signalling‎]]
- [[Differential pair]]
- [[Fiber optic‎‎]]



[[State machine‎]]
- [[Least Recently Used replacement algorithm]]
- [[Recursive acronym]]



[[Oscilloscope‎]]
- [[Logic analyzer]]



[[Radar‎]]


===Components===


[[Chassis]]
- [[Switch]]
- [[Fusible link]]
- [[‎D Subminiature Connector]]



[[Crystal]]
- [[Electronic]]
- [[Vacuum tube]]
- [[Diode]]
- [[Klystron]]
- [[Semiconductor]]
- [[Transistor]]
- [[Laser]]



[[Bipolar]]
- [[Metal Oxide Semiconductor]]
- [[‎Micro-electronics]]
- [[Integrated circuit]]
- [[Liquid-crystal display]]



[[Mounting box]]
- [[Backplane]]
- [[Connector‎]]
- [[Harness]]
- [[Power harness]]
- [[Bus bar‎]]



[[Power supply‎]]
- [[VI conversion]]
- [[Voltage regulator‎]]
- [[Linear power supply]]
- [[Switching power supply]]
- [[Buck converter‎]]
- [[Amplifier]]



[[Analog]]
- [[Digital]]
- [[Hardware]]
- [[Gate]]
- [[Logic]]
- [[Registered]]



[[Programmable Logic Array]]
- [[Programmable Array Logic]]
- [[Gate array]]
- [[‎Field-programmable gate array]]



[[Gray code]]
- [[Positive logic]]
- [[Negative logic]]
- [[‎Wired-OR]]
- [[Serial]]
- [[Parallel]]
- [[Transceiver]]



[[Encoding]]
- [[Frequency Modulation‎]]
- [[Modified Frequency Modulation‎]]
- [[Non Return to Zero]]
- [[Non Return to Zero Inverted]]
- [[Phase Encoding]]
- [[Group Coded Recording]]



[[Bit stuffing]]
- [[Run-length limited coding]]



[[Real-time]]
- [[Synchronous]]
- [[Asynchronous]]
- [[Meta-stability]]
- [[Synchronizer]]
- [[Arbiter]]
- [[Clock]]



[[Logic family]]
- [[Resistor-transistor logic‎]]
- [[Diode-transistor logic‎]]
- [[Transistor-transistor logic‎]]
- [[Open collector]]
- [[Emitter-coupled logic]]
- [[Tri-state]]
- [[74 series]]



[[Plug-board]]
- [[Wire-wrap]]
- [[Printed circuit board]]
- [[Etch]]
- [[Trace]]
- [[Chip socket‎]]
- [[‎DIP switch]]
- [[Surface mount]]



[[Jumper]]
- [[Berg connector]]
- [[Flat cable]]
- [[Flexprint cable‎‎]]
- [[Over the back‎]]
- [[Cabinet]]


===Hardware===


[[Computing device]]
- [[Analog computer]]
- [[Serial computer]]
- [[Parallel computer]]



[[Notable early computing devices]]
- [[‎Bell Telephone Laboratories relay computing devices]]
- [[Automatic Sequence Controlled Calculator]]
- [[Colossus]]
- [[‎Atanasoff-Berry Computer]]



[[ENIAC]]
- [[Atanasoff-Mauchly controversy]]
- [[Selective Sequence Electronic Calculator]]



[[Data path]]
- [[Hardware port]]
- [[Address bus]]
- [[Data bus]]
- [[Front panel‎]]
- [[Switch register‎]]



[[Inverter]]
- [[Flip-flop]]
- [[Register]]
- [[Shift register]]
- [[Register file]]
- [[‎Counter]]
- [[Buffer]]
- [[First-In First-Out buffer]]
- [[Ring buffer]]



[[Adder]]
- [[Arithmetic logic unit‎]]
- [[Central Processing Unit]]
- [[Bus Address Register]]
- [[Moby]]



[[Instruction]]
- [[Operation code]]
- [[Fetch]]
- [[Execute]]
- [[Single-step]]
- [[Instruction set]]
- [[‎Instruction set architecture]]



[[Program Counter]]
- [[Instruction Register]]
- [[Processor Status Word]]
- [[Condition codes]]



[[Index register]]
- [[General register]]
- [[Pointer]]
- [[Stack]]
- [[Stack Pointer]]
- [[Array]]
- [[Random access]]



[[Pipeline]]
- [[Superscalar‎]]
- [[Vector processing]]
- [[Out-of-order execution‎‎]]
- [[Register renaming‎]]



[[Co-processor‎‎]]
- [[Floating point processor]]
- [[Floating point accelerator]]
- [[Multi-processor]]
- [[Channel]]
- [[Front end]]



[[Interrupt]]
- [[Interrupt vector]]
- [[Trap]]



[[Microcode]]
- [[Firmware]]



[[Memory]]
- [[Main memory]]
- [[Access time]]
- [[Cycle time]]
- [[Memory interleaving]]
- [[Cache]]
- [[Content-addressable memory]]
- [[Multi-port memory]]
- [[‎Shared memory]]



[[Plug compatible]]
- [[Backward compatibility‎]]
- [[Program compatible]]



[[Repairing un-documented MOS memory boards]]


===Architecture===


[[‎Input]]
- [[‎Output]]
- [[Input/output]]
- [[Peripheral]]
- [[Device controller]]



[[Segment]]
- [[Memory management‎]]
- [[Base and bounds]]
- [[Protection key‎]]
- [[Bank switching‎]]
- [[Swapping]]



[[Physical address]]
- [[Virtual address]]
- [[Virtual memory]]
- [[Page table‎]]
- [[Page fault]]
- [[Single-level store]]



[[Jump]]
- [[Conditional branch]]
- [[Control flow]]
- [[Loop]]
- [[Subroutine]]
- [[No-op]]
- [[Halt]]



[[Object code]]
- [[Absolute address]]
- [[Relocatable binary]]
- [[Symbol table]]



[[Load-store architecture]]
- [[Reduced Instruction Set Computer]]
- [[Complex Instruction Set Computer]]
- [[Extended Arithmetic Element]]
- [[Commercial Instruction Set]]



[[Bootstrap]]
- [[Diagnostic]]
- [[Device driver]]
- [[Program compatible]]
- [[Simulator]]
- [[Emulator]]



[[Programmed I/O]]
- [[Direct Memory Access]]
- [[Bus grant]]
- [[Bus request line]]
- [[Bus grant line]]



[[Supercomputer]]
- [[Mainframe]]
- [[Minicomputer]]
- [[Workstation]]
- [[Microcomputer]]



[[Microcontroller]]
- [[Microprocessor]]
- [[Motherboard‎‎]]
- [[Daughter-board]]



[[Embedded system‎]]
- [[Personal computer]]
- [[Smart-phone]]

‎
===Devices===


[[Delay line]]
- [[Williams tube]]
- [[Core memory]]
- [[Static RAM]]
- [[Dynamic RAM]]
- [[Memory refresh]]



[[Secondary storage]]
- [[Mass storage]]
- [[Magnetic storage]]
- [[Drive]]
- [[Head]]



[[Drum]]
- [[Disk]]
- [[Fixed-head disk‎]]
- [[‎Removable-pack disk]]
- [[Non-removable-media disk]]
- [[RAID]]
- [[Fibre Channel]]



[[Magnetic tape]]
- [[Magnetic tape drive]]
- [[Magnetic tape controller]]



[[Punched card]]
- [[Paper tape]]
- [[Printer]]
- [[Electrostatic printer]]
- [[Laser printer]]



[[Terminal]]
- [[Keyboard]]
- [[Printing terminal]]
- [[Distribution panel]]
- [[Teletype]]
- [[‎Flexowriter]]
- [[Joystick]]
- [[Mouse]]



[[Data communication‎‎]]
- [[Communication link‎]]
- [[Baud rate]]
- [[Modem]]
- [[Half-duplex]]
- [[Full-duplex]]
- [[Dial-up]]



[[Serial line]]
- [[Asynchronous serial line]]
- [[Synchronous serial line]]
- [[Sync character‎‎]]
- [[Universal Asynchronous Receiver/Transmitter]]
- [[Serial interface]]



[[20mA current loop serial line interface]]
- [[EIA RS-232 serial line interface]]
- [[EIA RS-422 serial line interface]]
- [[EIA RS-423 serial line interface]]
- [[ITU V.35 serial line interface]]



[[Synchronous Data Link Control]]
- [[High-Level Data Link Control]]



[[Packet radio]]



[[Display]]
- [[Cathode ray tube]]
- [[Raster]]
- [[Resolution]]
- [[Display refresh]]
- [[Video terminal]]
- [[Video display]]
- [[Graphics terminal]]



[[Light pen]]
- [[Cursor]]
- [[Graphics]]
- [[Character generator]]
- [[Vector graphics]]
- [[Display program‎]]
- [[Bit-mapped display]]
- [[Pixel]]



[[Parallel interface]]
- [[SCSI]]
- [[Line time clock‎]]
- [[Real-time clock‎]]


===Software===


[[Bit]]
- [[Byte]]
- [[Word]]
- [[Octet]]
- [[Character]]



[[Binary]]
- [[One's complement‎]]
- [[Two's complement‎]]
- [[Binary-coded decimal]]
- [[Bi-quinary‎]]
- [[Decimal]]
- [[‎Multiple precision]]
- [[Floating point]]



[[SIXBIT]]
- [[RADIX-50]]
- [[ASCII]]
- [[Extended Binary Coded Decimal Interchange Code]]
- [[ASCIZ]]



[[Multi-media]]
- [[Font]]



[[Gray code]]
- [[Parity]]
- [[Checksum]]
- [[Cyclic redundancy check‎]]
- [[Error-correcting code]]



[[Software]]
- [[Program]]
- [[Self-modifying code‎]]
- [[Pure code]]
- [[Optimum programming]]



[[Programmer]]
- [[Debug]]
- [[Backup]]



[[Statement]]
- [[Conditional]]
- [[Exception]]
- [[Condition handler]]
- [[Unwind]]



[[Stack frame]]
- [[Call stack]]
- [[Local variable]]
- [[Scope]]
- [[Structure]]
- [[List]]



[[Programming language]]
- [[‎High-level language]]
- [[Source code]]
- [[Assembly language]]
- [[Macro]]
- [[‎Conditional assembly]]



[[Overlay]]
- [[Debugger]]
- [[Compiler]]
- [[Cross-compiler]]
- [[Interpreter]]
- [[Threaded code]]



[[Subroutine package]]
- [[Library]]
- [[Run-time system]]
- [[Run-time library‎]]
- [[Operating environment]]
- [[Application Programming Interface]]



[[Parser]]
- [[Garbage collection]]
- [[Object-oriented‎‎]]



[[Job]]
- [[Process]]
- [[Thread]]
- [[Task]]
- [[System call]]
- [[Scheduler]]



[[Batch operating system]]
- [[Disk operating system]]
- [[Single-tasking]]
- [[Multi-tasking]]
- [[Time-sharing]]
- [[Real-time system]]
- [[Virtual machine]]



[[Kernel]]
- [[Microkernel]]
- [[Hypervisor‎]]
- [[Kernel process]]



[[Record]]
- [[File]]
- [[File system]]
- [[Directory]]
- [[Hard link]]
- [[Byte stream‎]]
- [[Pipe]]
- [[Flow control]]



[[User interface]]
- [[Graphical user interface]]
- [[Window]]
- [[Command processor]]
- [[Daemon]]
‎- [[Spooler]]



[[Application]]
- [[Editor]]
- [[Text editor]]
- [[Screen editor]]
- [[Image editor‎]]
- [[Word processor]]
- [[Database]]



[[Portable]]
- [[Software port]]
- [[Open source]]


===DEC hardware===


[[DEC engineering drawing numbers]]
- [[DEC part number]]s
- [[DEC edge connector contact identification]]
- [[DEC alphabet]]
- [[MicroNote]]



[[System Module]]
- [[FLIP CHIP details]]
- [[DEC card form factor]]
- [[System unit]]



[[H960 rack]]
- [[BA123 Enclosure]]
- [[BA213 Enclosure]]
- [[DEC mounting boxes]]
- [[BA11 mounting boxes]]
- [[DEC indicator panel]]



[[BA11-A mounting box]]
- [[BA11-C Mounting Box]]
- [[BA11-D Mounting Box]]
- [[BA11-E Mounting Box]]
- [[BA11-F Mounting Box]]
- [[BA11-K mounting box]]
- [[BA11-L mounting box]]
- [[BA11-P card cage]]



[[BA11-M mounting box]]
- [[BA11-N mounting box]]
- [[BA11-S mounting box]]



[[‎SC008 Star Coupler]]



[[Remote Switching Control Bus‎]]
- [[861 Power Controller]]



[[DEC standard power wire colour coding]]
- [[DEC power distribution connectors]]



[[H720 Power Supply]]
- [[H742 Power Supply]]
- [[H765 Power System]]
- [[H777 Power Supply‎]]
‎- [[H780 power supply]]
- [[‎H786 power supply]]
- [[‎H7861 power supply]]
- [[DEC Power Line Monitor]]



[[DEC standard modular regulators‎]]
- [[H744 +5V Regulator]]
- [[H745 -15V Regulator]]
- [[H754 +20V, -5V Regulator]]


===DEC peripherals===


[[MASSBUS]]
- [[M-bus]]
- [[Standard Drive Bus]]
- [[‎Low End System Interconnect]]
- [[‎Standard Tape Interconnect]]
- [[System Communication Architecture]]



[[Computer Interconnect]]



[[ReGIS]]



[[DECtape]]
- [[LINC tape]]



[[TU16 Tape Transport]]
- [[TU20 Tape Transport]]
- [[‎TU30 Magnetic Tape Transport]]
- [[TU40]]
- [[TU41]]
- [[TU70 Magnetic Tape Drive]]
- [[TU71 Magnetic Tape Drive]]
- [[TU72 Magnetic Tape Drive]]
- [[‎TU77 Magnetic Tape Transport]]
- [[‎TU-79 Tape Transport]]
- [[TU79 Magnetic Tape Transport]]



[[TE16 DECmagtape Transport]]
- [[TS03 DECmagtape Transport]]
- [[TS04 Tape Transport]]
- [[TS05 Tape Transport]]



[[TA78 Magnetic Tape Drive]]
- [[‎TA79 Magnetic Tape Drive]]
- [[TA81 Streaming Tape Unit]]



[[TM78 Magnetic Tape Formatter]]
- [[TX01 Magnetic Tape Controller]]
- [[TX02 Magnetic Tape Controller]]



[[HSC50 Hierarchical Storage Controller]]
- [[‎HSC70 Mass Storage Server]]



[[RS08 disk drive]]
- [[RS64 disk drive]]
- [[RS03/04 disk drive]]



[[RK02/03 disk drive]]
- [[RP01 disk drive]]
- [[RP02 disk drive]]
- [[RP03 disk drive]]
- [[RP04 disk drive]]
- [[RX01/02 floppy drive]]



[[‎RC25 disk drive]]
- [[‎R80 Disk Drive]]
- [[RA71 disk drive]]
- [[RA72 disk drive]]
‎- [[RA73 disk drive]]



[[RZ35 disk drive]]
- [[RZ55 disk drive]]



[[PC04/PC05 High-Speed Paper-Tape Reader/Punch]]



[[DEC asynchronous serial line pinout]]



[[VT05 Alphanumeric Display Terminal]]
- [[VT240 Series terminal]]
- [[VT320]]


====UNIBUS====


[[‎UNIBUS and QBUS termination]]
- [[Non-Processor Request and Grant]]
- [[UNIBUS parity‎]]
- [[UNIBUS Device Addresses]]
- [[Floating device address space]]
- [[‎Floating device vectors]]
- [[UNIBUS priority plug]]



[[UNIBUS map]]
- [[BC11A UNIBUS cable‎]]
- [[UNIBUS H854 header pinout]]
- [[DB11-A Bus Repeater]]



[[UNIBUS backplanes]]
- [[DD11 backplanes]]
- [[‎DD11-A backplane]]
- [[DD11-B backplane]]
- [[DD11-C backplane‎]]
- [[DD11-D backplane‎]]
- [[DD11-P backplane‎]]



[[Small Peripheral Controller]]
- [[Modified UNIBUS Device]]
- [[Extended UNIBUS]]



[[G727 grant continuity card]]
- [[G7273 grant continuity card]]
- [[‎M930 UNIBUS terminator]]
- [[M9300 UNIBUS B Terminator]]
- [[M9302 UNIBUS terminator]]
- [[M105 Address Selector]]
- [[M8264 No-SACK Timeout Module]]
- [[UA11 Unibus Analyzer]]



[[UNIBUS memories]]
- [[MM11-B core memory]]
- [[MM11-C core memory]]
- [[MM11-D core memory]]
- [[MM11-E and MM1-F core memories]]
- [[MM11-K core memory]]
- [[MM11-L core memory]]
- [[MM11-U core memory]]
- [[MM11-W core memory]]
- [[MM11-Y core memory]]



[[M7259 Parity Control Module]]
- [[M7850 parity controller]]



[[MS11 32KB MOS memory]]
- [[MS11-L MOS memory‎‎]]
- [[MS11-M MOS memory‎‎]]
- [[MS11-P MOS memory]]
- [[Extended UNIBUS memories]]



[[UNIBUS boot ROMs]]
- [[BM792 ROM]]
- [[BM873 ROM]]
- [[M9301 ROM]]
- [[M9312 ROM]]



[[DA11-B DMA UNIBUS Link]]
- [[DA11-F UNIBUS Window]]
- [[DW11 UNIBUS-to-LSI-11 Bus Converter]]
- [[DX11-B System 360/370 Channel to PDP-11 Unibus Interface]]



[[KW11-L Line Time Clock]]
- [[‎KW11-P Programmable Real-Time Clock]]
- [[‎KW11-W Watchdog Timer]]



[[KG11-A Exclusive-OR and CRC Block Check Option]]



[[RH11 MASSBUS controller]]



[[RC11 disk controller]]
- [[RK11-C disk controller]]
- [[RP11 disk controller]]
- [[RL11 disk controller]]
- [[RX11 floppy disk controller]]
- [[RX211 floppy disk controller‎]]



[[TC11 DECtape controller]]
- [[TM11 magtape controller]]
- [[TM02 magtape controller]]
- [[TM03 magtape controller]]



[[VT11 Graphic Display Processor]]
- [[VS11 Graphic System]]
- [[VS100]]



[[IMP11-A ARPANET interface‎‎]]
- [[IMP11-B ARPANET Interface]]
- [[‎ANTS/ISI IMP Interface]]
- [[‎LH-DH/11 Local/Distant Host Controller]]
- [[‎VDH/11 Very Distant Host Controller]]
- [[Stanford 1822 Interface]]
- [[UNIBUS Experimental Ethernet interface‎]]
- [[Interlan NI1010A/NI2010A Ethernet interface]]



[[DR11 parallel interface]]
- [[DR11-A General Device Interface]]
- [[DR11-B parallel interface]]
- [[DR11-C general device interface]]
- [[DR11-K parallel interface]]
- [[DR11-L general-purpose interface]]
- [[DR11-M general-purpose interface]]
- [[DR11-W Direct Memory Access Interface]]



[[KL11 Teletype Control‎]]
- [[DL11-W serial line unit/real-time clock option]]
- [[DL11 asynchronous serial line interface]]
- [[DC11 asynchronous serial line interface]]
- [[DH11 asynchronous serial line interface]]
- [[DJ11 Asynchronous 16-Line Multiplexer]]
- [[DM11 Asynchronous 16-line Single-Speed Multiplexer]]
- [[DHU11 asynchronous serial line interface]]



[[‎DM11-BA Modem Control Multiplexor]]
- [[DM11-BB Modem Control Option]]
- [[DM11 distribution panel]]
- [[DN11 Automatic Calling Unit Interface]]
- [[DF11 Communications Line Adapter]]



[[DP11-A Synchronous Line Interface‎‎]]
- [[‎DS11 Multiple Line Synchronous Interface]]
- [[‎DU11 synchronous serial line interface]]
- [[DUP11 synchronous serial line interface]]
- [[DQ11 NPR Synchronous Line Interface]]
- [[‎DV11 Communications Multiplexer]]
- [[DMP11 Synchronous Controller]]
- [[‎DMR11 Synchronous Controller]]



[[PC11 High-Speed Paper-Tape Reader/Punch Control]]
- [[CD11 High-Speed Punched Card Reader Control Unit]]
- [[CR11 Controller]]
- [[MIT UNIBUS XGP interface]]
- [[Knight TV system]]


====QBUS====


[[DMA Request and Grant]]
- [[CD interconnect]]
- [[Private Memory Interconnect]]



[[QBUS backplanes]]
- [[QBUS peripherals]]
- [[LSI-11 Bus interface chips]]
- [[Upgrading QBUS backplanes]]



[[H9270 backplane]]
- [[‎H9273 backplane]]
- [[H9276 backplane]]
- [[TEV11 Terminator]]
- [[M9047 grant continuity card]]



[[QBUS memories]]
- [[PMI memories]]
- [[MMV11-A QBUS core memory|MMV11-A]]
- [[MSV11-A static MOS memory]]
- [[MSV11-B MOS memory]]
- [[MSV11-C MOS memory]]
- [[MSV11-L MOS Random-Access Memory]]
- [[MSV11-P MOS Random-Access Memory]]
- [[MSV11-M QBUS memory]]
- [[MSV11-Q QBUS memory]]
- [[MSV11-R memory module]]
- [[CMV-504|CMV-[25]xx]]
- [[CMV-4000|CMV-[14]000]]
- [[MK8022]]
- [[National Semiconductor NS23M]]
- [[National Semiconductor NS23C]]
- [[Q-RAM 11]]



[[QBUS ROMs]]
- [[‎REV11 DMA Refresh/Bootstrap/Terminator]]
- [[BDV11 Bus Terminator/ROM‎]]
- [[MRV11-A Read-Only Memory Module]]
- [[‎MRV11-B UV PROM-RAM Memory Module]]
- [[MRV11-C Read-Only Memory Module]]
- [[MRV11-D Universal Programmable Read-Only Memory]]



[[KDA50 disk controller]]
- [[KFQSA]]



‎[[TSV05 Tape Transport Subsystem]]



[[VSV11 Graphic System]]



[[DRV11 Parallel Line Unit]]
- [[DRV11-B Direct Memory Access Interface]]
- [[DRV11-J High-Density Parallel Interface]]
- [[DRV11-WA General Purpose DMA Interface]]



[[QBUS asynchronous serial interfaces]]
- [[DLV11 asynchronous serial line interface]]
- [[DLV11-E asynchronous serial line interface]]
- [[DLV11-F asynchronous serial line interface]]
- [[DLV11-J asynchronous serial line interface]]
- [[DZV11 asynchronous serial line interface]]
- [[DZQ11 asynchronous serial line interface]]
- [[DHV11 asynchronous serial line interface]]
- [[DHQ11 asynchronous serial line interface]]



[[DMV11 Synchronous Controller]]
- [[DPV11 synchronous serial line interface]]
- [[DUV11 Line Interface]]



[[MLH-DH/LSI11 Multiple Channel Controller]]
- [[‎Digital ETHERNET Q-Bus Network Adapter]]
- [[DIGITAL Ethernet Local-Area-Network to Q-bus Adapter]]



[[MXV11-A Multifunction Option Module]]
- [[MXV11-B Multifunction Option Module]]


===DEC machines===


[[List of Programmed Data Processors]]
- [[PDP-4]]
- [[PDP-9]]
- [[PDP-1-X]]
- [[PDP-X]]



[[Three cycle data break]]



[[KLESI Low-End Storage Interconnect]]



[[PDP-15]]
- [[UNICHANNEL 15 System]]
- [[MX15-A Memory Bus Multiplexer]]
- [[MX15-B Memory Multiplexer]]


====PDP-8's====


[[LINC]]
- [[LINC-8]]
- [[PDP-8/S]]
- [[PDP-8/L]]
- [[PDP-8/A]]
- [[PDP-12]]



[[OMNIBUS]]
- [[‎PDP-8 Memory Extension units]]
- [[FPP8/A Floating Point Processor]]
- [[MM8-E Memory System]]



[[RF08 disk controller]]
- [[DF32 disk controller]]
- [[RL8-A disk controller]]



[[TC01 DECtape Control]]
- [[TC08 DECtape Controller]]
- [[‎TD8-E Simple DECtape Control]]


====PDP-10's====


[[PDP-10 Memory Bus]]
- [[PDP-10 I/O Bus]]



[[PDP-6]]
- [[KA10]]
- [[KI10]]
- [[KL10]]
- [[KS10]]



[[MCA20 Cache]]
- [[MCA25 KL Cache/Paging Upgrade]]
- [[DMA20 Memory Bus Adapter‎]]
- [[DIA20 IBus Adapter‎]]
- [[DTE20 Ten-Eleven Interface‎]]



[[‎BBN Pager]]
- [[‎SC-40]]



[[PDP-10 memories‎‎]]
- [[MA10 core memory]]
- [[MB10 core memory]]
- [[MD10 core memory]]
- [[ME10 core memory]]
- [[MF10 core memory]]
- [[MG10 core memory]]
- [[MH10 core memory]]



[[MA20 core memory]]
- [[MB20 core memory]]
- [[MF20 MOS memory]]
- [[MG20 MOS memory]]



[[DF10 Data Channel‎]]
- [[‎DX10 Data Channel]]
- [[MX10 Memory Multiplexer]]



[[RH10 MASSBUS controller‎]]
- [[DX20 Programmed Device Adapter]]



[[DA10 Twelve- and Eighteen-Bit Computer Interface]]



[[CI20 Computer Interconnect]]
- [[‎NIA20 Network Interconnect Adapter]]



[[‎DN87/DN87S Universal Synchronous/Asynchronous Communications Front End Subsystem]]



[[RP10 disk controller]]



[[TD10 DECtape Control]]



[[RIM10B Loader]]


====PDP-11's====


[[PDP-11 Extended Instruction Set]]
- [[FP11 floating point]]
- [[FIS floating point]]
- [[PDP-11 Commercial Instruction Set]]
- [[PDP-11 Memory Management]]
- [[PDP-11 stacks]]
- [[PDP-11 family differences appendix]]



[[KA11 CPU]]
- [[KC11 CPU]]
- [[KY11-A Programmer's Console‎‎]]



[[‎KS11 Memory Protection and Relocation option]]
- [[KT11-B Paging Option]]
- [[KA11 changes for the KT11-B]]
- [[KT11-B Technical Manual]]
- [[KT11-B Major State circuitry]]



[[PDP-11/05]]
- [[PDP-11/40E]]
- [[PDP-11/34A]]
- [[PDP-11/74]]



[[KB11-A CPU]]
- [[KB11-B CPU]]
- [[KB11-C CPU]]
- [[KB11-D CPU]]



[[KD11-A CPU]]
- [[KD11-B CPU]]
- [[KD11-D CPU]]
- [[KD11-E CPU]]
- [[KD11-EA CPU]]
- [[KD11-K CPU‎]]
- [[KD11-Z CPU]]
- [[KD11-E/EA microcode]]



[[KY11 consoles]]
- [[‎KY11-D Programmer's Console]]
- [[KY11-J Programmer's Console]]
- [[KY11-LA Operator's Console]]
- [[KY11-LB Programmer's Console]]
- [[KY11-L to CPU interface]]
‎- [[KY11-P programmer's console]]



[[KE11-E Extended Instruction Set]]
- [[KT11-C Memory Management Unit]]
- [[KT11-D Memory Management Unit]]
- [[KJ11-A Stack Limit Register]]



[[KE11-F Floating Instruction Set]]
- [[FP11-A Floating-Point Processor]]
- [[FP11-B Floating-Point Processor]]
- [[FP11-C Floating-Point Processor]]
- [[FP11-E Floating Point Processor]]
- [[FP11-F Floating-Point Processor]]



[[KE11-A Extended Arithmetic Element]]
- [[KE11-B Extended Arithmetic Element]]



[[‎KE44-A Commercial Instruction Set Processor]]



[[KK11-A Cache Memory]]
- [[KK11-B Cache Memory]]



[[KDJ11 PMI/UNIBUS backplane]]
- [[KM11-A Maintenance Set]]



[[MS11 Semiconductor Memory System]]
- [[MJ11 memory system]]
- [[MK11 memory system]]
- [[MS11-K MOS memory]]



[[LSI-11 chip set‎‎]]
- [[LSI-11 CPUs]]
- [[LSI-11]]
- [[LSI-11/2]]
- [[KEV11-B Extended Instruction Set‎]]
- [[KEV11-C Commercial Instruction Set‎]]
- [[KUV11 Writeable Control Store‎]]



[[T-11 chip]]



[[F-11 chip set]]
- [[KDF11 CPUs]]
- [[KDF11-U CPU]]
- [[KDF11-U CPU pinout]]
- [[KTF11-A memory management chip]]
- [[KEF11-A floating point chip]]
- [[KEF11-B‎ CIS chip]]
- [[FPF11 floating point processor‎]]
- [[KT24 UNIBUS map option]]



[[FPJ11 floating point accelerator]]
- [[KDJ11 CPUs]]
- [[KDJ11-B CPU]]
- [[KDJ11-D CPU]]
- [[KDJ11-E CPU]]
- [[KTJ11-B UNIBUS adapter]]
- [[PDP-11/83]]



[[QBUS CPU ODT‎‎]]



[[RH70 MASSBUS controller]]
- [[‎ML11 MOS Memory System]]



[[Able ENABLE]]
- [[Able UNIVERTER]]



[[PDP-11 Bootstrap Loader]]
- [[PDP-11 Absolute Loader]]



[[DEC bootstrap device codes]]


====VAXen====


[[VAXserver]]
- [[VAXstation]]



[[Synchronous Backplane Interconnect]]
- [[‎CPU/Memory Interconnect]]
- [[VAX Bus Interconnect]]
- [[‎Laser System Bus]]



[[KA780 CPU‎]]
- [[‎FP780 Floating-Point Accelerator]]
- [[MS780 Memory System]]
- [[‎MA780 Multiport Memory Option]]
- [[‎‎DW780 Unibus Adapter]]
- [[RH780 Massbus Adapter]]
- [[DR780 High-Performance Channel Interface]]
- [[CI780 Computer Interconnect Adapter]]



[[KA750 CPU]]
- [[FP750 Floating-Point Accelerator]]
- [[‎DW750 Second Unibus Interface]]
- [[UI750 Unibus Interface]]
- [[DR750 General Purpose Interface]]



[[‎KA730 CPU]]



[[‎KA820 CPU]]



[[‎VAX 8600 series]]
- [[‎VAX 10000 series]]



[[‎VAXstation I]]
- [[VAXstation 3100 series]]
- [[‎KD32 CPU]]



[[VAXserver 3100 series]]
- [[‎VAXserver 3300/3400]]
- [[VAXserver 3500/3600]]
- [[VAXserver 4000 series‎]]
- [[VAXserver 4000 Model 300]]



[[‎DR32 Device Interconnect]]
- [[Hierarchical Storage Controller]]


====Alphas====


[[DEC 4000 AXP series]]


===Other manufacturers===


[[Texas Instruments]]
- [[Fairchild Semiconductor]]
- [[Intel]]
- [[MIPS]]



[[Systems Concepts]]
- [[Able Computer]]
- [[‎Storage Technology Corporation]]
- [[‎Century Data Systems]]
- [[Seagate Technology]]
- [[Advanced Computer Communications]]



[[Eckert-Mauchly Computer Corporation]]
- [[Remington Rand Univac]]
- [[Remington Rand]]
- [[Sperry Rand‎]]
- [[‎Unisys]]
‎- [[Engineering Research Associates]]
- [[Control Data Corporation]]
- [[‎Burroughs]]



[[Systems Engineering Laboratories]]
- [[Gould Electronics]]
- [[‎Berkeley Computer Corporation]]
- [[Data General]]



[[Leo Computers]]
- [[Elliott Brothers]]
- [[English Electric Computers]]
- [[EMI Electronics]]
- [[GEC Computers]]
- [[International Computers and Tabulators]]
- [[International Computers Limited]]
- [[MICRAL]]



[[‎Symbolics]]
- [[Datapoint]]
- [[‎Interdata]] ‎
- [[‎Compaq]]
- [[NeXT Computer, Inc]]



[[Cisco]]



[[Valid Logic Systems]]



[[CompuServe]]
- [[Tymshare]]
- [[GeoCities]]
- [[America Online]]


===Non-DEC machines===




[[Automatic Computing Engine]]
- [[Pilot ACE]]
- [[DEUCE]]



[[Manchester Baby]]
- [[Manchester Mark I]]
- [[Ferranti Mark 1]]



[[Atlas]]
- [[GEC 4000 Series]]



[[EDVAC]]
- [[‎IAS computer]]
- [[Whirlwind]]
- [[Memory Test Computer]]
- [[Semi-Automatic Ground Environment]]
- [[AN/FSQ-7]]



[[UNIVAC I]]
- [[LGP-30]]
- [[Bendix G-15]]
- [[Packard Bell PB 250]]
- [[Series 16]]
- [[Series 16 instructions]]



[[Burroughs B5000‎]]
- [[CDC 6400]]
- [[CDC 6600‎]]
- [[ILLIAC IV]]



[[‎GE 600 series]]
- [[GE-635]]
- [[GE-645]]
- [[Honeywell 6000 series‎‎]]



[[IBM 604]]
- [[IBM 650]]
- [[IBM 700 series]]
- [[IBM 701]]
- [[IBM 704]]
- [[IBM 709]]



[[‎IBM 1401]]
- [[IBM 1620]]
- [[IBM 7000 series]]
- [[IBM 7030 Stretch]]
- [[IBM 7070]]
- [[IBM 7090]]
- [[IBM 7094]]



[[Standard Modular System‎]]
- [[‎IBM I/O channel]]



[[Data General Nova 3]]



[[‎CalComp Model 215 Disk Drive]]
- [[Trident disk drives]]



[[Xerox Graphics Printer]]
- [[Xerox 860 Information Processing System]]
- [[Xerox Alto]]
- [[Alto-1822 Interface]]
- [[Dover]]



[[CONS]]
- [[CADR]]
- [[SUN workstation]]
- [[Sun-1]]



[[KENBAK-1]]
- [[Datapoint 2200]]



[[‎MICRAL N]]
- [[‎Altair 8800]]
- [[IMSAI 8080]]
- [[‎Sol-20]]
- [[Apple IIc]]
- [[Apple IIGS]]
- [[IBM PC‎]]
- [[IBM-compatible PC]]



[[Lear Siegler ADM-3A]]
- [[Term-Mite ST Smart Terminal]]



[[Extended Industry Standard Architecture]]
- [[Micro Channel architecture]]
- [[Peripheral Component Interconnect]]
- [[Storage Module Device]]
- [[‎VERSAbus]]
- [[‎Universal Serial Bus]]


===Chips===


[[Intel 1103]]



[[Intel 8085]]
- [[Intel x86]]
- [[Intel 80486‎]]
- [[Intel Pentium]]
- [[‎Am29000]]



[[Real mode‎]]
- [[Protected mode‎]]
- [[Triple fault]]



[[Motorola M68000 Family]]
- [[Motorola MC68000]]
- [[Motorola MC68030]]
- [[Motorola MC68040]]
- [[Motorola MC68060]]



[[National Semiconductor NS405 and NS455 Terminal Management Processor]]


===UNIX===


[[UNIX Second Edition]]
- [[UNIX Third Edition]]
- [[UNIX Fourth Edition]]



[[UNIX file system]]
- [[Repairing early UNIX file systems]]



[[UNIX V6 internals]]
- [[UNIX V6 memory layout]]
- [[UNIX V6 dump analysis‎‎]]
- [[xv6]]



[[Installing UNIX Sixth Edition]]
- [[Upgrading UNIX Sixth Edition]]
- [[Running UNIX V6 on an -11/23]]
- [[Installing UNIX Sixth Edition on Ersatz-11]]
- [[Running an LSI-11 from UNIX V6]]



[[Installing Unix Seventh Edition]]



[[LSX]]
- [[MINI-UNIX]]
- [[CB-UNIX]]
- [[PWB/UNIX]]
- [[‎USG UNIX]]
- [[UNIX/370]]



[[MERT operating system]]



[[Network UNIX]]
- [[Digital UNIX]]



[[2.10BSD]]
- [[2.11BSD]]
- [[4.4BSD]]
- [[BSD Fast File System]]



[[PDP-11 C stack operation]]
- [[UNIX a.out file]]
- [[Typesetter C]]
- [[Standard I/O library]]


===Software systems===


[[Compatible Time-Sharing System]]
- [[OS/360]]
- [[‎CP operating system]]
- [[‎ITS Internals Manual]]
- [[ITS machine configurations]]
- [[TOPS-10]]
- [[TENEX]]
- [[CAL Time-Sharing System]]



[[ELF operating system]]
- [[MOS operating system]]
- [[FAT file system]]



[[MACRO-11]]
- [[Interactive Application System]]
- [[XXDP diagnostic package]]



[[Michigan Algorithm Decoder]]
- [[ALGOL]]
- [[BCPL]]
- [[BLISS]]
- [[B programming language]]
- [[DIBOL]]
- [[FOCAL]]
- [[‎PL/I]]
- [[Java]]



[[Mac OS]]
- [[macOS]]]]



[[‎List of emulators]]
- [[Ersatz-11]]
- [[Bochs]]
- [[PDP11GUI]]



[[Computer-aided design]]
- [[Terminal emulator]]



[[Video game]]
‎- [[Conway's Life]]



[[Interim File System]]



[[X Window System]]
- [[Stanford University Design System]]



[[TJ-2]]
- [[RUNOFF]]
- [[PostScript]]
- [[Sketchpad]]
- [[Vi editor]]
- [[Epsilon]]
- [[Mozilla]]



[[Hello, world]]
- [[PLATO]]
- [[lex]]
- [[flex]]


===Networking===


[[Communication network]]
- [[Data network]]
- [[Circuit-switching]]
- [[Physical network]]
- [[Network interface]]



[[Broadcast]]
- [[Multicast]]



[[Wide area network‎]]
- [[Local area network‎]]
- [[Carrier-Sense Multiple Access with Collision Detection‎‎]]



[[Switching node]]
- [[Gateway]]
- [[Host]]
- [[Client]]
- [[Server]]



[[Routing architecture‎]]
- [[Path selection‎‎]]
- [[Routing table‎]]
- [[Routing loop]]
- [[Link state]]
- [[Routing protocol‎‎]]



[[Packet]]
- [[Datagram]]
- [[Packet switch]]
- [[Internetwork]]
- [[Router]]
- [[Big-endian]]
- [[Little-endian]]



[[Protocol]]
- [[Protocol suite]]
- [[Application protocol]]
- [[Internetworking layer]]
- [[Reliable byte stream‎]]
- [[End to end]]



[[Networking port]]
- [[Connection]]
- [[Sequence number‎]]
- [[Acknowledgement]]
- [[Timeout]]
- [[Retransmission]]
- [[Host table]]



[[International Network Working Group]]
- [[TCP and Internet Meetings]]
- [[‎TCP and IP bake offs]]
- [[Internet Engineering Task Force‎]]



[[1822 interface]]
- [[Network Control Program (ARPANET)]]
- [[Host-to-IMP Protocol‎]]
- [[‎Terminal Interface Processor]]
- [[Terminal Interface Unit]]
- [[Port Expander]]
- [[C Gateway]]



[[Digital Data Communications Message Protocol]]
- [[Packet Radio Network]]
- [[‎Media Access Control Address]]
- [[Address Resolution Protocol]]



[[PARC Universal Packet]]
- [[EFTP]]



[[Internet]]
- [[Internet Protocol]]
- [[User Datagram Protocol‎]]
- [[Transmission Control Protocol]]
- [[Domain Name System]]



[[Interior gateway protocol‎]]
- [[Routing Information Protocol‎]]
- [[Open Shortest Path First‎‎]]
- [[Intermediate System to Intermediate System‎]]



[[Exterior gateway protocol‎‎]]
- [[Autonomous System‎]]
- [[Exterior Gateway Protocol‎‎]]
- [[Border Gateway Protocol‎‎]]
- [[Nimrod]]



[[Telnet]]
- [[File Transfer Protocol‎‎]]
- [[Email]]
- [[Simple Mail Transfer Protocol‎]]
- [[Hypertext Transfer Protocol]]
- [[World Wide Web]]
- [[Browser]]



[[Hypertext]]
- [[Hypertext Markup Language‎‎]]
- [[Network File System]]



[[Request for Comments]]
- [[Internet Experiment Note]]



[[ALOHA System]]
- [[CYCLADES]]
- [[Usenet]]



[[Internet service provider]]
- [[‎Relcom]]
- [[‎Netnews]]
- [[Worm]]


===Other===


[[Computer operator]]
- [[User]]
- [[Multi-user]]
- [[End-user]]



[[Original Equipment Manufacturer]]
- [[Field service‎]]
- [[Engineering Change Order]]



[[Vonada's Engineering Maxims]]
- [[Backronym]]



[[Defense Advanced Research Projects Administration]]
- [[Information Processing Techniques Office]]
- [[Institute for Advanced Study]]
- [[SRI International]]
- [[Augmentation Research Center]]
- [[MITRE]]



[[Research Laboratory of Electronics]]
- [[Lincoln Laboratory]]
- [[Project MAC‎]]
- [[MIT Laboratory for Computer Science]]
- [[MIT Artificial Intelligence Laboratory‎]]
- [[MIT Computer Science and Artificial Intelligence Laboratory]]



[[Stanford University]]
- [[Stanford Artificial Intelligence Laboratory]]
- [[Project GENIE]]



[[Bell Laboratories]]
- [[UNIX Support Group]]
- [[Bell System Technical Journal]]



[[‎Annals of the History of Computing]]
- [[Charles Babbage Institute]]
- [[Computer History Museum]]
- [[Bitsavers]]
- [[1000 BiT]]
- [[Living Computer Museum]]
- [[‎Super Dimension Fortress]]
- [[Computer Conservation Society]]
- [[Centre for Computing History]]



[[IEEE]]
- [[Association for Computing Machinery]]
- [[American Federation of Information Processing Societies]]
- [[Turing Award]]



[[Varian Associates]]
- [[Ampex]]



[[General Electric]]
- [[‎Honeywell]]
- [[Remington Rand]]
- [[Xerox]]



[[Associated Electrical Industries]]
- [[English Electric]]
- [[General Electric Company]]



[[Route 128]]
- [[‎Silicon Valley]]



[[Charles Babbage]]
- [[‎Tommy Flowers]]
- [[Russell and Sigurd Varian]]



[[‎John Vincent Atanasoff]]
- [[J. Presper Eckert]]
- [[John Mauchly]]
- [[Alan Turing]]
- [[John von Neumann]]



[[C. Gordon Bell]]
- [[Seymour Cray]]
- [[Gordon Moore]]
- [[Robert Noyce]]



[[Paul Allen]]
- [[Les Earnest]] ‎
- [[Douglas Engelbart]]
- [[Butler Lampson]]
- [[J. C. R. Licklider]]
- [[Louis Pouzin]]
- [[Dennis Ritchie]]
- [[Jerry Saltzer]]
- [[Ken Thompson]]


==Pages I have substantially upgraded==

===Generic===


[[Dual Inline Package]]
- [[Random Access Memory]]



[[Operating system]]
- [[Symbolic link]]


===DEC===


[[Digital Equipment Corporation]]
- [[FLIP CHIP]]



[[TU10 magtape drive]]
- [[TU56 DECtape Transport]]
- [[TU60 DECasetteTape Transport]]



[[RK05 disk drive]]
- [[RK06/07 disk drive]]
- [[RL01/02 disk drive]]
- [[RM02/03 disk drive]]
- [[RP05 disk drive]]
- [[RP06 disk drive]]
- [[RA60 Disk Drive]]



[[RX33 Flexible Disk Drive]]
- [[RX50 dual-diskette drive]]



[[RA70 disk drive]]
- [[RA80 Disk Drive]]
- [[RA82 disk drive]]
- [[RM80 Disk Drive]]



[[PDP-1]]
- [[PDP-5]]
- [[DECmate]]



[[PDP-8]]
- [[PDP-8/I]]
- [[PDP-8/E]]



[[PDP-10]]
- [[TM10 Magnetic Tape Control]]



[[PDP-11 architecture]]
- [[UNIBUS]]
- [[QBUS]]



[[PDP-11/04]]
- [[PDP-11/05]]
- [[PDP-11/10]]
- [[PDP-11/24]]
- [[PDP-11/34]]
- [[PDP-11/40]]
- [[PDP-11/44]]
- [[PDP-11/45]]
- [[PDP-11/70]]
- [[PDP-11/84]]



[[RF11 disk controller]]
- [[RK11 disk controller]]
- [[RK611 disk controller]]



[[PCL11 Communications System]]
- [[Chaosnet interface]]



[[DZ11 asynchronous serial line interface]]



[[CR11 Card Readers]]



[[M782 Interrupt Control]]



[[KWV11-C programmable real-time clock‎]]



[[KEV11-A floating point]]
- [[KDF11-A CPU]]
- [[KDF11-B CPU]]
- [[J-11 chip set]]
- [[KDJ11-A CPU]]



[[MSV11-D MOS memory]]
- [[MSV11-J memory module]]



[[CXY08 8-Line Asynchronous Multiplexer]]



[[VAX-11/725]]
- [[VAX-11/750]]
- [[MS750 Memory System]]



[[VAX 8250]]
- [[VAX 8350]]
- [[VAX 6000 series]]
- [[VAX 7000 series]]
- [[VAX 9000 series]]



[[MicroVAX I]]
- [[MicroVAX II]]
- [[MicroVAX 3100 series]]
- [[MicroVAX 3500/3600]]



[[VAXstation 3200/3500]]
- [[VAXstation 3520/3540]]
- [[VAXstation 4000 Model 96]]
- [[VAXstation 8000]]



[[VAXft series]]


===Hardware===


[[International Business Machines]]
- [[Computer Control Corporation]]



[[‎VMEbus]]



[[‎SDS Sigma series]]



[[Maxc]]
- [[S-1 supercomputer]]


===Software===


[[Multics]]
- [[Incompatible Timesharing System]]



[[PDP-7 UNIX]]
- [[UNIX First Edition]]
- [[UNIX Sixth Edition]]



[[FORTRAN]]



[[Emacs editors‎‎]]
- [[QED (text editor)]]
- [[What You See Is What You Get]]



[[Spacewar!]]


===Networking===


[[Bridge]]



[[Interface Message Processor]]
- [[ANTS terminal system]]
- [[Ethernet]]
- [[CHAOSnet]]



[[Network Control Protocol]]
- [[TCP/IP]]
- [[Point-to-Point Protocol]]


===Other===


[[Technology Square]]

Xerox 860 Information Processing System

2025-10-27T11:46:27Z

Jnc: typo

The '''Xerox 860 Information Processing System''' (usually referred to as the '''Xerox 860 IPS''') was a very early [[workstation]] from [[Xerox]].

It came with custom software from Xerox, including a [[What You See Is What You Get|WYSIWYG]] [[screen editor]], but [[CP/M]], and [[application]]s which ran under it, were also available.

The [[Central Processing Unit|CPU]] was an [[Intel 8085]]. The 860 came standard with 96KB of [[main memory]]; it could optionally be increased to 128KB. It came with a [[cathode ray tube|CRT]] [[video display]], which could display up to 70 lines, of 102 characters each. [[Secondary storage]] was two 8" [[floppy disk]] [[disk#Low-cost disks|drives]]. A Diablo [[printer]] could be shared between several 860's. [[Ethernet]] was also supported.

==External links==

* [http://www.bitsavers.org/pdf/xerox/860/ 860] - documentation at [[Bitsavers]]
* [https://www.digibarn.com/collections/systems/xerox860/index.html Xerox 860 IPS] - includes many images

[[Category: Xerox]]
[[Category: Workstations]]

Word

2025-10-27T11:42:11Z

Jnc: Different computer architectures have different word sizes

In the widest sense, a '''word''' is an ordered group of bits considered together. Different computer architectures have different word sizes. A word may denote data processed by the [[Central Processing Unit|CPU]], an [[instruction]], an [[address]], or the unit by/in which [[main memory]] is accessed. In early and simple computers, these were to a large extent the same width. However, contemporary practice is generally to give each [[byte]] in main memory its own address. Instructions are also now often smaller than the [[arithmetic logic unit|ALU]] width; [[physical address|physical]] and [[virtual address]]es are different sizes, etc.

Words are now usually a power-of-two multiple of an 8-bit byte in size, but in early computers, other word sizes were common. 36 bits was a very popular size (for reasons of accuracy of physical computations, the principal early [[application]] for computers) on early [[mainframe]]s, such as the [[IBM 704]] and its descendants; the [[Honeywell 6000 series‎‎]]; and the [[PDP-10]] family. However, small word sizes were common too, e.g. the 12-bit words of the [[PDP-8 family]].

==Computer 'widths'==

Machines' 'widths' are often considered to be the machine's word-size, but the discussion is complicated, and made even more confusing, because there is no universally accepted standard for what sets a machine's 'width'. Indeed, for most suggested benchmarks, one can find a machine which violates it:

* [[address space]] ([[KA10]]; 18 bits - 36-bit machine)
* instruction size ([[Motorola M68000 family]]; 16 bits - 32-bit machine)
* [[bus]] width ([[Motorola MC68000]]; 16 bits - 32-bit machine)
* [[arithmetic logic unit|ALU]] width ([[LSI-11]]; 8 bits - 16-bit machine)

Thus, the 'word' size is now usually used as the measure of the machine's 'size'.

{{semi-stub}}

[[Category: Basics]]

Virtual address

2025-10-27T00:37:56Z

Jnc: Better word

A '''virtual address''' is an address emitted by [[object code|code]] running when it is not running on a 'bare machine' (i.e. the machine is not using a 1:1 correspondence between the addresses used by code running in the [[Central Processing Unit|CPU]], and the actual addresses of [[main memory]], the latter usually referred to as [[physical address]]es).

When running a [[time-sharing]] [[operating system]], the [[memory management]] [[hardware]] provides mapping of memory addresses emitting by code belonging to a [[user]]/[[process]], to protect both the OS itself, and other users/processes, from errors or malicious behaviour.

Originally this protection was provided by '[[base and bounds]] [[register]]s', which allowed the entire memory of a user/process to be relocated into a contiguous block of main memory. Now, [[virtual memory]] is usually used, which provides this protection/relocation as one of its many benefits.

[[Category: CPU Basics]]

Physical address

2025-10-27T00:35:19Z

Jnc: Attempt at a definition

A '''physical address''' is an [[address]] which is the address of a physical asset (either of [[main memory]] or [[secondary storage]]; or of something in a [[communication network]]); i.e. an address at the lowest possible level of a hierarchy of [[virtual address]]es.

{{semi-stub}}

[[Category: Basics]]

Virtual address

2025-10-26T17:29:14Z

Jnc: Split 'physical address' into a separate page

A '''virtual address''' is an address emitted by [[object code|code]] running when it is not running on a 'bare machine' (i.e. the machine is not using a 1:1 correspondence between the addresses used by code running in the [[Central Processing Unit|CPU]], and the actual addresses of [[main memory]], the latter often referred to as [[physical address]]es).

When running a [[time-sharing]] [[operating system]], the [[memory management]] [[hardware]] provides mapping of memory addresses emitting by code belonging to a [[user]]/[[process]], to protect both the OS itself, and other users/processes, from errors or malicious behaviour.

Originally this protection was provided by '[[base and bounds]] [[register]]s', which allowed the entire memory of a user/process to be relocated into a contiguous block of main memory. Now, [[virtual memory]] is usually used, which provides this protection/relocation as one of its many benefits.

[[Category: CPU Basics]]

Width

2025-10-26T17:26:40Z

Jnc: Redir - covered there

#Redirect [[Word]]

Machine width

2025-10-26T17:25:51Z

Jnc: Redir - covered there

#Redirect [[Word]]

Word

2025-10-26T17:24:14Z

Jnc: Expan discussion somewhat; cover machine 'width' too

In the widest sense, a '''word''' is an ordered group of bits considered together. In computer architecture, a word may denote data processed by the [[Central Processing Unit|CPU]], an [[instruction]], an [[address]], or the unit by/in which [[main memory]] is accessed. In early and simple computers, these were to a large extent the same width. However, contemporary practice is generally to give each [[byte]] in main memory its own address. Instructions are also now often smaller than the [[arithmetic logic unit|ALU]] width; [[physical address|physical]] and [[virtual address]]es are different sizes, etc.

Words are now usually a power-of-two multiple of an 8-bit byte in size, but in early computers, other word sizes were common. 36 bits was a very popular size (for reasons of accuracy of physical computations, the principal early [[application]] for computers) on early [[mainframe]]s, such as the [[IBM 704]] and its descendants; the [[Honeywell 6000 series‎‎]]; and the [[PDP-10]] family. However, small word sizes were common too, e.g. the 12-bit words of the [[PDP-8 family]].

==Computer 'widths'==

Machines' 'widths' are often considered to be the machine's word-size, but the discussion is complicated, and made even more confusing, because there is no universally accepted standard for what sets a machine's 'width'. Indeed, for most suggested benchmarks, one can find a machine which violates it:

* [[address space]] ([[KA10]]; 18 bits - 36-bit machine)
* instruction size ([[Motorola M68000 family]]; 16 bits - 32-bit machine)
* [[bus]] width ([[Motorola MC68000]]; 16 bits - 32-bit machine)
* [[arithmetic logic unit|ALU]] width ([[LSI-11]]; 8 bits - 16-bit machine)

Thus, the 'word' size is now usually used as the measure of the machine's 'size'.

{{semi-stub}}

[[Category: Basics]]

Sketchpad

2025-10-25T15:15:24Z

Jnc: /* Further reading */ +On-line graphical specification of computer procedures

'''Sketchpad''' was a [[graphical user interface]] system created by [[Ivan Sutherland]]; it was a follow-on to prior work at [[Whirlwind]] (later used in the [[SAGE]] system). Sketchpad was undertaken on the [[TX-2]] system at [[Lincoln Laboratory]].

It was an important predecessor to later [[computer-aided design]] work. The next steps after Sketchpad were taken by [[Douglas Engelbart]] of the [[Augmentation Research Center]], which was in turn taken up at nearby [[Xerox PARC]], with the ground-breaking [[Xerox Alto]] project, the first [[personal computer]] of modern form.

{{semi-stub}}

==Further reading==

* William R. Sutherland, [https://mit.primo.exlibrisgroup.com/discovery/fulldisplay?vid=01MIT_INST:MIT&search_scope=all&tab=all&docid=alma990002681740106761&lang=en&context=L&virtualBrowse=true On-line graphical specification of computer procedures]

==External links==

* [http://bitsavers.org/pdf/mit/tx-2/Sketchpad_A_Man-Machine_Graphical_Communication_System_Jan63.pdf Sketchpad: A Man-Machine Graphical Communication System] - original thesis
* [http://bitsavers.org/pdf/mit/tx-2/Sketchpad_TR296_Jan63.pdf Sketchpad: A Man-Machine Graphical Communication System]
*[https://web.archive.org/web/20121107151904/http://www.ll.mit.edu/publications/labnotes/LookingBack_19_1.pdf Looking Back: The TX-2 Computer and Sketchpad]

[[Category: Demo Software]]

TX-2

2025-10-25T15:02:22Z

Jnc: Its most important contributions were in software

[[Image:TX-2 module top.jpg|250px|thumb|right|TX-2 plug-in module]]

The '''TX-2''' was an early [[transistor]] computer; it was a follow-on to the ground-breaking [[TX-0]] at the [[Massachusetts Institute of Technology|MIT]] [[Lincoln Laboratory]]. Innovations around [[interrupt]]s used on the TX-2 were an important predecessor to the [[PDP-1]]. Its most important contributions were in the [[software]] developed on it.

One important [[application]] developed on the TX-2 was the ground-breaking [[Sketchpad]]. Later on, an important [[data network]]ing demonstration that preceded the [[ARPANET]] used the TX-2. Beginning in 1964 a [[time-sharing]] system called [[APEX]] was put together on the TX-2, under the guidance of Larry Roberts, using a small number of consoles with [[graphics]] capability.

The TX-2's [[magnetic tape]] [[mass storage]] system, created by Tom Stockebrand, used 1/2" tape, but was block addressable, unlike most magnetic tape systems, which could only write sequentially. He later moved to the [[LINC]] project, along with several other TX-2 alumni, where he helped create the descendant [[LINC tape]] system; he then moved to [[DEC]], where he helped create [[DECtape]], very similar to LINCtape.

{{semi-stub}}

==Further reading==

* C. Gordon Bell, Gerald Butler, Robert Gray, John E. Mcnamara, Donald Vonada, and Ronald Wilson, [http://gordonbell.azurewebsites.net/Computer_Engineering/00000149.htm The PDP-1 and Other 18-Bit Computers], in C. Gordon Bell, J. Craig Mudge, John. E. McNamara, ''Computer Engineering: A DEC View of Hardware Systems Design'', Digital Press, Bedford, 1978
* Severo M. Ornstein, [https://archive.computerhistory.org/resources/access/text/2019/03/102785079-05-01-acc.pdf ''Computing in the Middle Ages: A View From the Trenches 1955-1983''] (AuthorHouse, 2002) - Some background about the end of the construction of the TX-2

==External links==

* [http://bitsavers.org/pdf/mit/tx-2/ Bitsavers TX-2 documents]
* [http://bitsavers.org/pdf/mit/lincolnLaboratory/division_6/6D-2631_TX-2_Circuitry_Handbook_Oct1958.pdf TX-2 Circuitry Handbook]
* [https://mitmuseum.mit.edu/collections/subject/computers-individual-computers-tx-2-computer-289 TX-2 Computer] - a collection of images
* [https://www.digibarn.com/stories/linc/documents/LINC-Personal-Workstation/LINC-Personal-Workstation.pdf The LINC Was Early and Small] - lengthy personal memoir by Wesley Clark; it also mentions the TX-2
* [https://web.stanford.edu/~learnest/nets/timesharing.htm Who invented Timesharing]
* [https://tx-2.github.io/ TX-2 simulation project]
** [https://tx-2.github.io/documentation/ TX-2 Documentation]

[[Category: Mainframes]]
[[Category: 36-bit Computers]]
[[Category: Unique Computers]]

Semi-Automatic Ground Environment

2025-10-25T14:51:37Z

Jnc: /* External links */ +SAGE - older version, with more details

The '''Semi-Automatic Ground Environment''' (usually referred to by the acronym, '''SAGE''') of the USA was a computerised air defense system; the earliest distributed [[real-time]] system. It used the [[Whirlwind]] machine (suitably augmented) as a prototype.

The hardware, the [[AN/FSQ-7]], was designed by [[International Business Machines|IBM]], in cooperation with [[Lincoln Laboratory]], and built by IBM (and was a significant factor in their growth in expertise in computers). The software was begun by Lincoln, but the effort was taken over by the [[Rand Corporation]], whose [[System Development Division]] (where the work was done) grew so large that in November, 1956, it was spun off as the non-profit [[System Development Corporation]]. [[MITRE]] was also created by the SAGE effort, in July, 1958, as a spin-off of Lincoln, to help take the system to completion.

Whether SAGE would have actually worked, if called upon to do so, is unclear; but the side-effects, in improvements to computers, were immense.

==Further reading==

* Kent C. Redmond, Thomas M. Smith, ''From Whirlwind to MITRE: The R&D Story of the SAGE Air Defense Computer'', MIT Press, Cambridge, 2000
* John F. Jacobs, [http://www.bitsavers.org/pdf/mit/lincolnLaboratory/Jacobs_The_SAGE_Air_Defense_System_A_Personal_History_1986.pdf ''The SAGE Air Defense System: A Personal History''], MITRE Corporation, Bedford, 1986
* ''Special Issue - SAGE (Semi-Automatic Ground Environment)'', [[Annals of the History of Computing]], Vol. 5, No. 4, October 1983

==External links==

* [http://bitsavers.org/pdf/ibm/sage/ sage] - documentation at [[Bitsavers]]
** [http://bitsavers.org/pdf/ibm/sage/C686-416L-ST_Introduction_to_AN_FSQ-7_19660120.pdf Introduction to AN/FSQ-7] (C686-416L-ST) - contains a good overview of SAGE
** [http://bitsavers.org/pdf/ibm/sage/Computer_Museum_First_Field_Trip_1982.pdf The Computer Museum Member's First Field Trip To Northbay AN/FSQ-7 SAGE Site]
* [http://bitsavers.org/pdf/mit/lincolnLaboratory/project_charles/A800165_Final_Report_of_Project_Charles_Vol_1_Aug1951.pdf Final Report of PROJECT CHARLES] - the effort that started SAGE rolling
* [https://www.ll.mit.edu/about/history/sage-semi-automatic-ground-environment-air-defense-system SAGE: Semi-Automatic Ground Environment Air Defense System] - good, fairly detailed history
** [https://www.ll.mit.edu/about/history/reflections-sage Reflections on SAGE]
* [https://web.archive.org/web/20140828223103/http://www.ll.mit.edu/about/History/SAGE_TOCpage.html SAGE: Semi-Automatic Ground Environment Air Defense System] - older version, with more details
** [https://web.archive.org/web/20140828221136/http://www.ll.mit.edu/about/History/newthreat.html A New Threat]
** [https://web.archive.org/web/20140828224042/http://www.ll.mit.edu/about/History/origins.html Lincoln Laboratory Origins]
** [https://web.archive.org/web/20161204075643/http://www.ll.mit.edu/about/History/projectcharles.html Lincoln Laboratory Origins (part 2)]
** [https://web.archive.org/web/20140828213825/http://www.ll.mit.edu/about/History/SAGEairdefensesystem.html The SAGE Air Defense System]
** [https://web.archive.org/web/20140828221740/http://www.ll.mit.edu/about/History/earlydigitalcomputing.html Early Digital Computing]
** [https://web.archive.org/web/20150208150649/http://www.ll.mit.edu/about/History/digitalcomputing_2.html Early Digital Computing (part 2)]
** [https://web.archive.org/web/20140828223207/http://www.ll.mit.edu/about/History/capecodprototype.html Cape Cod SAGE Prototype]
** [https://web.archive.org/web/20140811144042/http://www.ll.mit.edu/about/History/capecodprototype-2.html Cape Cod SAGE Prototype (part 2)]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars.html Early-Warning Radars]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars2.html Part 2: MIT Lincoln Laboratory develops UHF early-warning radar]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars3.html Part 3: Jug Handle, Boston Hill, and Texas Tower radars]
** [https://web.archive.org/web/20140828221442/http://www.ll.mit.edu/about/History/transition.html SAGE Transition] - covers the creation of [[MITRE]]
** [https://web.archive.org/web/20140828222855/http://www.ll.mit.edu/about/History/reflections.html Reflections on SAGE]
* [https://ethw.org/Milestones:SAGE-Semi-Automatic_Ground_Environment,_1951-1958 Milestones: SAGE—Semi-Automatic Ground Environment, 1951-1958]
* [https://ed-thelen.org/SageIntro.html Introduction to AN/FSQ-7 Combat Direction Central and AN/FSQ-8 Combat Control Central] - good detailed technical overview
* [https://ed-thelen.org/sage-1.html Stories about SAGE]
** [https://ed-thelen.org/comp-hist/vs-ibm-sage.html IBM SAGE]
* [https://www.smithsonianmag.com/air-space-magazine/this-is-only-a-test-3119878/ “This Is Only a Test”] - interesting description of full-scale tests of SAGE
* [https://web.archive.org/web/20130217134853/http://www.theatlantic.com/technology/archive/2013/01/the-never-before-told-story-of-the-worlds-first-computer-art-its-a-sexy-dame/267439/ The Never-Before-Told Story of the World's First Computer Art (It's a Sexy Dame)]

[[Category: Early Computers]]

Lincoln Laboratory

2025-10-25T14:38:15Z

Jnc: /* Computers done at Lincoln */ +Memory Test Computer

'''Lincoln Laboratory''', while formally a part of [[Massachusetts Institute of Technology|MIT]], is effectively an independent research organization.

It is in some sense a descendant of the Radiation Laboratory, set up at MIT in WWII to do work on radar (although the only connection is that some people from the Rad Lab later worked at Lincoln). Lincoln was set up in 1951 to help build the [[Semi-Automatic Ground Environment]], the US's first air defense system. It has been involved in research work useful for national defense, and more recently, other national priorities as well, ever since.

The [[Memory Test Computer]] was built there in 1952, by Group 62 and Group 63, to test the first [[core memory]], intended for use in [[Whirlwind]] (which was used for a prototype of SAGE). The [[TX-0]] computer was built at Lincoln Laboratory in 1955, to try out using [[transistor]]s to build a computer. It was later followed by the [[TX-2]], which was the host for [[Sketchpad]].

==Computers done at Lincoln==

Several innovative early computers were created at Lincoln Laboratory. They include:

* [[Memory Test Computer]] - first computer with [[core memory]]
* [[TX-0]] - supposedly the first [[transistor]] computer
* [[TX-2]]
* [[FX-1]]
* [[LINC]] - supposedly the first [[personal computer]]

{{semi-stub}}

==Further reading==

* Ed. Eva C. Freeman, ''MIT Lincoln Laboratory: Technology in the National Interest'', MIT Lincoln Laboratory, Lexington, 1995
* Ed. Alan A. Grometstein, [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/MIT_Lincoln_Laboratory_history_book.pdf ''MIT Lincoln Laboratory: Technology in Support of National Security''], MIT Lincoln Laboratory, Lexington, 2011

==External links==

* [https://www.ll.mit.edu/about/history History]
** [https://www.ll.mit.edu/about/history/sage-semi-automatic-ground-environment-air-defense-system SAGE: Semi-Automatic Ground Environment Air Defense System]]
* [https://web.archive.org/web/20140930210150/http://www.ll.mit.edu/about/about.html About Lincoln Laboratory]
** [https://web.archive.org/web/20140930203157/http://www.ll.mit.edu/employment/orgtechdivisions.html Organization of Technical Divisions]
* [https://web.archive.org/web/20140828220219/http://www.ll.mit.edu/about/History/RadLab.html MIT Radiation Laboratory]
* [https://web.archive.org/web/20140828223103/http://www.ll.mit.edu/about/History/SAGE_TOCpage.html SAGE: Semi-Automatic Ground Environment Air Defense System]
** [https://web.archive.org/web/20140828221136/http://www.ll.mit.edu/about/History/newthreat.html A New Threat]
** [https://web.archive.org/web/20140828224042/http://www.ll.mit.edu/about/History/origins.html Lincoln Laboratory Origins]
** [https://web.archive.org/web/20161204075643/http://www.ll.mit.edu/about/History/projectcharles.html Lincoln Laboratory Origins (part 2)]
** [https://web.archive.org/web/20140828213825/http://www.ll.mit.edu/about/History/SAGEairdefensesystem.html The SAGE Air Defense System]
** [https://web.archive.org/web/20140828221740/http://www.ll.mit.edu/about/History/earlydigitalcomputing.html Early Digital Computing]
** [https://web.archive.org/web/20150208150649/http://www.ll.mit.edu/about/History/digitalcomputing_2.html Early Digital Computing (part 2)]
** [https://web.archive.org/web/20140828223207/http://www.ll.mit.edu/about/History/capecodprototype.html Cape Cod SAGE Prototype]
** [https://web.archive.org/web/20140811144042/http://www.ll.mit.edu/about/History/capecodprototype-2.html Cape Cod SAGE Prototype (part 2)]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars.html Early-Warning Radars]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars2.html Part 2: MIT Lincoln Laboratory develops UHF early-warning radar]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars3.html Part 3: Jug Handle, Boston Hill, and Texas Tower radars]
** [https://web.archive.org/web/20140828221442/http://www.ll.mit.edu/about/History/transition.html SAGE Transition] - covers the creation of [[MITRE]]
** [https://web.archive.org/web/20140828222855/http://www.ll.mit.edu/about/History/reflections.html Reflections on SAGE]

** [https://web.archive.org/web/20140828223543/http://www.ll.mit.edu/about/History/newcallings.html New Callings]
* [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/historybook.html MIT Lincoln Laboratory's History Book]
* [https://web.archive.org/web/20160811032204/http://www.ll.mit.edu/about/History/60-innovations.pdf 60 Innovations Over Sixty Years: Highlights of Technology Advances at MIT Lincoln Laboratory]
* [http://bitsavers.org/pdf/mit/lincolnLaboratory/ Lincoln Laboratory] - documents at [[Bitsavers]]

[[Category: Research Organizations]]

Lincoln Laboratory

2025-10-25T14:34:50Z

Jnc: /* Computers done at Lincoln */ Several innovative early computers were created at Lincoln

'''Lincoln Laboratory''', while formally a part of [[Massachusetts Institute of Technology|MIT]], is effectively an independent research organization.

It is in some sense a descendant of the Radiation Laboratory, set up at MIT in WWII to do work on radar (although the only connection is that some people from the Rad Lab later worked at Lincoln). Lincoln was set up in 1951 to help build the [[Semi-Automatic Ground Environment]], the US's first air defense system. It has been involved in research work useful for national defense, and more recently, other national priorities as well, ever since.

The [[Memory Test Computer]] was built there in 1952, by Group 62 and Group 63, to test the first [[core memory]], intended for use in [[Whirlwind]] (which was used for a prototype of SAGE). The [[TX-0]] computer was built at Lincoln Laboratory in 1955, to try out using [[transistor]]s to build a computer. It was later followed by the [[TX-2]], which was the host for [[Sketchpad]].

==Computers done at Lincoln==

Several innovative early computers were created at Lincoln Laboratory. They include:

* [[TX-0]] - supposedly the first [[transistor]] computer
* [[TX-2]]
* [[FX-1]]
* [[LINC]] - supposedly the first [[personal computer]]

{{semi-stub}}

==Further reading==

* Ed. Eva C. Freeman, ''MIT Lincoln Laboratory: Technology in the National Interest'', MIT Lincoln Laboratory, Lexington, 1995
* Ed. Alan A. Grometstein, [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/MIT_Lincoln_Laboratory_history_book.pdf ''MIT Lincoln Laboratory: Technology in Support of National Security''], MIT Lincoln Laboratory, Lexington, 2011

==External links==

* [https://www.ll.mit.edu/about/history History]
** [https://www.ll.mit.edu/about/history/sage-semi-automatic-ground-environment-air-defense-system SAGE: Semi-Automatic Ground Environment Air Defense System]]
* [https://web.archive.org/web/20140930210150/http://www.ll.mit.edu/about/about.html About Lincoln Laboratory]
** [https://web.archive.org/web/20140930203157/http://www.ll.mit.edu/employment/orgtechdivisions.html Organization of Technical Divisions]
* [https://web.archive.org/web/20140828220219/http://www.ll.mit.edu/about/History/RadLab.html MIT Radiation Laboratory]
* [https://web.archive.org/web/20140828223103/http://www.ll.mit.edu/about/History/SAGE_TOCpage.html SAGE: Semi-Automatic Ground Environment Air Defense System]
** [https://web.archive.org/web/20140828221136/http://www.ll.mit.edu/about/History/newthreat.html A New Threat]
** [https://web.archive.org/web/20140828224042/http://www.ll.mit.edu/about/History/origins.html Lincoln Laboratory Origins]
** [https://web.archive.org/web/20161204075643/http://www.ll.mit.edu/about/History/projectcharles.html Lincoln Laboratory Origins (part 2)]
** [https://web.archive.org/web/20140828213825/http://www.ll.mit.edu/about/History/SAGEairdefensesystem.html The SAGE Air Defense System]
** [https://web.archive.org/web/20140828221740/http://www.ll.mit.edu/about/History/earlydigitalcomputing.html Early Digital Computing]
** [https://web.archive.org/web/20150208150649/http://www.ll.mit.edu/about/History/digitalcomputing_2.html Early Digital Computing (part 2)]
** [https://web.archive.org/web/20140828223207/http://www.ll.mit.edu/about/History/capecodprototype.html Cape Cod SAGE Prototype]
** [https://web.archive.org/web/20140811144042/http://www.ll.mit.edu/about/History/capecodprototype-2.html Cape Cod SAGE Prototype (part 2)]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars.html Early-Warning Radars]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars2.html Part 2: MIT Lincoln Laboratory develops UHF early-warning radar]
** [https://web.archive.org/web/20140828221032/http://www.ll.mit.edu/about/History/earlywarningradars3.html Part 3: Jug Handle, Boston Hill, and Texas Tower radars]
** [https://web.archive.org/web/20140828221442/http://www.ll.mit.edu/about/History/transition.html SAGE Transition] - covers the creation of [[MITRE]]
** [https://web.archive.org/web/20140828222855/http://www.ll.mit.edu/about/History/reflections.html Reflections on SAGE]

** [https://web.archive.org/web/20140828223543/http://www.ll.mit.edu/about/History/newcallings.html New Callings]
* [https://web.archive.org/web/20140828224121/http://www.ll.mit.edu/about/History/historybook.html MIT Lincoln Laboratory's History Book]
* [https://web.archive.org/web/20160811032204/http://www.ll.mit.edu/about/History/60-innovations.pdf 60 Innovations Over Sixty Years: Highlights of Technology Advances at MIT Lincoln Laboratory]
* [http://bitsavers.org/pdf/mit/lincolnLaboratory/ Lincoln Laboratory] - documents at [[Bitsavers]]

[[Category: Research Organizations]]

M829

2025-10-23T15:39:01Z

Jnc: Redir - board

#Redirect [[CR11 Controller]]

M786

2025-10-23T15:36:55Z

Jnc: Redir - board

#Redirect [[DR11-A_General_Device_Interface]]

PC11 High-Speed Paper-Tape Reader/Punch Control

2025-10-23T14:00:54Z

Jnc: /* Registers */ link 'program compatible'

[[Image:PC11-M781.jpg|thumb|right|250px|M781 version]]

The '''PC11''' is the [[UNIBUS]] [[device controller]] for the [[PC04/PC05 High-Speed Paper-Tape Reader/Punch|PC05]] [[paper tape]] high-speed reader/punch. It uses [[programmed I/O]], with [[interrupt]]s when it is ready for/with more data.

[[Image:PC11-M7810.jpg|thumb|right|250px|M7810 version]]

There are two versions, both of which plug into an [[Small Peripheral Controller|SPC]] slot. The first is a [[DEC card form factor|dual]] card, the M781, which is used with an [[M105 Address Selector]] and an [[M782 Interrupt Control]] (both tall singles). The second is a single quad board, the M7810.

[[Image:BC08J.jpg|thumb|250px|right|BC08J cable]]

A pair of cables (one for the reader, one for the punch - to support reader-only or punch-only options) connect the controller to the device. The cables are different between the two versions of the PC11; the first has H807 connectors on the side of the controller card, into which small [[printed circuit board|PCBs]] with plated contact fingers plug; the second version uses BC08J cables, with a pair of female-shell/male-pin [[Berg connector]]s on the controller card.

==Registers==

The two versions are [[program compatible]]. The device has four control [[register]]s, which can be configured to any four sequential [[word]] locations in the I/O page; it is normally configured to [[address]]es 777550-777556:

{| border=1
! Register !! Abbreviation !! Address
|-
|Paper-Tape Reader Status Register || PRS || 777550
|-
|Paper-Tape Reader Buffer Register || PRB || 777552
|-
|Paper-Tape Punch Status Register || PPS || 777554
|-
|Paper-Tape Punch Buffer Register || PPB || 777556
|}

In the register contents (below), bits which are read/write or unused are shown in normal font, those which are read-only are in ''italics'', and write-only in '''bold'''.

===Reader Status Register (PRS)===
{{16bit-header}}
| ''ERR'' || colspan=3 | Unused || ''BUSY'' || colspan=3 | Unused || ''DONE'' || INT ENB || colspan=5 | Unused || '''RDR ENB'''
{{16bit-bitout}}

===Reader Buffer Register (PRB)===
{{16bit-header}}
| colspan=8 | Unused || colspan=8 | ''Input Data''
{{16bit-bitout}}

===Punch Status Register (PPS)===
{{16bit-header}}
| ''ERR'' || colspan=7 | Unused || ''RDY'' || INT ENB || colspan=6 | Unused
{{16bit-bitout}}

===Punch Buffer Register (PPB)===
{{16bit-header}}
| colspan=8 | Unused || colspan=8 | '''Output Data'''
{{16bit-bitout}}

The PPB does not respond to 'read' cycles on the UNIBUS.

==See also==

* [[KL11 Teletype Control]] - another early, half-height, controller card

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/PC11_Reader-Punch_Manual.pdf PC11 high-speed reader/punch and control manual] (EK-PC11-TM-003)
* [https://manx-docs.org/collections/hcps/PC11.pdf PC11 reader/punch control engineering drawings]
* [https://www.pdp-11.nl/peripherals/tape/pc05-info.html PC11 controller]

[[Category: UNIBUS Peripherals]]

PC11 High-Speed Paper-Tape Reader/Punch Control

2025-10-23T13:58:06Z

Jnc: /* See also */ +KL11 Teletype Control

[[Image:PC11-M781.jpg|thumb|right|250px|M781 version]]

The '''PC11''' is the [[UNIBUS]] [[device controller]] for the [[PC04/PC05 High-Speed Paper-Tape Reader/Punch|PC05]] [[paper tape]] high-speed reader/punch. It uses [[programmed I/O]], with [[interrupt]]s when it is ready for/with more data.

[[Image:PC11-M7810.jpg|thumb|right|250px|M7810 version]]

There are two versions, both of which plug into an [[Small Peripheral Controller|SPC]] slot. The first is a [[DEC card form factor|dual]] card, the M781, which is used with an [[M105 Address Selector]] and an [[M782 Interrupt Control]] (both tall singles). The second is a single quad board, the M7810.

[[Image:BC08J.jpg|thumb|250px|right|BC08J cable]]

A pair of cables (one for the reader, one for the punch - to support reader-only or punch-only options) connect the controller to the device. The cables are different between the two versions of the PC11; the first has H807 connectors on the side of the controller card, into which small [[printed circuit board|PCBs]] with plated contact fingers plug; the second version uses BC08J cables, with a pair of female-shell/male-pin [[Berg connector]]s on the controller card.

==Registers==

The two versions are programming-compatible. The device has four control [[register]]s, which can be configured to any four sequential [[word]] locations in the I/O page; it is normally configured to [[address]]es 777550-777556:

{| border=1
! Register !! Abbreviation !! Address
|-
|Paper-Tape Reader Status Register || PRS || 777550
|-
|Paper-Tape Reader Buffer Register || PRB || 777552
|-
|Paper-Tape Punch Status Register || PPS || 777554
|-
|Paper-Tape Punch Buffer Register || PPB || 777556
|}

In the register contents (below), bits which are read/write or unused are shown in normal font, those which are read-only are in ''italics'', and write-only in '''bold'''.

===Reader Status Register (PRS)===
{{16bit-header}}
| ''ERR'' || colspan=3 | Unused || ''BUSY'' || colspan=3 | Unused || ''DONE'' || INT ENB || colspan=5 | Unused || '''RDR ENB'''
{{16bit-bitout}}

===Reader Buffer Register (PRB)===
{{16bit-header}}
| colspan=8 | Unused || colspan=8 | ''Input Data''
{{16bit-bitout}}

===Punch Status Register (PPS)===
{{16bit-header}}
| ''ERR'' || colspan=7 | Unused || ''RDY'' || INT ENB || colspan=6 | Unused
{{16bit-bitout}}

===Punch Buffer Register (PPB)===
{{16bit-header}}
| colspan=8 | Unused || colspan=8 | '''Output Data'''
{{16bit-bitout}}

The PPB does not respond to 'read' cycles on the UNIBUS.

==See also==

* [[KL11 Teletype Control]] - another early, half-height, controller card

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/PC11_Reader-Punch_Manual.pdf PC11 high-speed reader/punch and control manual] (EK-PC11-TM-003)
* [https://manx-docs.org/collections/hcps/PC11.pdf PC11 reader/punch control engineering drawings]
* [https://www.pdp-11.nl/peripherals/tape/pc05-info.html PC11 controller]

[[Category: UNIBUS Peripherals]]

KL11 Teletype Control

2025-10-23T13:55:59Z

Jnc: /* See also */

[[Image:KL11.jpg|300px|right|thumb|A KL11 M780 card]]

The '''KL11 Teletype Control''' card ('''M780''') was a [[UNIBUS]] [[peripheral]] for the [[PDP-11]] series of computers; it provided a single [[asynchronous serial line]]. It was a [[DEC card form factor|dual]] format card; it plugged into a an [[Small Peripheral Controller|SPC]] slot, along with two standard single card [[FLIP CHIP]]s, the [[M105 Address Selector]] and the [[M782 Interrupt Control]].

The KL11 was one of the last [[Digital Equipment Corporation|DEC]] asynchronous serial interfaces to not use a [[Universal Asynchronous Receiver/Transmitter|UART]] [[MSI]] [[integrated circuit|chip]]; the first UART chip was still under development at the time. The serial/parallel conversion was done with discrete [[gate]]s, instead.

It provided a [[20mA current loop serial line interface]]; use of a [[DE11A]] allowed [[EIA RS-232 serial line interface|EIA RS-232]] connectivity. It operated at speeds of 110 to 2400 [[baud rate|baud]], depending on the model (each model supported only one speed combination):

{| class="wikitable"
! Model !! Input !! Output
|-
| KL11A || colspan="2" style="text-align:center;" | 110
|-
| KL11B || colspan="2" style="text-align:center;" | 150
|-
| KL11C || colspan="2" style="text-align:center;" | 300
|-
| KL11D || colspan="2" style="text-align:center;" | 600
|-
| KL11E || 100 || 1200
|-
| KL11F || colspan="2" style="text-align:center;" | 2400
|}

It was replaced by the functionally identical single quad board [[DL11 asynchronous serial line interface]].

==Programing interface==

The KL11 has 2 device [[register]]s for the receive side (one Control and Status Register - CSR - and one data buffer register), and similarly, two for the transmit side. Each KL11 has two [[interrupt vector]]s - again, one receive, and one transmit. This programming specification was continued for the lifetime of the [[PDP-11]], for single asynchronous serial line interfaces.

For the PDP-11 main console (which is always a KL11/DL11 compatible device), the 'zeroth' KL11, the standard is that 0777560 is the base [[address]] (so the receiver registers are 0777560-2, and the transmitter are 0777564-6), and 060 is the base vector.

The first KL11 after the console is always assigned the address 0776500, and vector 0300. Additional KL11's are assigned addresses and vectors immediately following, for LL11's #1-#16 (i.e. 0776500-676 and 0300-0476).

{{semi-stub}}

==See also==

* [[PC11 High-Speed Paper-Tape Reader/Punch Control]] - another early, half-height, controller card

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/KL11_TeletypeControlManual.pdf KL11 teletype control manual] (DEC-11-HR4C-D)
* [http://www.bitsavers.org/pdf/dec/unibus/KL11_EngrDrws.pdf KL11 teletype control engineering drawings] (DEC-11-HR4B-D)

[[Category: UNIBUS Asynchronous Serial Interfaces]]