https://gunkies.org/w/api.php?action=feedcontributions&user=Archivist&feedformat=atomComputer History Wiki - User contributions [en]2024-03-28T11:48:42ZUser contributionsMediaWiki 1.30.0https://gunkies.org/w/index.php?title=Ferranti&diff=1105Ferranti2007-05-26T18:54:11Z<p>Archivist: </p>
<hr />
<div>This was an old company that was doing a lot of electronics during the war and had contacts with the team at Manchester so it was natural that they manufactured the Mark I for Manchester University also known as MADAM and MADM<br />
<br />
They also made [[Atlass]] which was the biggest and fastest at the time of introduction<br />
<br />
{{stub}}<br />
<br />
[[Category:Computer Manufacturers]]</div>Archivisthttps://gunkies.org/w/index.php?title=Ferranti&diff=1104Ferranti2007-05-26T17:26:04Z<p>Archivist: Ferranti</p>
<hr />
<div>This was an old company that was doing a lot of electronics during the war and had contacts with the team at Manchester so it was natural that they manufactured the Mark I for Manchester University also known as MADAM and MADM<br />
<br />
{{stub}}<br />
<br />
[[Category:Computer Manufacturers]]</div>Archivisthttps://gunkies.org/w/index.php?title=LEO&diff=1103LEO2007-05-24T12:34:51Z<p>Archivist: </p>
<hr />
<div>Lyons Electronic Office was a brave start for a company that ran corner tea shops, they decided in 1949 to investigate the computer for their office functions. The design was based on the [[EDSAC]]. <br />
<br />
There was a public anouncement in "Electronic Engineering" of its running in production in April 1954 but it had at that time been under test and doing some government work for 18 months.<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=International_Business_Machines&diff=1102International Business Machines2007-05-22T19:58:25Z<p>Archivist: add some links (fixing orphan pages)</p>
<hr />
<div>'''IBM''', short for '''International Business Machines''' is a company which has played a decisive role in the history of computing.<br />
<br />
[[System/360]] Mainframe system<br />
<br />
[[IBM PC]] The IBM personal Computer<br />
<br />
[[MCA]] Micro Channel Architecture<br />
<br />
[[OS2]] <br />
<br />
==Relevant Categories==<br />
[[:Category:IBM Computers|IBM Computers]]<br />
<br />
[[Category:Computer Manufacturers]]<br />
[[Category:Mainframe Manufacturers]]</div>Archivisthttps://gunkies.org/w/index.php?title=Wireless_World_Digital_Computer&diff=1101Wireless World Digital Computer2007-05-22T19:23:36Z<p>Archivist: </p>
<hr />
<div>The forward :- (complete with spelling mistake)<br />
<br />
"Low-cost desk-top binary machine for small-scale calculations and for use in schools as a teaching aid, designed by B. Crank of "Wirless World" staff. Numbers are fed in manually and results of calculations are read from indicator lamps. Instructions, entered in binary coded form by a set of switches, are interpreted and carried out automatically by the machine"<br />
<br />
It was an 8 bit serial machine. It had three speeds 1 bit at a time initiated by a switch, slow 2 bits per sec and fast 2500 bits per second.<br />
<br />
[[Image:wwdcsm.jpg]]<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=File:Wwdcsm.jpg&diff=1100File:Wwdcsm.jpg2007-05-22T19:22:50Z<p>Archivist: Wireless World Digital Computer</p>
<hr />
<div>Wireless World Digital Computer</div>Archivisthttps://gunkies.org/w/index.php?title=Wireless_World_Digital_Computer&diff=1099Wireless World Digital Computer2007-05-22T19:05:40Z<p>Archivist: Wireless world computer</p>
<hr />
<div><br />
The forward :- (complete with spelling mistake)<br />
<br />
"Low-cost desk-top binary machine for small-scale calculations and for use in schools as a teaching aid, designed by B. Crank of "Wirless World" staff. Numbers are fed in manually and results of calculations are read from indicator lamps. Instructions, entered in binary coded form by a set of switches, are interpreted and carried out automatically by the machine"<br />
<br />
It was an 8 bit serial machine. It had three speeds 1 bit at a time initiated by a switch, slow 2 bits per sec and fast 2500 bits per second.<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=A._D._Booth&diff=1098A. D. Booth2007-05-22T13:02:52Z<p>Archivist: </p>
<hr />
<div>A.D. Booth PhD wrote a number of articles during the early 1950's about the design of circuits for computers and about the computers at Birkbeck college Electonic Computation Laboratory. He appears to claim to have operated the first magnetic store in November 1947<br />
<br />
He also mentions in his articles about the Norwegian Computer believed to be the [[NUSSE]].<br />
<br />
{{stub}}<br />
<br />
[[Category:People]]</div>Archivisthttps://gunkies.org/w/index.php?title=Atari&diff=1097Atari2007-05-22T12:59:38Z<p>Archivist: Atari</p>
<hr />
<div>A computer manufacturer specialising in consumer computers<br />
<br />
eg [[Atari 1200XL]] [[Atari 130XE]] [[Atari 400]] [[Atari 520ST]] [[Atari 600XL]] [[Atari 65XE]] [[Atari 800]] [[Atari 800XL]]<br />
<br />
{{stub}}<br />
<br />
[[Category:Computer Manufacturers]]</div>Archivisthttps://gunkies.org/w/index.php?title=S100&diff=1096S1002007-05-22T12:53:24Z<p>Archivist: </p>
<hr />
<div>{{stub}}<br />
<br />
The '''S100''' [[bus]] was designed for [[8080]] and [[8085]] but mainly used in many [[Z80]] systems. Being well defined it allowed many manufacturers to produce boards and cases for it, which made manufacture and expansion of a system very easy. Most used [[CP/M]] as the operating system on them.<br />
<br />
<br />
<br />
[[Category:Bus Architectures]]</div>Archivisthttps://gunkies.org/w/index.php?title=Bus&diff=1095Bus2007-05-22T12:52:00Z<p>Archivist: /* Parallel */</p>
<hr />
<div>{{wp-orig}}<br />
<br />
In [[computer architecture]], a '''bus''' is a subsystem that transfers data or power between computer components inside a [[computer]] or between computers and typically is controlled by [[device driver]] software. Unlike a [[Point-to-point link|point-to-point connection]], a bus can logically connect several [[peripheral]]s over the same set of wires. Each bus defines its set of [[connector]]s to physically plug devices, cards or cables together.<br />
<br />
Early computer buses were literally parallel [[electrical bus]]es with multiple connections, but the term is now used for any physical arrangement that provides the same logical functionality as a parallel electrical bus. Modern computer buses can use both parallel and bit-serial connections, and can be wired in either a [[multidrop]] (electrical parallel) or [[daisy chain]] topology, or connected by switched hubs, as in the case of [[Universal Serial Bus|USB]].<br />
<br />
===First generation=== <br />
Early [[computer]] buses were bundles of wire that attached [[Computer storage|memory]] and peripherals. They were named after [[Electrical bus|electrical buses]], or busbars. Almost always, there was one bus for memory, and another for peripherals, and these were accessed by separate instructions, with completely different timings and protocols.<br />
<br />
One of the first complications was the use of [[interrupt]]s. Early computers performed [[Input/output|I/O]] by waiting in a loop for the peripheral to become ready. This was a waste of time for programs that had other tasks to do. Also, if the program attempted to perform those other tasks, it might take too long for the program to check again, resulting in lost data. Engineers thus arranged for the peripherals to interrupt the CPU. The interrupts had to be prioritized, because the CPU can only execute code for one peripheral at a time, and some devices are more time-critical than others.<br />
<br />
Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prioritized, as well.<br />
<br />
The classic, simple way to prioritize interrupts or bus access was with a [[daisy chain]].<br />
<br />
[[Digital Equipment Corporation|DEC]] noted that having two buses seemed wasteful and expensive for small, mass-produced computers, and mapped peripherals into the memory bus, so that the devices appeared to be memory locations. At the time, this was a very daring design. Cynics predicted failure.<br />
<br />
Early [[microcomputer]] bus systems were essentially a passive [[backplane]] connected to the pins of the [[Central processing unit|CPU]]. Memory and other devices would be added to the bus using the same address and data pins as the CPU itself used, connected in parallel. In some instances, such as the [[IBM PC]], instructions still generated signals at the CPU that could be used to implement a true I/O bus. <br />
<br />
In many microcontrollers and [[embedded systems]], an I/O bus still does not exist. Communication is controlled by the [[Central processing unit|CPU]], which reads and writes data from the devices as if they are blocks of memory (in most cases), all timed by a central clock controlling the speed of the CPU. Devices ask for service by signalling on other CPU pins, typically using some form of [[interrupt]]. <br />
<br />
For instance, a [[disk drive]] controller would signal the CPU that new data was ready to be read, at which point the CPU would move the data by reading the memory that corresponded to the disk drive. Almost all early computers were built in this fashion, starting with the [[S-100 bus]] in the [[Altair 8800|Altair]], and continuing through the [[IBM PC]] in the [[1980s]].<br />
<br />
These simple bus systems had a serious drawback for general-purpose computers. All the equipment on the bus has to talk at the same speed, and thus shares a single clock.<br />
<br />
Increasing the speed of the CPU is not a simple matter, because the speed of all the devices must increase as well. This often leads to odd situations where very fast CPUs have to "slow down" in order to talk to other devices in the computer. While acceptable in [[embedded system]]s, this problem was not tolerated for long in commercial computers.<br />
<br />
Another problem is that the CPU is required for all operations, so if it becomes busy with other tasks, the real [[throughput]] of the bus could suffer dramatically. <br />
<br />
Such bus systems are difficult to configure when constructed from common off-the-shelf equipment. Typically each added PC board requires many [[jumper]]s in order to set memory addresses, I/O addresses, interrupt priorities, and interrupt numbers.<br />
<br />
===Second generation===<br />
"Second generation" bus systems like '''[[NuBus]]''' addressed some of these problems. They typically separated the computer into two "worlds", the CPU and memory on one side, and the various devices on the other, with a ''bus controller'' in between. This allowed the CPU to increase in speed without affecting the bus. This also moved much of the burden for moving the data out of the CPU and into the cards and controller, so devices on the bus could talk to each other with no CPU intervention. This led to much better "real world" performance, but also required the cards to be much more complex. These buses also often addressed speed issues by being "bigger" in terms of the size of the data path, moving from 8-bit [[parallel bus]]es in the first generation, to 16 or 32-bit in the second, as well as adding software setup (now standardised as [[Plug-n-play]]) to supplant or replace the jumpers.<br />
<br />
However these newer systems shared one quality with their earlier cousins, in that everyone on the bus had to talk at the same speed. While the CPU was now isolated and could increase speed without fear, CPUs and memory continued to increase in speed much faster than the buses they talked to. The result was that the bus speeds were now very much slower than what a modern system needed, and the machines were left starved for data. A particularly common example of this problem was that [[video card]]s quickly outran even the newer bus systems like '''[[Peripheral Component Interconnect|PCI]]''', and computers began to include '''[[Accelerated Graphics Port|AGP]]''' just to drive the video card. By [[2004]] AGP was outgrown again by high-end video cards and is being replaced with the new '''[[PCI Express]]''' bus.<br />
<br />
An increasing number of external devices started employing their own bus systems as well. When disk drives were first introduced, they would be added to the machine with a card plugged into the bus, which is why computers have so many slots on the bus. But through the [[1980s]] and [[1990s]], new systems like '''[[SCSI]]''' and '''[[Integrated Drive Electronics|IDE]]''' were introduced to serve this need, leaving most slots in modern systems empty. Today there are likely to be about five different buses in the typical machine, supporting various devices.<br />
<br />
A useful differentiation then became popular, the concept of the '''local bus''' as opposed to '''external bus'''. The former referred to bus systems that were designed to be used with internal devices, such as graphics cards, and the latter to buses designed to add external devices such as [[image scanner|scanner]]s. Note, though, that "local" also referred to the greater proximity to the processor of VL-Bus and PCI than ISA. IDE is an external bus in terms of how it is used, but is almost always found inside the machine.<br />
<br />
===Third generation===<br />
"Third generation" buses are now in the process of coming to market, including '''[[HyperTransport]]''' and '''[[InfiniBand]]'''. They typically include features that allow them to run at the very high speeds needed to support memory and video cards, while also supporting lower speeds when talking to slower devices such as disk drives. They also tend to be very flexible in terms of their physical connections, allowing them to be used both as internal buses, as well as connecting different machines together. This can lead to complex problems when trying to service different requests, so much of the work on these systems concerns software design, as opposed to the hardware itself. In general, these third generation buses tend to look more like a [[computer network|network]] than the original concept of a bus, with a higher protocol overhead needed than early systems, while also allowing multiple devices to use the bus at once.<br />
<br />
On another track, integrated circuits are increasingly being designed from predesigned logic, "intellectual property." Buses such as [[Wishbone (computer bus)|Wishbone]] have been developed to permit devices on integrated circuits to talk to one another.<br />
<br />
==Description of a bus==<br />
At one time, "bus" meant an electrically parallel system, with electrical conductors similar or identical to the pins on the CPU. This is no longer the case, and modern systems are blurring the lines between buses and networks.<br />
<br />
Buses can be [[parallel communications|parallel buses]], which carry data words striped across multiple wires, or [[serial bus]]es, which carry data in bit-serial form. The addition of extra power and control connections, differential drivers, and data connections in each direction usually means that most serial buses have more conductors than the minimum of two used in the [[I²C]] serial bus. As data rates increase, the problems of [[timing skew]] and [[crosstalk]] across parallel buses become more and more difficult to circumvent. One partial solution to this problem has been to [[double pumped|double pump]] the bus. Often, a serial bus can actually be operated at higher overall data rates than a parallel bus, despite having fewer electrical connections, because a serial bus inherently has no timing skew or crosstalk. [[Universal Serial Bus|USB]], [[FireWire]], and [[Serial ATA]] are examples of this. [[Multidrop]] connections do not work well for fast serial buses, so most modern serial buses use [[daisy-chain]] or hub designs.<br />
<br />
Most computers have both internal and external buses. An ''internal bus'' connects all the internal components of a computer to the motherboard (and thus, the [[Central processing unit|CPU]] and [[internal memory]]). These types of buses are also referred to as a [[local bus]], because they are intended to connect to local devices, not to those in other machines or external to the computer. An ''external bus'' connects external peripherals to the motherboard.<br />
<br />
[[computer network|Network]] connections such as [[Ethernet]] are not generally regarded as buses, although the difference is largely conceptual rather than practical. The arrival of technologies such as [[InfiniBand]] and [[HyperTransport]] is further blurring the boundaries between networks and buses. Even the lines between internal and external are sometimes fuzzy, [[I²C]] can be used as both an internal bus, or an external bus (where it is known as [[ACCESS.bus]]), and InfiniBand is intended to replace both internal buses like [[Peripheral Component Interconnect|PCI]] as well as external ones like [[Fibre Channel]].<br />
<br />
Modern trends in personal computers, especially laptops, have been moving towards eliminating all external connections except for modem jack, [[Category 5 cable|Cat5]], USB, [[Jack plug|headphone jack]], and optional [[VGA]] or FireWire.<br />
<br />
==Bus topology==<br />
In a network, the master scheduler controls the data traffic. If data is to be transferred the requesting computer sends a message to the scheduler, which puts the request into a queue. The message contains an identification code which is broadcast to all nodes of the network. The scheduler works out priorities and notifies the receiver as soon as the bus is available.<br />
<br />
The identified node takes the message and performs the data transfer between the two computers. Having completed the data transfer the bus becomes free for the next request in the scheduler's queue.<br />
<br />
Bus benefit: any computer can be accessed directly and message can be sent in a relatively simple and fast way.<br />
Disadvantage: needs a scheduler to assign frequencies and priorities to organize the traffic.<br />
<br />
See also: [[Bus network]]<br />
<br />
== Examples of internal computer buses ==<br />
===Parallel===<br />
* [[ASUS Media Bus]] proprietary, used on some [[ASUS]] [[Socket 7]] motherboards<br />
* [[CAMAC]] for instrumentation systems<br />
* [[Extended ISA]] or EISA<br />
* [[Industry Standard Architecture]] or ISA<br />
* [[Low Pin Count]] or LPC<br />
* [[MicroChannel]] or MCA<br />
* [[MBus]] <br />
* [[Multibus]] for industrial systems<br />
* [[NuBus]] or IEEE 1196<br />
* [[OPTi local bus]] used on early [[Intel 80486]] motherboards.<br />
* [[Peripheral Component Interconnect]] or PCI <br />
* [[S100]] bus or IEEE 696, used in the [[Altair]] and similar [[microcomputers]]<br />
* [[SBus]] or IEEE 1496<br />
* [[VESA Local Bus]] or VLB or VL-bus<br />
* [[VME]], the VERSAmodule Eurocard bus<br />
* STD Bus for 8- and 16-bit microprocessor systems<br />
<br />
===Serial===<br />
* [[1-Wire]]<br />
* [[HyperTransport]]<br />
* [[I²C]]<br />
* [[PCI Express]] or PCIe<br />
* [[Serial Peripheral Interface Bus]] or SPI bus<br />
* [[USB]] Universal Serial Bus<br />
<br />
== Examples of external computer buses ==<br />
===Parallel===<br />
* [[Advanced Technology Attachment]] or ATA (aka PATA, IDE, EIDE, ATAPI, etc.) disk/tape peripheral attachment bus<br>(the original ATA is parallel, but see also the recent [[serial ATA]])<br />
<br />
* [[IEEE-488]] (aka GPIB, General-Purpose Instrumentation Bus, and HPIB, Hewlett-Packard Instrumentation Bus)<br />
* [[SCSI]] Small Computer System Interface, disk/tape peripheral attachment bus<br />
<br />
== Examples of internal/external computer buses ==<br />
* [[Futurebus]]<br />
* [[InfiniBand]]<br />
* [[QuickRing]]<br />
* [[Scalable Coherent Interconnect|SCI]]<br />
<!-- * [[Bus topology]] (redirects here --><br />
<br />
== See also==<br />
*[[Address bus]]<br />
*[[Bus contention]]<br />
*[[Control bus]]<br />
*[[Front side bus]]<br />
*[[Network On Chip]]<br />
<br />
== External links ==<br />
* Chip Weems' [http://www.cs.umass.edu/~weems/CmpSci635/635lecture12.html Lecture 12: Buses]<br />
* {{dmoz|Computers/Hardware/Buses/|Computer hardware buses}}<br />
<br />
[[Category:Computer buses|*Computer bus]]</div>Archivisthttps://gunkies.org/w/index.php?title=Bus&diff=1094Bus2007-05-22T12:51:22Z<p>Archivist: /* Parallel */</p>
<hr />
<div>{{wp-orig}}<br />
<br />
In [[computer architecture]], a '''bus''' is a subsystem that transfers data or power between computer components inside a [[computer]] or between computers and typically is controlled by [[device driver]] software. Unlike a [[Point-to-point link|point-to-point connection]], a bus can logically connect several [[peripheral]]s over the same set of wires. Each bus defines its set of [[connector]]s to physically plug devices, cards or cables together.<br />
<br />
Early computer buses were literally parallel [[electrical bus]]es with multiple connections, but the term is now used for any physical arrangement that provides the same logical functionality as a parallel electrical bus. Modern computer buses can use both parallel and bit-serial connections, and can be wired in either a [[multidrop]] (electrical parallel) or [[daisy chain]] topology, or connected by switched hubs, as in the case of [[Universal Serial Bus|USB]].<br />
<br />
===First generation=== <br />
Early [[computer]] buses were bundles of wire that attached [[Computer storage|memory]] and peripherals. They were named after [[Electrical bus|electrical buses]], or busbars. Almost always, there was one bus for memory, and another for peripherals, and these were accessed by separate instructions, with completely different timings and protocols.<br />
<br />
One of the first complications was the use of [[interrupt]]s. Early computers performed [[Input/output|I/O]] by waiting in a loop for the peripheral to become ready. This was a waste of time for programs that had other tasks to do. Also, if the program attempted to perform those other tasks, it might take too long for the program to check again, resulting in lost data. Engineers thus arranged for the peripherals to interrupt the CPU. The interrupts had to be prioritized, because the CPU can only execute code for one peripheral at a time, and some devices are more time-critical than others.<br />
<br />
Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prioritized, as well.<br />
<br />
The classic, simple way to prioritize interrupts or bus access was with a [[daisy chain]].<br />
<br />
[[Digital Equipment Corporation|DEC]] noted that having two buses seemed wasteful and expensive for small, mass-produced computers, and mapped peripherals into the memory bus, so that the devices appeared to be memory locations. At the time, this was a very daring design. Cynics predicted failure.<br />
<br />
Early [[microcomputer]] bus systems were essentially a passive [[backplane]] connected to the pins of the [[Central processing unit|CPU]]. Memory and other devices would be added to the bus using the same address and data pins as the CPU itself used, connected in parallel. In some instances, such as the [[IBM PC]], instructions still generated signals at the CPU that could be used to implement a true I/O bus. <br />
<br />
In many microcontrollers and [[embedded systems]], an I/O bus still does not exist. Communication is controlled by the [[Central processing unit|CPU]], which reads and writes data from the devices as if they are blocks of memory (in most cases), all timed by a central clock controlling the speed of the CPU. Devices ask for service by signalling on other CPU pins, typically using some form of [[interrupt]]. <br />
<br />
For instance, a [[disk drive]] controller would signal the CPU that new data was ready to be read, at which point the CPU would move the data by reading the memory that corresponded to the disk drive. Almost all early computers were built in this fashion, starting with the [[S-100 bus]] in the [[Altair 8800|Altair]], and continuing through the [[IBM PC]] in the [[1980s]].<br />
<br />
These simple bus systems had a serious drawback for general-purpose computers. All the equipment on the bus has to talk at the same speed, and thus shares a single clock.<br />
<br />
Increasing the speed of the CPU is not a simple matter, because the speed of all the devices must increase as well. This often leads to odd situations where very fast CPUs have to "slow down" in order to talk to other devices in the computer. While acceptable in [[embedded system]]s, this problem was not tolerated for long in commercial computers.<br />
<br />
Another problem is that the CPU is required for all operations, so if it becomes busy with other tasks, the real [[throughput]] of the bus could suffer dramatically. <br />
<br />
Such bus systems are difficult to configure when constructed from common off-the-shelf equipment. Typically each added PC board requires many [[jumper]]s in order to set memory addresses, I/O addresses, interrupt priorities, and interrupt numbers.<br />
<br />
===Second generation===<br />
"Second generation" bus systems like '''[[NuBus]]''' addressed some of these problems. They typically separated the computer into two "worlds", the CPU and memory on one side, and the various devices on the other, with a ''bus controller'' in between. This allowed the CPU to increase in speed without affecting the bus. This also moved much of the burden for moving the data out of the CPU and into the cards and controller, so devices on the bus could talk to each other with no CPU intervention. This led to much better "real world" performance, but also required the cards to be much more complex. These buses also often addressed speed issues by being "bigger" in terms of the size of the data path, moving from 8-bit [[parallel bus]]es in the first generation, to 16 or 32-bit in the second, as well as adding software setup (now standardised as [[Plug-n-play]]) to supplant or replace the jumpers.<br />
<br />
However these newer systems shared one quality with their earlier cousins, in that everyone on the bus had to talk at the same speed. While the CPU was now isolated and could increase speed without fear, CPUs and memory continued to increase in speed much faster than the buses they talked to. The result was that the bus speeds were now very much slower than what a modern system needed, and the machines were left starved for data. A particularly common example of this problem was that [[video card]]s quickly outran even the newer bus systems like '''[[Peripheral Component Interconnect|PCI]]''', and computers began to include '''[[Accelerated Graphics Port|AGP]]''' just to drive the video card. By [[2004]] AGP was outgrown again by high-end video cards and is being replaced with the new '''[[PCI Express]]''' bus.<br />
<br />
An increasing number of external devices started employing their own bus systems as well. When disk drives were first introduced, they would be added to the machine with a card plugged into the bus, which is why computers have so many slots on the bus. But through the [[1980s]] and [[1990s]], new systems like '''[[SCSI]]''' and '''[[Integrated Drive Electronics|IDE]]''' were introduced to serve this need, leaving most slots in modern systems empty. Today there are likely to be about five different buses in the typical machine, supporting various devices.<br />
<br />
A useful differentiation then became popular, the concept of the '''local bus''' as opposed to '''external bus'''. The former referred to bus systems that were designed to be used with internal devices, such as graphics cards, and the latter to buses designed to add external devices such as [[image scanner|scanner]]s. Note, though, that "local" also referred to the greater proximity to the processor of VL-Bus and PCI than ISA. IDE is an external bus in terms of how it is used, but is almost always found inside the machine.<br />
<br />
===Third generation===<br />
"Third generation" buses are now in the process of coming to market, including '''[[HyperTransport]]''' and '''[[InfiniBand]]'''. They typically include features that allow them to run at the very high speeds needed to support memory and video cards, while also supporting lower speeds when talking to slower devices such as disk drives. They also tend to be very flexible in terms of their physical connections, allowing them to be used both as internal buses, as well as connecting different machines together. This can lead to complex problems when trying to service different requests, so much of the work on these systems concerns software design, as opposed to the hardware itself. In general, these third generation buses tend to look more like a [[computer network|network]] than the original concept of a bus, with a higher protocol overhead needed than early systems, while also allowing multiple devices to use the bus at once.<br />
<br />
On another track, integrated circuits are increasingly being designed from predesigned logic, "intellectual property." Buses such as [[Wishbone (computer bus)|Wishbone]] have been developed to permit devices on integrated circuits to talk to one another.<br />
<br />
==Description of a bus==<br />
At one time, "bus" meant an electrically parallel system, with electrical conductors similar or identical to the pins on the CPU. This is no longer the case, and modern systems are blurring the lines between buses and networks.<br />
<br />
Buses can be [[parallel communications|parallel buses]], which carry data words striped across multiple wires, or [[serial bus]]es, which carry data in bit-serial form. The addition of extra power and control connections, differential drivers, and data connections in each direction usually means that most serial buses have more conductors than the minimum of two used in the [[I²C]] serial bus. As data rates increase, the problems of [[timing skew]] and [[crosstalk]] across parallel buses become more and more difficult to circumvent. One partial solution to this problem has been to [[double pumped|double pump]] the bus. Often, a serial bus can actually be operated at higher overall data rates than a parallel bus, despite having fewer electrical connections, because a serial bus inherently has no timing skew or crosstalk. [[Universal Serial Bus|USB]], [[FireWire]], and [[Serial ATA]] are examples of this. [[Multidrop]] connections do not work well for fast serial buses, so most modern serial buses use [[daisy-chain]] or hub designs.<br />
<br />
Most computers have both internal and external buses. An ''internal bus'' connects all the internal components of a computer to the motherboard (and thus, the [[Central processing unit|CPU]] and [[internal memory]]). These types of buses are also referred to as a [[local bus]], because they are intended to connect to local devices, not to those in other machines or external to the computer. An ''external bus'' connects external peripherals to the motherboard.<br />
<br />
[[computer network|Network]] connections such as [[Ethernet]] are not generally regarded as buses, although the difference is largely conceptual rather than practical. The arrival of technologies such as [[InfiniBand]] and [[HyperTransport]] is further blurring the boundaries between networks and buses. Even the lines between internal and external are sometimes fuzzy, [[I²C]] can be used as both an internal bus, or an external bus (where it is known as [[ACCESS.bus]]), and InfiniBand is intended to replace both internal buses like [[Peripheral Component Interconnect|PCI]] as well as external ones like [[Fibre Channel]].<br />
<br />
Modern trends in personal computers, especially laptops, have been moving towards eliminating all external connections except for modem jack, [[Category 5 cable|Cat5]], USB, [[Jack plug|headphone jack]], and optional [[VGA]] or FireWire.<br />
<br />
==Bus topology==<br />
In a network, the master scheduler controls the data traffic. If data is to be transferred the requesting computer sends a message to the scheduler, which puts the request into a queue. The message contains an identification code which is broadcast to all nodes of the network. The scheduler works out priorities and notifies the receiver as soon as the bus is available.<br />
<br />
The identified node takes the message and performs the data transfer between the two computers. Having completed the data transfer the bus becomes free for the next request in the scheduler's queue.<br />
<br />
Bus benefit: any computer can be accessed directly and message can be sent in a relatively simple and fast way.<br />
Disadvantage: needs a scheduler to assign frequencies and priorities to organize the traffic.<br />
<br />
See also: [[Bus network]]<br />
<br />
== Examples of internal computer buses ==<br />
===Parallel===<br />
* [[ASUS Media Bus]] proprietary, used on some [[ASUS]] [[Socket 7]] motherboards<br />
* [[CAMAC]] for instrumentation systems<br />
* [[Extended ISA]] or EISA<br />
* [[Industry Standard Architecture]] or ISA<br />
* [[Low Pin Count]] or LPC<br />
* [[MicroChannel]] or MCA<br />
* [[MBus]] <br />
* [[Multibus]] for industrial systems<br />
* [[NuBus]] or IEEE 1196<br />
* [[OPTi local bus]] used on early [[Intel 80486]] motherboards.<br />
* [[Peripheral Component Interconnect]] or PCI <br />
* [[S100]] bs or IEEE 696, used in the [[Altair]] and similar [[microcomputers]]<br />
* [[SBus]] or IEEE 1496<br />
* [[VESA Local Bus]] or VLB or VL-bus<br />
* [[VME]], the VERSAmodule Eurocard bus<br />
* STD Bus for 8- and 16-bit microprocessor systems<br />
<br />
===Serial===<br />
* [[1-Wire]]<br />
* [[HyperTransport]]<br />
* [[I²C]]<br />
* [[PCI Express]] or PCIe<br />
* [[Serial Peripheral Interface Bus]] or SPI bus<br />
* [[USB]] Universal Serial Bus<br />
<br />
== Examples of external computer buses ==<br />
===Parallel===<br />
* [[Advanced Technology Attachment]] or ATA (aka PATA, IDE, EIDE, ATAPI, etc.) disk/tape peripheral attachment bus<br>(the original ATA is parallel, but see also the recent [[serial ATA]])<br />
<br />
* [[IEEE-488]] (aka GPIB, General-Purpose Instrumentation Bus, and HPIB, Hewlett-Packard Instrumentation Bus)<br />
* [[SCSI]] Small Computer System Interface, disk/tape peripheral attachment bus<br />
<br />
== Examples of internal/external computer buses ==<br />
* [[Futurebus]]<br />
* [[InfiniBand]]<br />
* [[QuickRing]]<br />
* [[Scalable Coherent Interconnect|SCI]]<br />
<!-- * [[Bus topology]] (redirects here --><br />
<br />
== See also==<br />
*[[Address bus]]<br />
*[[Bus contention]]<br />
*[[Control bus]]<br />
*[[Front side bus]]<br />
*[[Network On Chip]]<br />
<br />
== External links ==<br />
* Chip Weems' [http://www.cs.umass.edu/~weems/CmpSci635/635lecture12.html Lecture 12: Buses]<br />
* {{dmoz|Computers/Hardware/Buses/|Computer hardware buses}}<br />
<br />
[[Category:Computer buses|*Computer bus]]</div>Archivisthttps://gunkies.org/w/index.php?title=1950&diff=109319502007-05-22T12:05:57Z<p>Archivist: 1950</p>
<hr />
<div>{{stub}}<br />
=The year 1950 in computer history=<br />
{{year|year=1950|prev=1949|next=1951}}<br />
<br />
* needs info</div>Archivisthttps://gunkies.org/w/index.php?title=1967&diff=109219672007-05-22T09:10:37Z<p>Archivist: 1967</p>
<hr />
<div>{{stub}}<br />
=The year 1967 in computer history=<br />
{{year|year=1967|prev=1966|next=1968}}<br />
<br />
* A magazine in the UK Wireless world serialised the building of a computer the [[Wireless World Digital Computer]]. It was designed to use surplus transistors and was serial to keep the cost down.</div>Archivisthttps://gunkies.org/w/index.php?title=LEO&diff=1091LEO2007-05-21T08:59:23Z<p>Archivist: Lyons Electronic Office</p>
<hr />
<div>Lyons Electronic Office was a brave start for a company that ran corner tea shops, they decided in 1949 to investigate the computer for their office functions. The design was based on the [[EDSAC]]. The public anouncement of its running in production was in April 1954 but it had at that time been under test and doing some government work for 18 months.<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=A._D._Booth&diff=1088A. D. Booth2007-05-19T21:06:38Z<p>Archivist: The first magnetic Store (until we know different!)</p>
<hr />
<div>A.D. Booth PhD wrote a number of articles during the early 1950's about the design of circuits for computers and about the computers at Birkbeck college Electonic Computation Laboratory. He appears to claim to have operated the first magnetic store in November 1947<br />
<br />
{{stub}}<br />
<br />
[[Category:People]]</div>Archivisthttps://gunkies.org/w/index.php?title=Category:People&diff=1087Category:People2007-05-19T20:57:02Z<p>Archivist: </p>
<hr />
<div>People who made a difference in computing eg Grace Hopper, [[M.V. Wilkes]], [[A.M. Turing]], Knuth, F.W. Wilkinson, Clive Sinclair, [[A.D. Booth]]</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1085EDSAC2007-05-19T20:50:55Z<p>Archivist: add a bit more explanation</p>
<hr />
<div>EDSAC Electronic Delay Storage Automatic Calculator was conceived in 1946, the machine did its first calculation in the summer of 1949<br />
<br />
The EDSAC order code<br />
<br />
The action of the machine proceeds in two stages; instage I an order passes from the store into the control unit; in stage II the order is executed. The machine then proceeds automatically to repeat stage I, in general taking the order from the storage location following that containing the order just executed. (add exception note here) Each<br />
order calls for one simple operation to be performed; for example, it maycause some number to be extracted from the store and added to whatever happens to be in the acumulator, the sum being left in in the accumulator, or it ma cause the contents of the accumulator to be transfered to the store. Some orders, for example left or right shift orders, do not involve the use of the store at all.<br />
<br />
There are in the EDSAC code eighteen orders from which the programmer can build up his program. They are written in the form of a letter indicating the function of the order, and a number (the address) specifying the location (if any) in the store concerned. The address is followed by the code letter F if it refers to a short storage location, and by the code letter D if it refers to a long storage location, The full order code for the EDSAC is as follows:<br />
<br />
'''Order Code'''<br />
<br />
Where the code letter terminating an order is not shown it may be either F or D.<br />
<br />
{|class="wikitable"<br />
|-<br />
| Order || Description <br />
|-<br />
| A n || Add the number in storage location n into the accumulator<br />
|-<br />
| S n || Subtract the number in storage location n from the accumulator<br />
|-<br />
| H n || Copy the number in storagae location n into the multiplier register<br />
|-<br />
| V n || Multiply the number in storage location n by the number in the multiplier register and add the product into the accumulator<br />
|-<br />
| N n || Multiply the number in storage location n by the number in the multiplier register and subtract the product into the accumulator<br />
|-<br />
| T || Transfer the contents of the accumulator to storage location n and clear the accumulator<br />
|-<br />
| U || Transfer the contents of the accumulator to storage location n and do not clear the accumulator<br />
|-<br />
| C || Collate the number in storage location n with the number in the multiplier register and add the result into the accumulator; that is, add a "1" into the accumulator in digital positions where both numbers have a "1" , and add a "0" in other digital positions<br />
|-<br />
| * R D || Shift the number in the accumulator one place to the right; that is, multiply by 2<sup>-1</sup><br />
|-<br />
| ** R 2<sup>p-2</sup> F || Shift the number in the accumulator p places to the right; that is, multiply it by 2<sup>-p</sup> (2&le;p&le;12)<br />
|-<br />
| R F || Shift the number in the accumulator 15 places to the right; that is, multiply it by 2<sup>-15</sup><br />
|-<br />
| * L F || Shift the number in the accumulator 1 place to the left; that is, multiply it by 2<br />
|-<br />
| ** L 2<sup>p-1</sup> F || Shift the number in the accumulator p places to the left; that is, multiply it by 2<sup>p</sup> (2&le;p&le;12)<br />
|-<br />
| L F || Shift the number in the accumulator 13 places to the left; that is, multiply it by 2<sup>13</sup><br />
|-<br />
| E n F || If the number in the accumulator is greater than or equal to zero, execute the next order which stands in storage location n; else proceed serially<br />
|-<br />
| G n F || If the number in the accumulator is greater than zero, execute the next order which stands in storage location n; else proceed serially<br />
|-<br />
| I n || Read the next row of holes on the input tape and place the resulting integer, multipled by 2<sup>-16</sup>, in storage location n<br />
|-<br />
| O n || Print the character now set up on the teleprinter and set up on the teleprinter the character represented by the five most significant digits in storage location n<br />
|-<br />
| F n || Place the five digits which represent the character now set up on the teleprinter in the five most significant digits in storage location n, clearing the remainder of this location<br />
|-<br />
| * X || Ineffective; machine proceeds to the next order<br />
|-<br />
| * Y || Round-off the numberin the accumulator to 34 binary digits; that is, add 2<sup>-35</sup> into the accumulator<br />
|-<br />
| * Z || Stop the machine <br />
|-<br />
|}<br />
<br />
* The addresses in these order codes need not be zero.<br />
** The addresses in these orders may be k.2<sup>p-1</sup> where k is odd, provided that the addresses do not exceed 2047.<br />
<br />
<br />
<br />
<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=MOS_Technology_6502&diff=1076MOS Technology 65022007-05-19T19:20:25Z<p>Archivist: </p>
<hr />
<div>The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for [[MOS Technology]] in 1975. When it was introduced, it was the least expensive full-featured CPU on the market by a considerable margin, costing less than one-sixth the price of competing designs from larger companies such as Motorola and Intel. It was nevertheless faster than most of them, and, along with the [[Zilog Z80]], sparked a series of computer projects that would eventually result in the home computer revolution of the 1980s. <br />
<br />
It was widely used in [[Apple]], [[Atari]] and [[BBC]] computers.<br />
<br />
[[Image:MOS 6502AD 4585 top.jpg]]</div>Archivisthttps://gunkies.org/w/index.php?title=FLIP_CHIP&diff=1075FLIP CHIP2007-05-19T18:33:33Z<p>Archivist: Undo revision 1074 by Special:Contributions/67.162.90.34 (User talk:67.162.90.34)</p>
<hr />
<div>{{DEC-HW-stub}}<br />
[[Image:B Series Flip Chip.jpg|thumb|300px|A B series Flip-Chip]]<br />
'''Flip-Chip''' was a [[DEC]] registered trademark, named after the "flipchip" component mounting technique which quite rapidly faded from fame. The name was retained although the majority of Flip-Chips never really were flipchip-mounted as it became apparent that the flipchip mounting technique was highly unreliable. Flip-chips were used in the DEC [[PDP-7]] (Referred to in documentation as the "FLIP CHIP"), [[PDP-8]], [[PDP-9]] and [[PDP-10]], beginning on August 24, 1964.<br />
<br />
In practice, they performed generic, simple functions, similar to an integrated circuit. They were approximately 4 inches long and 2.5 inches wide. Each had 36 connectors, 18 on each side.<br />
<br />
== Naming ==<br />
<br />
There appeared to be some confusion inside DEC at the time, as various manuals refer to it as "FLIP CHIP", "Flip Chip", "FLIP-CHIP", "Flip-Chip" and "Flip Chip", with trademark and registered trademark symbols.<br />
<br />
==Flip-Chip families==<br />
<br />
[[Image:FlipChips.jpeg|thumb|250px|Flip-chips in different forms and a rainbow of colours, in a [[PDP-8]].]]<br />
The various families were colour-coded, and the first letter denoted a colour, which was also visible on the handle.<br />
<br />
===A series===<br />
<br />
''See the list of [[List of DEC part numbers#A series|DEC parts]].''<br />
<br />
The A stands for Amber. The A series were used for analog functions - ADCs, DACs, amplifiers etc.<br />
<br />
===B series===<br />
<br />
The B stands for Blue. The B series were used as core logic in the higher-end CPUs.<br />
<br />
===G series===<br />
<br />
The G stands for Green. The G series were used for "anything with non-standard voltages", I think. <br />
<br />
===M series===<br />
<br />
''See the list of [[List of DEC part numbers#M series|DEC parts]].<br />
<br />
The M stands for magenta. Part of this line is simple TTL-level logic, while later on, it became quite complex, see [[list of DEC part numbers]]. They replaced the R series which used discrete transistors with integrated circuits.<br />
<br />
* Power supply: 5 V<br />
* Operate at up to 6 MHz<br />
<br />
===R series===<br />
<br />
The R stands for Red. Slower logic than the B series, but cheaper. Used extensively in the I/O circuitry of computers. <br />
<br />
* Slower logic than B series, cheaper<br />
* Used in a variety of systems, e.g. [[PDP-8]]<br />
* Power supply 10 and -15 volts<br />
* Operational to 2 megahertz<br />
* Signal level 0 volts, logic 0 and -3 volts, logic 1<br />
* Typical price $20 to $30<br />
<br />
=== S series ===<br />
<br />
The S series is identical to the R seriese except that its transistors switch faster and lower resistance resistors, allowing more cards to be wired in series and operate somewhat faster.<br />
<br />
===W series===<br />
<br />
The W stands for White. These are components that plug into Flip-Chip sockets, but have no logic of their own.</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1056EDSAC2007-05-18T21:58:43Z<p>Archivist: what edsac stands for</p>
<hr />
<div>EDSAC Electronic Delay Storage Automatic Calculator was conceived in 1946, the machine did its first calculation in the summer of 1949<br />
<br />
Order Codes<br />
<br />
{|class="wikitable"<br />
|-<br />
| Order || Description <br />
|-<br />
| A n || Add the number in storage location n into the accumulator<br />
|-<br />
| S n || Subtract the number in storage location n from the accumulator<br />
|-<br />
| H n || Copy the number in storagae location n into the multiplier register<br />
|-<br />
| V n || Multiply the number in storage location n by the number in the multiplier register and add the product into the accumulator<br />
|-<br />
| N n || Multiply the number in storage location n by the number in the multiplier register and subtract the product into the accumulator<br />
|-<br />
| T || Transfer the contents of the accumulator to storage location n and clear the accumulator<br />
|-<br />
| U || Transfer the contents of the accumulator to storage location n and do not clear the accumulator<br />
|-<br />
| C || Collate the number in storage location n with the number in the multiplier register and add the result into the accumulator; that is, add a "1" into the accumulator in digital positions where both numbers have a "1" , and add a "0" in other digital positions<br />
|-<br />
| * R D || Shift the number in the accumulator one place to the right; that is, multiply by 2<sup>-1</sup><br />
|-<br />
| ** R 2<sup>p-2</sup> F || Shift the number in the accumulator p places to the right; that is, multiply it by 2<sup>-p</sup> (2&le;p&le;12)<br />
|-<br />
| R F || Shift the number in the accumulator 15 places to the right; that is, multiply it by 2<sup>-15</sup><br />
|-<br />
| * L F || Shift the number in the accumulator 1 place to the left; that is, multiply it by 2<br />
|-<br />
| ** L 2<sup>p-1</sup> F || Shift the number in the accumulator p places to the left; that is, multiply it by 2<sup>p</sup> (2&le;p&le;12)<br />
|-<br />
| L F || Shift the number in the accumulator 13 places to the left; that is, multiply it by 2<sup>13</sup><br />
|-<br />
| E n F || If the number in the accumulator is greater than or equal to zero, execute the next order which stands in storage location n; else proceed serially<br />
|-<br />
| G n F || If the number in the accumulator is greater than zero, execute the next order which stands in storage location n; else proceed serially<br />
|-<br />
| I n || Read the next row of holes on the input tape and place the resulting integer, multipled by 2<sup>-16</sup>, in storage location n<br />
|-<br />
| O n || Print the character now set up on the teleprinter and set up on the teleprinter the character represented by the five most significant digits in storage location n<br />
|-<br />
| F n || Place the five digits which represent the character now set up on the teleprinter in the five most significant digits in storage location n, clearing the remainder of this location<br />
|-<br />
| * X || Ineffective; machine proceeds to the next order<br />
|-<br />
| * Y || Round-off the numberin the accumulator to 34 binary digits; that is, add 2<sup>-35</sup> into the accumulator<br />
|-<br />
| * Z || Stop the machine <br />
|-<br />
|}<br />
<br />
* The addresses in these order codes need not be zero.<br />
** The addresses in these orders may be k.2<sup>p-1</sup> where k is odd, provided that the addresses do not exceed 2047.<br />
<br />
<br />
<br />
<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1053EDSAC2007-05-18T21:17:26Z<p>Archivist: done. note oddity with L F order code</p>
<hr />
<div>Conceived in 1946 and the machine did its first calculation in the summer of 1949<br />
<br />
Order Codes<br />
<br />
{|class="wikitable"<br />
|-<br />
| Order || Description <br />
|-<br />
| A n || Add the number in storage location n into the accumulator<br />
|-<br />
| S n || Subtract the number in storage location n from the accumulator<br />
|-<br />
| H n || Copy the number in storagae location n into the multiplier register<br />
|-<br />
| V n || Multiply the number in storage location n by the number in the multiplier register and add the product into the accumulator<br />
|-<br />
| N n || Multiply the number in storage location n by the number in the multiplier register and subtract the product into the accumulator<br />
|-<br />
| T || Transfer the contents of the accumulator to storage location n and clear the accumulator<br />
|-<br />
| U || Transfer the contents of the accumulator to storage location n and do not clear the accumulator<br />
|-<br />
| C || Collate the number in storage location n with the number in the multiplier register and add the result into the accumulator; that is, add a "1" into the accumulator in digital positions where both numbers have a "1" , and add a "0" in other digital positions<br />
|-<br />
| * R D || Shift the number in the accumulator one place to the right; that is, multiply by 2<sup>-1</sup><br />
|-<br />
| ** R 2<sup>p-2</sup> F || Shift the number in the accumulator p places to the right; that is, multiply it by 2<sup>-p</sup> (2&le;p&le;12)<br />
|-<br />
| R F || Shift the number in the accumulator 15 places to the right; that is, multiply it by 2<sup>-15</sup><br />
|-<br />
| * L F || Shift the number in the accumulator 1 place to the left; that is, multiply it by 2<br />
|-<br />
| ** L 2<sup>p-1</sup> F || Shift the number in the accumulator p places to the left; that is, multiply it by 2<sup>p</sup> (2&le;p&le;12)<br />
|-<br />
| L F || Shift the number in the accumulator 13 places to the left; that is, multiply it by 2<sup>13</sup><br />
|-<br />
| E n F || If the number in the accumulator is greater than or equal to zero, execute the next order which stands in storage location n; else proceed serially<br />
|-<br />
| G n F || If the number in the accumulator is greater than zero, execute the next order which stands in storage location n; else proceed serially<br />
|-<br />
| I n || Read the next row of holes on the input tape and place the resulting integer, multipled by 2<sup>-16</sup>, in storage location n<br />
|-<br />
| O n || Print the character now set up on the teleprinter and set up on the teleprinter the character represented by the five most significant digits in storage location n<br />
|-<br />
| F n || Place the five digits which represent the character now set up on the teleprinter in the five most significant digits in storage location n, clearing the remainder of this location<br />
|-<br />
| * X || Ineffective; machine proceeds to the next order<br />
|-<br />
| * Y || Round-off the numberin the accumulator to 34 binary digits; that is, add 2<sup>-35</sup> into the accumulator<br />
|-<br />
| * Z || Stop the machine <br />
|-<br />
|}<br />
<br />
* The addresses in these order codes need not be zero.<br />
** The addresses in these orders may be k.2<sup>p-1</sup> where k is odd, provided that the addresses do not exceed 2047.<br />
<br />
<br />
<br />
<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1052EDSAC2007-05-18T20:59:21Z<p>Archivist: only 7 more to add, already noted a possible error in source doc</p>
<hr />
<div>Conceived in 1946 and the machine did its first calculation in the summer of 1949<br />
<br />
Order Codes<br />
<br />
{|class="wikitable"<br />
|-<br />
| Order || Description <br />
|-<br />
| A n || Add the number in storage location n into the accumulator<br />
|-<br />
| S n || Subtract the number in storage location n from the accumulator<br />
|-<br />
| H n || Copy the number in storagae location n into the multiplier register<br />
|-<br />
| V n || Multiply the number in storage location n by the number in the multiplier register and add the product into the accumulator<br />
|-<br />
| N n || Multiply the number in storage location n by the number in the multiplier register and subtract the product into the accumulator<br />
|-<br />
| T || Transfer the contents of the accumulator to storage location n and clear the accumulator<br />
|-<br />
| U || Transfer the contents of the accumulator to storage location n and do not clear the accumulator<br />
|-<br />
| C || Collate the number in storage location n with the number in the multiplier register and add the result into the accumulator; that is, add a "1" into the accumulator in digital positions where both numbers have a "1" , and add a "0" in other digital positions<br />
|-<br />
| * R D || Shift the number in the accumulator one place to the right; that is, multiply by 2<sup>-1</sup><br />
|-<br />
| ** R 2<sup>p-2</sup> F || Shift the number in the accumulator p places to the right; that is, multiply it by 2<sup>-p</sup> (2&le;p&le;12)<br />
|-<br />
| R F || Shift the number in the accumulator 15 places to the right; that is, multiply it by 2<sup>-15</sup><br />
|-<br />
| * L F || Shift the number in the accumulator 1 place to the left; that is, multiply it by 2<br />
|-<br />
| ** L 2<sup>p-1</sup> F || Shift the number in the accumulator p places to the left; that is, multiply it by 2<sup>p</sup> (2&le;p&le;12)<br />
|-<br />
| L F || Shift the number in the accumulator 13 places to the left; that is, multiply it by 2<sup>13</sup><br />
|-<br />
| * Z || Stop the machine <br />
|-<br />
|}<br />
<br />
* The addresses in these order codes need not be zero.<br />
** The addresses in these orders may be k.2<sup>p-1</sup> where k is odd, provided that the addresses do not exceed 2047.<br />
<br />
<br />
<br />
<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1051EDSAC2007-05-18T20:28:00Z<p>Archivist: </p>
<hr />
<div>Conceived in 1946 and the machine did its first calculation in the summer of 1949<br />
<br />
Order Codes<br />
<br />
{|class="wikitable"<br />
|-<br />
| Order || Description <br />
|-<br />
| A n || Add the number in storage location n into the accumulator<br />
|-<br />
| S n || Subtract the number in storage location n from the accumulator<br />
|-<br />
| H n || Copy the number in storagae location n into the multiplier register<br />
|-<br />
| V n || Multiply the number in storage location n by the number in the multiplier<br />
| || register and add the product into the accumulator<br />
|-<br />
| N n || Multiply the number in storage location n by the number in the multiplier<br />
| || register and subtract the product into the accumulator<br />
|-<br />
| T || Transfer the contents of the accumulator to storage location n and clear the accumulator<br />
|-<br />
| *Z || Stop the machine <br />
|-<br />
|}<br />
<br />
*The addresses in these order codes need not be zero.<br />
** The addresses in these orders may be k.p-2 where k is odd, provided that the addresses do not exceed 2047.<br />
<br />
<br />
<br />
<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1050EDSAC2007-05-18T20:19:37Z<p>Archivist: add order code table</p>
<hr />
<div>Conceived in 1946 and the machine did its first calculation in the summer of 1949<br />
<br />
Order Codes<br />
<br />
{|class="wikitable"<br />
|-<br />
| Order || Description <br />
|-<br />
| A n || Add the number in storage location n into the accumulator<br />
|-<br />
| S n || Subtract the number in storage location n from the accumulator<br />
|-<br />
| H n || Copy the number in storagae location n into the multiplier register<br />
|-<br />
| V n || Multiply the number <br />
|-<br />
| *Z || Multiply the number <br />
|-<br />
|}<br />
<br />
*The addresses in these order codes need not be zero.<br />
** The addresses in these orders may be k.p-2 where k is odd, provided that the addresses do not exceed 2047.<br />
<br />
<br />
<br />
<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=EDSAC&diff=1046EDSAC2007-05-18T17:47:35Z<p>Archivist: EDSAC</p>
<hr />
<div>Conceived in 1946 and the machine did its first calculation in the summer of 1949<br />
<br />
{{stub}}<br />
<br />
[[Category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=Maurice_Wilkes&diff=1038Maurice Wilkes2007-05-18T14:25:30Z<p>Archivist: M.V. Wilkes</p>
<hr />
<div>Maurice V. Wilkes in 1951 was Director of the Mathematical Laboratory of the University of Cambridge.<br />
<br />
He has written many articles and books among them<br />
<br />
The Preparation of Programs for an Electronic Digital Computer 1951 (with David J. Wheeler and Stanley Gill)<br />
<br />
Chap 7 Calculating Machine Development at Cambridge, from Faster Than Thought, 1953<br />
Lo<br />
<br />
chap 2 The [[EDSAC]] from Automatic Digital Computation, 1954<br />
<br />
{{stub}}<br />
<br />
[[Category:People]]</div>Archivisthttps://gunkies.org/w/index.php?title=Category:People&diff=1037Category:People2007-05-18T12:43:02Z<p>Archivist: New page: People who made a difference in computing eg Grace Hopper, M.V. Wilkes, A.M. Turing, Knuth, F.W. Wilkinson, Clive Sinclair</p>
<hr />
<div>People who made a difference in computing eg Grace Hopper, M.V. Wilkes, A.M. Turing, Knuth, F.W. Wilkinson, Clive Sinclair</div>Archivisthttps://gunkies.org/w/index.php?title=User:Archivist&diff=1036User:Archivist2007-05-18T09:58:48Z<p>Archivist: New page: The collection includes Single board computers Science of Cambidge MK14 Personal computers Commodore PET Mini computers IBM AS/400 Model 9404 Computing books Automatic Dig...</p>
<hr />
<div>The collection includes <br />
<br />
Single board computers<br />
<br />
Science of Cambidge [[MK14]]<br />
<br />
Personal computers<br />
<br />
[[Commodore PET]]<br />
<br />
Mini computers<br />
<br />
IBM AS/400 Model 9404<br />
<br />
Computing books<br />
<br />
Automatic Digital Computation 1953 1955 reprint<br />
<br />
Manuals<br />
<br />
EAI TR-10 Computer maintenance manual</div>Archivisthttps://gunkies.org/w/index.php?title=MK14&diff=1035MK142007-05-18T09:34:48Z<p>Archivist: </p>
<hr />
<div>{{Infobox Machine<br />
| name = MK14<br />
| manufacturer = Science of Cambridge<br />
| cpu = [[National SC/MP]]<br />
| ram = 256 B<br />
| form factor = Single Board Computer<br />
}}<br />
<br />
Science of Cambridge MK14 used a National [[SC/MP]] microprocessor<br />
<br />
[[Category:Single Board Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=MK14&diff=1034MK142007-05-18T09:06:02Z<p>Archivist: add infobox</p>
<hr />
<div>{{Infobox Machine<br />
| name = MK14<br />
| manufacturer = Science of Cambridge<br />
| cpu = [[National SC/MP]]<br />
| ram = 256 B<br />
| form factor = Single Board Computer<br />
}}<br />
<br />
Science of Cambridge MK14 used a National [[SC/MP]] microprocessor</div>Archivisthttps://gunkies.org/w/index.php?title=MK14&diff=1033MK142007-05-18T09:03:09Z<p>Archivist: MK14</p>
<hr />
<div>Science of Cambridge MK14 used a National [[SC/MP]] microprocessor</div>Archivisthttps://gunkies.org/w/index.php?title=Category:Single_Board_Computers&diff=1032Category:Single Board Computers2007-05-18T08:58:55Z<p>Archivist: sbc category</p>
<hr />
<div>Demonstration boards eg [[KIM-1]], low cost consumer boards [[MK14]] and [[CPU]] boards supplied separately to the trade for building specialist systems eg [[VME]] boards</div>Archivisthttps://gunkies.org/w/index.php?title=KIM-1&diff=1031KIM-12007-05-18T08:53:58Z<p>Archivist: </p>
<hr />
<div>{{Infobox Machine<br />
| name = KIM-1<br />
| manufacturer = MOS Technology, [[Commodore Business Machines]]<br />
| cpu = [[MOS 6502]]<br />
| ram = 1 KB<br />
| form factor = Single Board Computer<br />
| image = Kim-1-computer.jpg<br />
| caption = The KIM-1 <br />
}}<br />
<br />
The KIM-1 was developed by MOS Technologies to prototype and show off the abilities of their CPU, the [[MOS 6502]].<br />
<br />
{{stub}}<br />
<br />
[[Category: Single Board Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=NUSSE&diff=845NUSSE2007-05-17T13:25:24Z<p>Archivist: category</p>
<hr />
<div>NUSSE was the Norsk Universell Siffermaskin, Selvstyrt, Elektronisk computer which was a copy of the UK Birkbeck College design possibly the first clone in the world circa 1952-1954.<br />
<br />
There are two references in UK books by A. D. Booth to this computer, <br />
<br />
1. "Automatic Digital Computers" 1953 1955 reprint chap 35 p270 <br />
<br />
"Up to the present, two copies of APE(x)C are in existence. The first at the Norwegian Board of Computing Machines, Oslo, under the direction of Dr. T. Hysing, is undergoing tests. The second is in general use at the laboratories of the British Tabulating Machines Company." <br />
<br />
2. "Faster than Thought" 1953, 1955 reprint chap 13 p171<br />
<br />
"A.P.E.N.C. Norwegian Board for Computing Machines<br />
<br />
The machines are properly engineered versions of S.E.C. built with miniatue components. The digit repetition rate is 50kc/s. Storage capacity is of the magnetic drum type and gives 512 thirty-two-digit binary numbers. The machine is provided with a high-speed, short-cutting multiplier and takes 500usec for addition and subtraction, and (n x 500) usec for multiplication, where n is the number of "live" digits in the multiplier.<br />
<br />
Only 415 valves are used, including all diode elements. Power consumption is 1.5KW<br />
<br />
Input and output equipment varies with the requirements of the users, three types being available---<br />
<br />
1. Punched-paper tape read photo-electrically as input, output to reporforator or teleprinter.<br />
2. Magnetic-tape input and high-speed output. Printing via a teleprinter.<br />
3. Punched-card input and intermediate store. Output via Hollerith tabulator."<br />
<br />
<br />
[[category:Computers]]</div>Archivisthttps://gunkies.org/w/index.php?title=NUSSE&diff=844NUSSE2007-05-17T13:23:39Z<p>Archivist: add references and source material</p>
<hr />
<div>NUSSE was the Norsk Universell Siffermaskin, Selvstyrt, Elektronisk computer which was a copy of the UK Birkbeck College design possibly the first clone in the world circa 1952-1954.<br />
<br />
There are two references in UK books by A. D. Booth to this computer, <br />
<br />
1. "Automatic Digital Computers" 1953 1955 reprint chap 35 p270 <br />
<br />
"Up to the present, two copies of APE(x)C are in existence. The first at the Norwegian Board of Computing Machines, Oslo, under the direction of Dr. T. Hysing, is undergoing tests. The second is in general use at the laboratories of the British Tabulating Machines Company." <br />
<br />
2. "Faster than Thought" 1953, 1955 reprint chap 13 p171<br />
<br />
"A.P.E.N.C. Norwegian Board for Computing Machines<br />
<br />
The machines are properly engineered versions of S.E.C. built with miniatue components. The digit repetition rate is 50kc/s. Storage capacity is of the magnetic drum type and gives 512 thirty-two-digit binary numbers. The machine is provided with a high-speed, short-cutting multiplier and takes 500usec for addition and subtraction, and (n x 500) usec for multiplication, where n is the number of "live" digits in the multiplier.<br />
<br />
Only 415 valves are used, including all diode elements. Power consumption is 1.5KW<br />
<br />
Input and output equipment varies with the requirements of the users, three types being available---<br />
<br />
1. Punched-paper tape read photo-electrically as input, output to reporforator or teleprinter.<br />
2. Magnetic-tape input and high-speed output. Printing via a teleprinter.<br />
3. Punched-card input and intermediate store. Output via Hollerith tabulator."</div>Archivisthttps://gunkies.org/w/index.php?title=NUSSE&diff=843NUSSE2007-05-17T12:59:27Z<p>Archivist: NUSSE</p>
<hr />
<div>NUSSE was the Norsk Universell Siffermaskin, Selvstyrt, Elektronisk computer which was a copy of the UK Birkbeck College design possibly the first clone in the world circa 1952-1954.<br />
<br />
There are two references in UK books by A. D. Booth to this computer, 1. "Automatic Digital Computers" 1953 chap 35 p270 "Up to the present, two copies of APE(x) are in existence. The first at the Norwegian Board of Computing Machines, Oslo, under the direction of Dr. T. Hysing, is undergoing tests. The second is in general use at the laboratories of the British Tabulating Machines Company." 2. "Faster than Thought" chap 13</div>Archivisthttps://gunkies.org/w/index.php?title=Linux&diff=842Linux2007-05-17T12:32:28Z<p>Archivist: Linux</p>
<hr />
<div>{{Infobox OS<br />
| name = Linx<br />
| creator = Linus Torvalds<br />
| year introduced = 199x<br />
| architecture = Originally [[80386]] now cross-platform.<br />
| type = Time-sharing<br />
| multitasking = Multitasking with paging/swap<br />
}}<br />
<br />
Linux is a computer [[operating system]] originally developed in the 1990s by a student Linus Torvalds. Today's Linux systems are split into various branches, developed over time by millions of volunteers, [[Debian]], [[Ubuntu]], [[RedHat]], [[IBM]] as well as various commercial vendors.<br />
<br />
Versions of relevance for hobbyists include:<br />
<br />
<br />
[[category:Operating Systems]]</div>Archivisthttps://gunkies.org/w/index.php?title=Bus&diff=841Bus2007-05-17T11:03:39Z<p>Archivist: </p>
<hr />
<div>{{wp}}<br />
<br />
In [[computer architecture]], a '''bus''' is a subsystem that transfers data or power between computer components inside a [[computer]] or between computers and typically is controlled by [[device driver]] software. Unlike a [[Point-to-point link|point-to-point connection]], a bus can logically connect several [[peripheral]]s over the same set of wires. Each bus defines its set of [[connector]]s to physically plug devices, cards or cables together.<br />
<br />
Early computer buses were literally parallel [[electrical bus]]es with multiple connections, but the term is now used for any physical arrangement that provides the same logical functionality as a parallel electrical bus. Modern computer buses can use both parallel and bit-serial connections, and can be wired in either a [[multidrop]] (electrical parallel) or [[daisy chain]] topology, or connected by switched hubs, as in the case of [[Universal Serial Bus|USB]].<br />
<br />
===First generation=== <br />
Early [[computer]] buses were bundles of wire that attached [[Computer storage|memory]] and peripherals. They were named after [[Electrical bus|electrical buses]], or busbars. Almost always, there was one bus for memory, and another for peripherals, and these were accessed by separate instructions, with completely different timings and protocols.<br />
<br />
One of the first complications was the use of [[interrupt]]s. Early computers performed [[Input/output|I/O]] by waiting in a loop for the peripheral to become ready. This was a waste of time for programs that had other tasks to do. Also, if the program attempted to perform those other tasks, it might take too long for the program to check again, resulting in lost data. Engineers thus arranged for the peripherals to interrupt the CPU. The interrupts had to be prioritized, because the CPU can only execute code for one peripheral at a time, and some devices are more time-critical than others.<br />
<br />
Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prioritized, as well.<br />
<br />
The classic, simple way to prioritize interrupts or bus access was with a [[daisy chain]].<br />
<br />
[[Digital Equipment Corporation|DEC]] noted that having two buses seemed wasteful and expensive for small, mass-produced computers, and mapped peripherals into the memory bus, so that the devices appeared to be memory locations. At the time, this was a very daring design. Cynics predicted failure.<br />
<br />
Early [[microcomputer]] bus systems were essentially a passive [[backplane]] connected to the pins of the [[Central processing unit|CPU]]. Memory and other devices would be added to the bus using the same address and data pins as the CPU itself used, connected in parallel. In some instances, such as the [[IBM PC]], instructions still generated signals at the CPU that could be used to implement a true I/O bus. <br />
<br />
In many microcontrollers and [[embedded systems]], an I/O bus still does not exist. Communication is controlled by the [[Central processing unit|CPU]], which reads and writes data from the devices as if they are blocks of memory (in most cases), all timed by a central clock controlling the speed of the CPU. Devices ask for service by signalling on other CPU pins, typically using some form of [[interrupt]]. <br />
<br />
For instance, a [[disk drive]] controller would signal the CPU that new data was ready to be read, at which point the CPU would move the data by reading the memory that corresponded to the disk drive. Almost all early computers were built in this fashion, starting with the [[S-100 bus]] in the [[Altair 8800|Altair]], and continuing through the [[IBM PC]] in the [[1980s]].<br />
<br />
These simple bus systems had a serious drawback for general-purpose computers. All the equipment on the bus has to talk at the same speed, and thus shares a single clock.<br />
<br />
Increasing the speed of the CPU is not a simple matter, because the speed of all the devices must increase as well. This often leads to odd situations where very fast CPUs have to "slow down" in order to talk to other devices in the computer. While acceptable in [[embedded system]]s, this problem was not tolerated for long in commercial computers.<br />
<br />
Another problem is that the CPU is required for all operations, so if it becomes busy with other tasks, the real [[throughput]] of the bus could suffer dramatically. <br />
<br />
Such bus systems are difficult to configure when constructed from common off-the-shelf equipment. Typically each added PC board requires many [[jumper]]s in order to set memory addresses, I/O addresses, interrupt priorities, and interrupt numbers.<br />
<br />
===Second generation===<br />
"Second generation" bus systems like '''[[NuBus]]''' addressed some of these problems. They typically separated the computer into two "worlds", the CPU and memory on one side, and the various devices on the other, with a ''bus controller'' in between. This allowed the CPU to increase in speed without affecting the bus. This also moved much of the burden for moving the data out of the CPU and into the cards and controller, so devices on the bus could talk to each other with no CPU intervention. This led to much better "real world" performance, but also required the cards to be much more complex. These buses also often addressed speed issues by being "bigger" in terms of the size of the data path, moving from 8-bit [[parallel bus]]es in the first generation, to 16 or 32-bit in the second, as well as adding software setup (now standardised as [[Plug-n-play]]) to supplant or replace the jumpers.<br />
<br />
However these newer systems shared one quality with their earlier cousins, in that everyone on the bus had to talk at the same speed. While the CPU was now isolated and could increase speed without fear, CPUs and memory continued to increase in speed much faster than the buses they talked to. The result was that the bus speeds were now very much slower than what a modern system needed, and the machines were left starved for data. A particularly common example of this problem was that [[video card]]s quickly outran even the newer bus systems like '''[[Peripheral Component Interconnect|PCI]]''', and computers began to include '''[[Accelerated Graphics Port|AGP]]''' just to drive the video card. By [[2004]] AGP was outgrown again by high-end video cards and is being replaced with the new '''[[PCI Express]]''' bus.<br />
<br />
An increasing number of external devices started employing their own bus systems as well. When disk drives were first introduced, they would be added to the machine with a card plugged into the bus, which is why computers have so many slots on the bus. But through the [[1980s]] and [[1990s]], new systems like '''[[SCSI]]''' and '''[[Integrated Drive Electronics|IDE]]''' were introduced to serve this need, leaving most slots in modern systems empty. Today there are likely to be about five different buses in the typical machine, supporting various devices.<br />
<br />
A useful differentiation then became popular, the concept of the '''local bus''' as opposed to '''external bus'''. The former referred to bus systems that were designed to be used with internal devices, such as graphics cards, and the latter to buses designed to add external devices such as [[image scanner|scanner]]s. Note, though, that "local" also referred to the greater proximity to the processor of VL-Bus and PCI than ISA. IDE is an external bus in terms of how it is used, but is almost always found inside the machine.<br />
<br />
===Third generation===<br />
"Third generation" buses are now in the process of coming to market, including '''[[HyperTransport]]''' and '''[[InfiniBand]]'''. They typically include features that allow them to run at the very high speeds needed to support memory and video cards, while also supporting lower speeds when talking to slower devices such as disk drives. They also tend to be very flexible in terms of their physical connections, allowing them to be used both as internal buses, as well as connecting different machines together. This can lead to complex problems when trying to service different requests, so much of the work on these systems concerns software design, as opposed to the hardware itself. In general, these third generation buses tend to look more like a [[computer network|network]] than the original concept of a bus, with a higher protocol overhead needed than early systems, while also allowing multiple devices to use the bus at once.<br />
<br />
On another track, integrated circuits are increasingly being designed from predesigned logic, "intellectual property." Buses such as [[Wishbone (computer bus)|Wishbone]] have been developed to permit devices on integrated circuits to talk to one another.<br />
<br />
==Description of a bus==<br />
At one time, "bus" meant an electrically parallel system, with electrical conductors similar or identical to the pins on the CPU. This is no longer the case, and modern systems are blurring the lines between buses and networks.<br />
<br />
Buses can be [[parallel communications|parallel buses]], which carry data words striped across multiple wires, or [[serial bus]]es, which carry data in bit-serial form. The addition of extra power and control connections, differential drivers, and data connections in each direction usually means that most serial buses have more conductors than the minimum of two used in the [[I²C]] serial bus. As data rates increase, the problems of [[timing skew]] and [[crosstalk]] across parallel buses become more and more difficult to circumvent. One partial solution to this problem has been to [[double pumped|double pump]] the bus. Often, a serial bus can actually be operated at higher overall data rates than a parallel bus, despite having fewer electrical connections, because a serial bus inherently has no timing skew or crosstalk. [[Universal Serial Bus|USB]], [[FireWire]], and [[Serial ATA]] are examples of this. [[Multidrop]] connections do not work well for fast serial buses, so most modern serial buses use [[daisy-chain]] or hub designs.<br />
<br />
Most computers have both internal and external buses. An ''internal bus'' connects all the internal components of a computer to the motherboard (and thus, the [[Central processing unit|CPU]] and [[internal memory]]). These types of buses are also referred to as a [[local bus]], because they are intended to connect to local devices, not to those in other machines or external to the computer. An ''external bus'' connects external peripherals to the motherboard.<br />
<br />
[[computer network|Network]] connections such as [[Ethernet]] are not generally regarded as buses, although the difference is largely conceptual rather than practical. The arrival of technologies such as [[InfiniBand]] and [[HyperTransport]] is further blurring the boundaries between networks and buses. Even the lines between internal and external are sometimes fuzzy, [[I²C]] can be used as both an internal bus, or an external bus (where it is known as [[ACCESS.bus]]), and InfiniBand is intended to replace both internal buses like [[Peripheral Component Interconnect|PCI]] as well as external ones like [[Fibre Channel]].<br />
<br />
Modern trends in personal computers, especially laptops, have been moving towards eliminating all external connections except for modem jack, [[Category 5 cable|Cat5]], USB, [[Jack plug|headphone jack]], and optional [[VGA]] or FireWire.<br />
<br />
==Bus topology==<br />
In a network, the master scheduler controls the data traffic. If data is to be transferred the requesting computer sends a message to the scheduler, which puts the request into a queue. The message contains an identification code which is broadcast to all nodes of the network. The scheduler works out priorities and notifies the receiver as soon as the bus is available.<br />
<br />
The identified node takes the message and performs the data transfer between the two computers. Having completed the data transfer the bus becomes free for the next request in the scheduler's queue.<br />
<br />
Bus benefit: any computer can be accessed directly and message can be sent in a relatively simple and fast way.<br />
Disadvantage: needs a scheduler to assign frequencies and priorities to organize the traffic.<br />
<br />
See also: [[Bus network]]<br />
<br />
== Examples of internal computer buses ==<br />
===Parallel===<br />
* [[ASUS Media Bus]] proprietary, used on some [[ASUS]] [[Socket 7]] motherboards<br />
* [[CAMAC]] for instrumentation systems<br />
* [[Extended ISA]] or EISA<br />
* [[Industry Standard Architecture]] or ISA<br />
* [[Low Pin Count]] or LPC<br />
* [[MicroChannel]] or MCA<br />
* [[MBus]] <br />
* [[Multibus]] for industrial systems<br />
* [[NuBus]] or IEEE 1196<br />
* [[OPTi local bus]] used on early [[Intel 80486]] motherboards.<br />
* [[Peripheral Component Interconnect]] or PCI <br />
* [[S100 bus]] or IEEE 696, used in the [[Altair]] and similar [[microcomputers]]<br />
* [[SBus]] or IEEE 1496<br />
* [[VESA Local Bus]] or VLB or VL-bus<br />
* [[VME]], the VERSAmodule Eurocard bus<br />
* STD Bus for 8- and 16-bit microprocessor systems<br />
<br />
===Serial===<br />
* [[1-Wire]]<br />
* [[HyperTransport]]<br />
* [[I²C]]<br />
* [[PCI Express]] or PCIe<br />
* [[Serial Peripheral Interface Bus]] or SPI bus<br />
* [[USB]] Universal Serial Bus<br />
<br />
== Examples of external computer buses ==<br />
===Parallel===<br />
* [[Advanced Technology Attachment]] or ATA (aka PATA, IDE, EIDE, ATAPI, etc.) disk/tape peripheral attachment bus<br>(the original ATA is parallel, but see also the recent [[serial ATA]])<br />
<br />
* [[IEEE-488]] (aka GPIB, General-Purpose Instrumentation Bus, and HPIB, Hewlett-Packard Instrumentation Bus)<br />
* [[SCSI]] Small Computer System Interface, disk/tape peripheral attachment bus<br />
<br />
== Examples of internal/external computer buses ==<br />
* [[Futurebus]]<br />
* [[InfiniBand]]<br />
* [[QuickRing]]<br />
* [[Scalable Coherent Interconnect|SCI]]<br />
<!-- * [[Bus topology]] (redirects here --><br />
<br />
== See also==<br />
*[[Address bus]]<br />
*[[Bus contention]]<br />
*[[Control bus]]<br />
*[[Front side bus]]<br />
*[[Network On Chip]]<br />
<br />
== External links ==<br />
* Chip Weems' [http://www.cs.umass.edu/~weems/CmpSci635/635lecture12.html Lecture 12: Buses]<br />
* {{dmoz|Computers/Hardware/Buses/|Computer hardware buses}}<br />
<br />
[[Category:Computer buses|*Computer bus]]</div>Archivisthttps://gunkies.org/w/index.php?title=Bus&diff=830Bus2007-05-17T10:03:14Z<p>Archivist: add an edited bus from wp</p>
<hr />
<div>{{{wp}}}<br />
<br />
In [[computer architecture]], a '''bus''' is a subsystem that transfers data or power between computer components inside a [[computer]] or between computers and typically is controlled by [[device driver]] software. Unlike a [[Point-to-point link|point-to-point connection]], a bus can logically connect several [[peripheral]]s over the same set of wires. Each bus defines its set of [[connector]]s to physically plug devices, cards or cables together.<br />
<br />
Early computer buses were literally parallel [[electrical bus]]es with multiple connections, but the term is now used for any physical arrangement that provides the same logical functionality as a parallel electrical bus. Modern computer buses can use both parallel and bit-serial connections, and can be wired in either a [[multidrop]] (electrical parallel) or [[daisy chain]] topology, or connected by switched hubs, as in the case of [[Universal Serial Bus|USB]].<br />
<br />
===First generation=== <br />
Early [[computer]] buses were bundles of wire that attached [[Computer storage|memory]] and peripherals. They were named after [[Electrical bus|electrical buses]], or busbars. Almost always, there was one bus for memory, and another for peripherals, and these were accessed by separate instructions, with completely different timings and protocols.<br />
<br />
One of the first complications was the use of [[interrupt]]s. Early computers performed [[Input/output|I/O]] by waiting in a loop for the peripheral to become ready. This was a waste of time for programs that had other tasks to do. Also, if the program attempted to perform those other tasks, it might take too long for the program to check again, resulting in lost data. Engineers thus arranged for the peripherals to interrupt the CPU. The interrupts had to be prioritized, because the CPU can only execute code for one peripheral at a time, and some devices are more time-critical than others.<br />
<br />
Some time after this, some computers began to share memory between several CPUs. On these computers, access to the bus had to be prioritized, as well.<br />
<br />
The classic, simple way to prioritize interrupts or bus access was with a [[daisy chain]].<br />
<br />
[[Digital Equipment Corporation|DEC]] noted that having two buses seemed wasteful and expensive for small, mass-produced computers, and mapped peripherals into the memory bus, so that the devices appeared to be memory locations. At the time, this was a very daring design. Cynics predicted failure.<br />
<br />
Early [[microcomputer]] bus systems were essentially a passive [[backplane]] connected to the pins of the [[Central processing unit|CPU]]. Memory and other devices would be added to the bus using the same address and data pins as the CPU itself used, connected in parallel. In some instances, such as the [[IBM PC]], instructions still generated signals at the CPU that could be used to implement a true I/O bus. <br />
<br />
In many microcontrollers and [[embedded systems]], an I/O bus still does not exist. Communication is controlled by the [[Central processing unit|CPU]], which reads and writes data from the devices as if they are blocks of memory (in most cases), all timed by a central clock controlling the speed of the CPU. Devices ask for service by signalling on other CPU pins, typically using some form of [[interrupt]]. <br />
<br />
For instance, a [[disk drive]] controller would signal the CPU that new data was ready to be read, at which point the CPU would move the data by reading the memory that corresponded to the disk drive. Almost all early computers were built in this fashion, starting with the [[S-100 bus]] in the [[Altair 8800|Altair]], and continuing through the [[IBM PC]] in the [[1980s]].<br />
<br />
These simple bus systems had a serious drawback for general-purpose computers. All the equipment on the bus has to talk at the same speed, and thus shares a single clock.<br />
<br />
Increasing the speed of the CPU is not a simple matter, because the speed of all the devices must increase as well. This often leads to odd situations where very fast CPUs have to "slow down" in order to talk to other devices in the computer. While acceptable in [[embedded system]]s, this problem was not tolerated for long in commercial computers.<br />
<br />
Another problem is that the CPU is required for all operations, so if it becomes busy with other tasks, the real [[throughput]] of the bus could suffer dramatically. <br />
<br />
Such bus systems are difficult to configure when constructed from common off-the-shelf equipment. Typically each added PC board requires many [[jumper]]s in order to set memory addresses, I/O addresses, interrupt priorities, and interrupt numbers.<br />
<br />
===Second generation===<br />
"Second generation" bus systems like '''[[NuBus]]''' addressed some of these problems. They typically separated the computer into two "worlds", the CPU and memory on one side, and the various devices on the other, with a ''bus controller'' in between. This allowed the CPU to increase in speed without affecting the bus. This also moved much of the burden for moving the data out of the CPU and into the cards and controller, so devices on the bus could talk to each other with no CPU intervention. This led to much better "real world" performance, but also required the cards to be much more complex. These buses also often addressed speed issues by being "bigger" in terms of the size of the data path, moving from 8-bit [[parallel bus]]es in the first generation, to 16 or 32-bit in the second, as well as adding software setup (now standardised as [[Plug-n-play]]) to supplant or replace the jumpers.<br />
<br />
However these newer systems shared one quality with their earlier cousins, in that everyone on the bus had to talk at the same speed. While the CPU was now isolated and could increase speed without fear, CPUs and memory continued to increase in speed much faster than the buses they talked to. The result was that the bus speeds were now very much slower than what a modern system needed, and the machines were left starved for data. A particularly common example of this problem was that [[video card]]s quickly outran even the newer bus systems like '''[[Peripheral Component Interconnect|PCI]]''', and computers began to include '''[[Accelerated Graphics Port|AGP]]''' just to drive the video card. By [[2004]] AGP was outgrown again by high-end video cards and is being replaced with the new '''[[PCI Express]]''' bus.<br />
<br />
An increasing number of external devices started employing their own bus systems as well. When disk drives were first introduced, they would be added to the machine with a card plugged into the bus, which is why computers have so many slots on the bus. But through the [[1980s]] and [[1990s]], new systems like '''[[SCSI]]''' and '''[[Integrated Drive Electronics|IDE]]''' were introduced to serve this need, leaving most slots in modern systems empty. Today there are likely to be about five different buses in the typical machine, supporting various devices.<br />
<br />
A useful differentiation then became popular, the concept of the '''local bus''' as opposed to '''external bus'''. The former referred to bus systems that were designed to be used with internal devices, such as graphics cards, and the latter to buses designed to add external devices such as [[image scanner|scanner]]s. Note, though, that "local" also referred to the greater proximity to the processor of VL-Bus and PCI than ISA. IDE is an external bus in terms of how it is used, but is almost always found inside the machine.<br />
<br />
===Third generation===<br />
"Third generation" buses are now in the process of coming to market, including '''[[HyperTransport]]''' and '''[[InfiniBand]]'''. They typically include features that allow them to run at the very high speeds needed to support memory and video cards, while also supporting lower speeds when talking to slower devices such as disk drives. They also tend to be very flexible in terms of their physical connections, allowing them to be used both as internal buses, as well as connecting different machines together. This can lead to complex problems when trying to service different requests, so much of the work on these systems concerns software design, as opposed to the hardware itself. In general, these third generation buses tend to look more like a [[computer network|network]] than the original concept of a bus, with a higher protocol overhead needed than early systems, while also allowing multiple devices to use the bus at once.<br />
<br />
On another track, integrated circuits are increasingly being designed from predesigned logic, "intellectual property." Buses such as [[Wishbone (computer bus)|Wishbone]] have been developed to permit devices on integrated circuits to talk to one another.<br />
<br />
==Description of a bus==<br />
At one time, "bus" meant an electrically parallel system, with electrical conductors similar or identical to the pins on the CPU. This is no longer the case, and modern systems are blurring the lines between buses and networks.<br />
<br />
Buses can be [[parallel communications|parallel buses]], which carry data words striped across multiple wires, or [[serial bus]]es, which carry data in bit-serial form. The addition of extra power and control connections, differential drivers, and data connections in each direction usually means that most serial buses have more conductors than the minimum of two used in the [[I²C]] serial bus. As data rates increase, the problems of [[timing skew]] and [[crosstalk]] across parallel buses become more and more difficult to circumvent. One partial solution to this problem has been to [[double pumped|double pump]] the bus. Often, a serial bus can actually be operated at higher overall data rates than a parallel bus, despite having fewer electrical connections, because a serial bus inherently has no timing skew or crosstalk. [[Universal Serial Bus|USB]], [[FireWire]], and [[Serial ATA]] are examples of this. [[Multidrop]] connections do not work well for fast serial buses, so most modern serial buses use [[daisy-chain]] or hub designs.<br />
<br />
Most computers have both internal and external buses. An ''internal bus'' connects all the internal components of a computer to the motherboard (and thus, the [[Central processing unit|CPU]] and [[internal memory]]). These types of buses are also referred to as a [[local bus]], because they are intended to connect to local devices, not to those in other machines or external to the computer. An ''external bus'' connects external peripherals to the motherboard.<br />
<br />
[[computer network|Network]] connections such as [[Ethernet]] are not generally regarded as buses, although the difference is largely conceptual rather than practical. The arrival of technologies such as [[InfiniBand]] and [[HyperTransport]] is further blurring the boundaries between networks and buses. Even the lines between internal and external are sometimes fuzzy, [[I²C]] can be used as both an internal bus, or an external bus (where it is known as [[ACCESS.bus]]), and InfiniBand is intended to replace both internal buses like [[Peripheral Component Interconnect|PCI]] as well as external ones like [[Fibre Channel]].<br />
<br />
Modern trends in personal computers, especially laptops, have been moving towards eliminating all external connections except for modem jack, [[Category 5 cable|Cat5]], USB, [[Jack plug|headphone jack]], and optional [[VGA]] or FireWire.<br />
<br />
==Bus topology==<br />
In a network, the master scheduler controls the data traffic. If data is to be transferred the requesting computer sends a message to the scheduler, which puts the request into a queue. The message contains an identification code which is broadcast to all nodes of the network. The scheduler works out priorities and notifies the receiver as soon as the bus is available.<br />
<br />
The identified node takes the message and performs the data transfer between the two computers. Having completed the data transfer the bus becomes free for the next request in the scheduler's queue.<br />
<br />
Bus benefit: any computer can be accessed directly and message can be sent in a relatively simple and fast way.<br />
Disadvantage: needs a scheduler to assign frequencies and priorities to organize the traffic.<br />
<br />
See also: [[Bus network]]<br />
<br />
== Examples of internal computer buses ==<br />
===Parallel===<br />
* [[ASUS Media Bus]] proprietary, used on some [[ASUS]] [[Socket 7]] motherboards<br />
* [[CAMAC]] for instrumentation systems<br />
* [[Extended ISA]] or EISA<br />
* [[Industry Standard Architecture]] or ISA<br />
* [[Low Pin Count]] or LPC<br />
* [[MicroChannel]] or MCA<br />
* [[MBus]] <br />
* [[Multibus]] for industrial systems<br />
* [[NuBus]] or IEEE 1196<br />
* [[OPTi local bus]] used on early [[Intel 80486]] motherboards.<br />
* [[Peripheral Component Interconnect]] or PCI <br />
* [[S100 bus]] or IEEE 696, used in the [[Altair]] and similar [[microcomputers]]<br />
* [[SBus]] or IEEE 1496<br />
* [[VESA Local Bus]] or VLB or VL-bus<br />
* [[VME]], the VERSAmodule Eurocard bus<br />
* STD Bus for 8- and 16-bit microprocessor systems<br />
<br />
===Serial===<br />
* [[1-Wire]]<br />
* [[HyperTransport]]<br />
* [[I²C]]<br />
* [[PCI Express]] or PCIe<br />
* [[Serial Peripheral Interface Bus]] or SPI bus<br />
* [[USB]] Universal Serial Bus<br />
<br />
== Examples of external computer buses ==<br />
===Parallel===<br />
* [[Advanced Technology Attachment]] or ATA (aka PATA, IDE, EIDE, ATAPI, etc.) disk/tape peripheral attachment bus<br>(the original ATA is parallel, but see also the recent [[serial ATA]])<br />
<br />
* [[IEEE-488]] (aka GPIB, General-Purpose Instrumentation Bus, and HPIB, Hewlett-Packard Instrumentation Bus)<br />
* [[SCSI]] Small Computer System Interface, disk/tape peripheral attachment bus<br />
<br />
== Examples of internal/external computer buses ==<br />
* [[Futurebus]]<br />
* [[InfiniBand]]<br />
* [[QuickRing]]<br />
* [[Scalable Coherent Interconnect|SCI]]<br />
<!-- * [[Bus topology]] (redirects here --><br />
<br />
== See also==<br />
*[[Address bus]]<br />
*[[Bus contention]]<br />
*[[Control bus]]<br />
*[[Front side bus]]<br />
*[[Network On Chip]]<br />
<br />
== External links ==<br />
* Chip Weems' [http://www.cs.umass.edu/~weems/CmpSci635/635lecture12.html Lecture 12: Buses]<br />
* {{dmoz|Computers/Hardware/Buses/|Computer hardware buses}}<br />
<br />
[[Category:Computer buses|*Computer bus]]</div>Archivisthttps://gunkies.org/w/index.php?title=VME&diff=829VME2007-05-17T09:23:25Z<p>Archivist: add VME stub</p>
<hr />
<div>{{stub}}<br />
<br />
The '''VME''' bus is 68000 based and used in many minis and specialist computers.<br />
<br />
<br />
<br />
[[Category:Bus Architectures]]</div>Archivisthttps://gunkies.org/w/index.php?title=S100&diff=828S1002007-05-17T09:20:54Z<p>Archivist: add 8080 8085</p>
<hr />
<div>{{stub}}<br />
<br />
The '''S100''' bus was designed for 8080 and 8085 but mainly used in many Z80 systems. Being well defined it allowed many manufacturers to produce boards and cases for it, which made manufacture and expansion of a system very easy. Most used CP/M as the operating system on them.<br />
<br />
<br />
<br />
[[Category:Bus Architectures]]</div>Archivisthttps://gunkies.org/w/index.php?title=S100&diff=827S1002007-05-17T09:11:07Z<p>Archivist: S100 starter</p>
<hr />
<div>{{stub}}<br />
<br />
The '''S100''' bus was used in many Z80 systems. Being well defined it allowed many manufacturers to produce boards and cases for it, which made manufacture and expansion of a system very easy. Most used CP/M as the operating system on them.<br />
<br />
<br />
<br />
[[Category:Bus Architectures]]</div>Archivisthttps://gunkies.org/w/index.php?title=Commodore_Business_Machines&diff=640Commodore Business Machines2007-05-16T22:20:49Z<p>Archivist: was not is</p>
<hr />
<div>Commodore Business Machines was the maker of the famous [[Commodore PET]] and [[Commodore 64]] as well as several business and home-oriented microcomputers.<br />
<br />
{{stub}}<br />
<br />
[[Category:Computer Manufacturers]]</div>Archivisthttps://gunkies.org/w/index.php?title=1953&diff=59119532007-05-16T21:00:16Z<p>Archivist: add elliott 401</p>
<hr />
<div>{{stub}}<br />
=The year 1953 in computer history=<br />
{{year|year=1953|prev=1952|next=1954}}<br />
<br />
* A symposium Automatic Digital Computation is held at the National Physical Laboratory.<br />
* [[Elliott 401]] tests of the arithmetic and control circuits completed in Febuary.</div>Archivisthttps://gunkies.org/w/index.php?title=1952&diff=58419522007-05-16T20:24:57Z<p>Archivist: typo</p>
<hr />
<div>{{stub}}<br />
=The year 1952 in computer history=<br />
{{year|year=1952|prev=1951|next=1953}}<br />
<br />
* [[Nicholas]] Made at Elliott Brothers. The descision to build in March and first run in August.</div>Archivisthttps://gunkies.org/w/index.php?title=1951&diff=57819512007-05-16T20:08:04Z<p>Archivist: 1951 Harwell computer</p>
<hr />
<div>{{stub}}<br />
=The year 1951 in computer history=<br />
{{year|year=1951|prev=1950|next=1952}}<br />
<br />
* The [[Harwell]] computer worked for the first time in April although it was not handed over to the computing Group until May 1952.</div>Archivisthttps://gunkies.org/w/index.php?title=1952&diff=57019522007-05-16T19:49:58Z<p>Archivist: 1951 Elliott Nicholas</p>
<hr />
<div>{{stub}}<br />
=The year 1952 in computer history=<br />
{{year|year=1952|prev=1951|next=1953}}<br />
<br />
* [[Nocholas]] Made at Elliott Brothers. The descision to build in March and first run in August.</div>Archivisthttps://gunkies.org/w/index.php?title=1949&diff=55719492007-05-16T19:39:11Z<p>Archivist: </p>
<hr />
<div>{{stub}}<br />
=The year 1949 in computer history=<br />
{{year|year=1949|prev=1948|next=1950}}<br />
<br />
* [[EDSAC]] did its first calculation in the summer of 1949.<br />
* Construction of [[LEO]] Lyons Electronic Office was started.</div>Archivisthttps://gunkies.org/w/index.php?title=1949&diff=55319492007-05-16T19:36:49Z<p>Archivist: add 1949 edsac</p>
<hr />
<div>{{stub}}<br />
=The year 1949 in computer history=<br />
{{year|year=1949|prev=1948|next=1950}}<br />
<br />
* [[EDSAC]] did its first calculation in the summer of 1949.</div>Archivist