Able UNIVERTER - Revision history

Jnc: /* External links */ +User's Guide

2022-12-05T16:32:12Z

‎External links: +User's Guide

Jnc: Better wording to convey correct meaning

2019-09-10T15:17:59Z

Better wording to convey correct meaning

Jnc: typo

2019-09-10T13:48:52Z

typo

Jnc: avoid redir

2019-09-10T02:13:46Z

avoid redir

Jnc: An OK start

2019-09-10T01:20:43Z

An OK start

New page

[[Image:AbleUNIVERTER.jpg|thumb|right|250px|Able UNIVERTER]]

The '''UNIVERTER''' is a device which can 'translate' a [[QBUS]] into a [[UNIBUS]]. This is possible because the high level semantics of the two busses are roughly identical ([[interrupt]]s, [[Direct Memory Access|DMA]], etc); only the low-level details differ. (E.g. the UNIBUS carries [[address]]es and data on separate [[conductor|lines]], whereas the QBUS carries them both on a set of shared lines.)

The UNIVERTER was a product of the [[Able Computer]] company; from the part number, likely their first product.

Physically, the UNIVERTER is a [[DEC card form factor|quad]]-width [[printed circuit board|PCB]] that plugs into a quad slot on a QBUS [[backplane]]. A dual-width connector along the back edge of the card is the UNIBUS; a standard [[BC11-A UNIBUS cable]] plugs in there.

The UNIVERTER requires that the [[bus grant|bus arbiter]], and the interrupt-fielding [[Central Processing Unit|processor]], be on the QBUS. The UNIVERTER appears on the QBUS as a QBUS device; i.e. cards can be plugged into the QBUS after the UNIVERTER, but their [[bus grant line|grant]] priority will be lower than any UNIBUS devices. [[Main memory|Memory]] can be on either bus.

The UNIVERTER contains several [[register]]s which can be used to control optional settings for several fine details of the translater.

[[Category: QBUS]]
[[Category: UNIBUS]]

@@ Line 7: / Line 7: @@
 Physically, the UNIVERTER is a [[DEC card form factor|quad]]-width [[printed circuit board|PCB]] that plugs into a quad slot on a QBUS [[backplane]]. A dual-width connector along the back edge of the card is the UNIBUS; a standard [[BC11A UNIBUS cable]] plugs in there.
-The UNIVERTER requires that the [[bus grant|bus arbiter]], and the interrupt-fielding [[Central Processing Unit|processor]], be on the QBUS. The UNIVERTER appears on the QBUS as a QBUS device; i.e. cards can be plugged into the QBUS after the UNIVERTER, but their [[bus grant line|grant]] priority will be lower than any UNIBUS devices. [[Main memory|Memory]] can be on either bus.
+The UNIVERTER requires that the [[bus grant|bus arbiter]], and the interrupt-fielding [[Central Processing Unit|processor]], be on the QBUS. The UNIVERTER does not have to be at the end of the QBUS; i.e. cards can be plugged into the QBUS after the UNIVERTER, but their [[bus grant line|grant]] priority will be lower than any UNIBUS devices. [[Main memory|Memory]] can be on either bus.
 The UNIVERTER contains several [[register]]s which can be used to control optional settings for several fine details of the translator.

@@ Line 10: / Line 10: @@
 The UNIVERTER contains several [[register]]s which can be used to control optional settings for several fine details of the translator.
 [[Category: QBUS]]
 [[Category: UNIBUS]]

@@ Line 1: / Line 1: @@
 [[Image:AbleUNIVERTER.jpg|thumb|right|250px|Able UNIVERTER]]
-The '''UNIVERTER''' is a device which can 'translate' a [[QBUS]] into a [[UNIBUS]]. This is possible because the high level semantics of the two busses are roughly identical ([[interrupt]]s, [[Direct Memory Access|DMA]], etc); only the low-level details differ. (E.g. the UNIBUS carries [[address]]es and data on separate [[conductor|lines]], whereas the QBUS carries them both on a set of shared lines.)
+The '''UNIVERTER''' is a device which can 'translate' a [[QBUS]] into a [[UNIBUS]]. This is possible because the high level semantics of the two busses are roughly identical (e.g. in [[interrupt]]s, [[Direct Memory Access|DMA]], etc); only the low-level details differ. (E.g. the UNIBUS carries [[address]]es and data on separate [[conductor|lines]], whereas the QBUS carries them both on a set of shared lines.)
 The UNIVERTER was a product of the [[Able Computer]] company; from the part number, likely their first product.
@@ Line 9: / Line 9: @@
 The UNIVERTER requires that the [[bus grant|bus arbiter]], and the interrupt-fielding [[Central Processing Unit|processor]], be on the QBUS. The UNIVERTER appears on the QBUS as a QBUS device; i.e. cards can be plugged into the QBUS after the UNIVERTER, but their [[bus grant line|grant]] priority will be lower than any UNIBUS devices. [[Main memory|Memory]] can be on either bus.
-The UNIVERTER contains several [[register]]s which can be used to control optional settings for several fine details of the translater.
+The UNIVERTER contains several [[register]]s which can be used to control optional settings for several fine details of the translator.
 [[Category: QBUS]]
 [[Category: UNIBUS]]