Access time - Revision history

Jnc: prepare for move

2022-09-20T00:11:20Z

prepare for move

← Older revision		Revision as of 00:11, 20 September 2022
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	In [[main memory]], the '''access time''' (sometimes '''response time''') is the time period between the start of a read access cycle, and the point in time when the data is returned to the requestor.		In [[main memory]], the '''access time''' (sometimes '''response time''') is the time period between the start of a read access cycle, and the point in time when the data is returned to the requestor.

	In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.		In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[memory refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.

	For [[secondary storage]], such as [[disk]]s, it refers to the time between when the disk is asked to perform an operation on a given block, and when the operation begins.		For [[secondary storage]], such as [[disk]]s, it refers to the time between when the disk is asked to perform an operation on a given block, and when the operation begins.

Jnc: +cats

2018-12-15T14:34:06Z

+cats

← Older revision		Revision as of 14:34, 15 December 2018
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			[[Category: Memory Basics]]
			[[Category: Device Basics]]

Jnc: Access time on disks

2018-10-06T16:00:29Z

Access time on disks

← Older revision		Revision as of 16:00, 6 October 2018
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	In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.		In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.

			For [[secondary storage]], such as [[disk]]s, it refers to the time between when the disk is asked to perform an operation on a given block, and when the operation begins.

	==See also==		==See also==
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	* [[Cycle time]]		* [[Cycle time]]

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Jnc: Alt term

2018-07-06T11:42:12Z

Alt term

← Older revision		Revision as of 11:42, 6 July 2018
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	In [[main memory]], the '''access time''' is the time period between the start of a read access cycle, and the point in time when the data is returned to the requestor.		In [[main memory]], the '''access time''' (sometimes '''response time''') is the time period between the start of a read access cycle, and the point in time when the data is returned to the requestor.

	In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.		In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.

Jnc: +See also

2018-07-06T11:26:16Z

+See also

← Older revision		Revision as of 11:26, 6 July 2018
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	In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.		In [[Dynamic RAM\|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.

			==See also==

			* [[Cycle time]]

	{{stub}}		{{stub}}

Jnc: Pretty subby

2018-06-17T11:28:12Z

Pretty subby

New page

In [[main memory]], the '''access time''' is the time period between the start of a read access cycle, and the point in time when the data is returned to the requestor.

In [[Dynamic RAM|DRAM]] memories, if the memory is in the middle of a [[refresh]] cycle when the request arrives, that can delay the memory's response - and thus the access time for that particular cycle.

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