Automatic Sequence Controlled Calculator - Revision history

Jnc: Change to linkable term

2024-08-31T11:04:31Z

Change to linkable term

Jnc: Grammar

2023-12-24T11:20:26Z

Grammar

Jnc: +Category - engineered by IBM

2023-12-21T12:13:00Z

+Category - engineered by IBM

Jnc: Pretty decent coverage

2023-11-29T14:25:11Z

Pretty decent coverage

New page

The '''Automatic Sequence Controlled Calculator''' (widely called the '''Harvard Mark I''' among computer scientists; also known by the acronym, '''ASCC''') was a large electro-mechanical [[computing device]], an intermediate step between [[Charles Babbage]]'s proposed [[Analytical Engine]] (but, unlike the Engine, actually completed and used), and the [[ENIAC]]. It was produced by a collaboration between [[Howard Aiken]] of Harvard, and [[International Business Machines|IBM]].

It was electro-mechanical, in that data was carried through the machine electrically, but all the [[logic]] used [[relay]]s as switching elements, as in a prior generation of computing devices, such as IBM's [[punched card]] business data processing devices ("electric accounting machines", as IBM called them). Numbers in [[register]]s were stored using rotating counter wheels (similar in spirit to the gears of Babbage's machines, but electrically actuated); there were 72 registers in total, each containing 24 wheels (23 digits and one sign). There were 60 additional 'read-only' registers, whose contents were set with dials.

It also used four extra-wide [[paper tape]] readers, both to hold input data (three readers), and as the source for its [[program]] (although some configuration used [[plug-board]]s, like those found on IBM devices of that era). Each line ('[[instruction]]') on the 'program' tape (the same width as punched card stock) had three fields, each 8 [[bit]]s wide: an [[operand]] location (usually a register number); a second operand/output location; the desired [[operator|operation]] (roughly 30 in total, including [[input/output|I/O]], multiplication and division). Many of the input and output codes had side-effects, as well as selecting a register. The ASCC also had two punched card readers, one punch, and two [[printer]]s.

A multiplication took a minimum of 8 cycles (2.4 seconds), up to a maximum of 20 cycles (6.0 seconds) for a multiplier containing 23 non-zero digits. Intended mostly for mathematical tasks, such as producing tables of various kinds, it also did some applied mathematics work, such as ballistic computations, and also some atomic physics work.

It was architected by Aiken, starting in 1938, and then designed in detail by engineers from IBM (including James Bryce, Clair Lake, Frank Hamilton, Benjamin Durfee, and their subordinate engineers), and built by IBM. It first operated in January, 1943. It was thus something of a contemporary of the very similar [[Bell Telephone Laboratories relay computing devices]] of [[George Stibitz]], the first of which was placed in service in 1940, although the ASCC was far better known.

It was later outgrown by other IBM computing devices: the [[Aberdeen Relay Calculator]], which was architecturally very similar to the ASCC, but used only relays, no mechanical wheels; and the slightly later [[Selective Sequence Electronic Calculator]], also architecturally very similar, but utilized [[electronic]] components, both for storage, and for logic.

==Further reading==

* The Staff of the Computation Laboratory, ''A Manual of Operation for the Automatic Sequence Controlled Calculator'', Harvard University, Cambridge, 1946 - reprinted several times by others
* Editor - Brian Randell, [https://link.springer.com/book/10.1007/978-3-642-96145-8 ''The Origins of Digital Computers: Selected Papers''], Springer-Verlag, Berlin, Heidelberg, New York, 1973, 1982 (3rd edition) - includes Aiken's original proposal of 1937
* Charles J. Bashe, Lyle R. Johnson, John H. Palmer, Emerson W. Pugh, ''IBM's Early Computers'', MIT Press, Cambridge, 1986 - covers the antecedents and construction

==External links==

* [https://chsi.harvard.edu/harvard-ibm-mark-1 Harvard IBM Mark I - Automatic Sequence Controlled Calculator]
** [https://chsi.harvard.edu/harvard-ibm-mark-1-manual Harvard IBM Mark I - Manual]

[[Category: Early Computing Devices]]

← Older revision		Revision as of 12:13, 21 December 2023
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	[[Category: Early Computing Devices]]		[[Category: Early Computing Devices]]
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 It was electro-mechanical, in that data was carried through the machine electrically, but all the [[logic]] used [[relay]]s as switching elements, as in a prior generation of computing devices, such as IBM's [[punched card]] business data processing devices ("electric accounting machines", as IBM called them). Numbers in [[register]]s were stored using rotating counter wheels (similar in spirit to the gears of Babbage's machines, but electrically actuated); there were 72 registers in total, each containing 24 wheels (23 digits and one sign). There were 60 additional 'read-only' registers, whose contents were set with dials.
-It also used four extra-wide [[paper tape]] readers, both to hold input data (three readers), and as the source for its [[program]] (although some configuration used [[plug-board]]s, like those found on IBM devices of that era). Each line ('[[instruction]]') on the 'program' tape (the same width as punched card stock) had three fields, each 8 [[bit]]s wide: an [[operand]] location (usually a register number); a second operand/output location; the desired [[operator|operation]] (roughly 30 in total, including [[input/output|I/O]], multiplication and division). Many of the input and output codes had side-effects, as well as selecting a register. The ASCC also had two punched card readers, one punch, and two [[printer]]s.
+It also used four extra-wide [[paper tape]] readers, both to hold input data (three readers), and as the source for its [[program]] (although some configuration used [[plug-board]]s, like those found on IBM devices of that era). Each line ('[[instruction]]') on the 'program' tape (the same width as punched card stock) had three fields, each 8 [[bit]]s wide: an [[operand]] [[address]] (usually a register number); a second operand/output address; the desired [[operator|operation]] (roughly 30 in total, including [[input/output|I/O]], multiplication and division). Many of the input and output codes had side-effects, as well as selecting a register. For I/O, the ASCC also had two punched card readers, one punch, and two [[printer]]s.
 A multiplication took a minimum of 8 cycles (2.4 seconds), up to a maximum of 20 cycles (6.0 seconds) for a multiplier containing 23 non-zero digits. Intended mostly for mathematical tasks, such as producing tables of various kinds, it also did some applied mathematics work, such as ballistic computations, and also some atomic physics work.

@@ Line 9: / Line 9: @@
 It was architected by Aiken, starting in 1938, and then designed in detail by engineers from IBM (including James Bryce, Clair Lake, Frank Hamilton, Benjamin Durfee, and their subordinate engineers), and built by IBM. It first operated in January, 1943. It was thus something of a contemporary of the very similar [[Bell Telephone Laboratories relay computing devices]] of [[George Stibitz]], the first of which was placed in service in 1940, although the ASCC was far better known.
-It was later outgrown by other IBM computing devices: the [[Aberdeen Relay Calculator]], which was architecturally very similar to the ASCC, but used only relays, no mechanical wheels; and the slightly later [[Selective Sequence Electronic Calculator]], also architecturally very similar, but utilized [[electronic]] components, both for storage, and for logic.
+It was later outgrown by other IBM computing devices: the [[Aberdeen Relay Calculator]], which was architecturally very similar to the ASCC, but used only relays, no mechanical wheels; and the slightly later [[Selective Sequence Electronic Calculator]], also architecturally very similar, but which utilized [[electronic]] components, both for storage, and for logic.
 ==Further reading==