Bus grant - Revision history

Jnc: +See also

2019-11-11T16:42:18Z

+See also

2018-12-16T00:08:04Z

+cat

2018-09-18T13:37:50Z

cover arbitration

2018-09-18T13:27:19Z

A bit stubby, but a start

2017-07-23T14:48:24Z

Redir to long name

New page

#Redirect [[Bus grant line]]

@@ Line 4: / Line 4: @@
 If multiple devices all want to use the bus at the same time, then before a grant can be handed out, usually some sort of '''bus arbitration''' must be performed, to see which device will get the bus first. There are many ways to do this; the system might use [[bus grant line]]s, or there might be some sort of distributed arbitration.
 {{semi-stub}}
 [[Category: Device Basics]]

@@ Line 3: / Line 3: @@
 This obviously requires the computer to have a bus on which the devices can do more than simply respond to read and write requests from the CPU. Most do, although in some computers (e.g. some [[mainframe]]s, and now high-performance [[personal computer]]s), devices may have a private bus to main memory, which is [[multi-port memory]], so in those systems, DMA cycles will not need a bus grant.
-==See also==
+If multiple devices all want to use the bus at the same time, then before a grant can be handed out, usually some sort of '''bus arbitration''' must be performed, to see which device will get the bus first. There are many ways to do this; the system might use [[bus grant line]]s, or there might be some sort of distributed arbitration.
 {{semi-stub}}

← Older revision		Revision as of 13:27, 18 September 2018
Line 1:		Line 1:
−	~~#Redirect~~ [[Bus grant line]]	+	A '''bus grant''' is when the [[Central Processing Unit\|CPU]] (or '''bus arbiter''', in machines in which the two are separate) turns over a [[bus]] to a [[device controller]] so that the device can either start an [[interrupt]], or do [[Direct Memory Access\|DMA]] transfer(s) to [[main memory]].
		+
		+	This obviously requires the computer to have a bus on which the devices can do more than simply respond to read and write requests from the CPU. Most do, although in some computers (e.g. some [[mainframe]]s, and now high-performance [[personal computer]]s), devices may have a private bus to main memory, which is [[multi-port memory]], so in those systems, DMA cycles will not need a bus grant.
		+
		+	==See also==
		+
		+	* [[Bus grant line]]
		+
		+	{{semi-stub}}