Bus grant line - Revision history

Jnc: Mention the race between a new request and an old grant; add clarification about basic operation

2025-07-27T17:03:15Z

Mention the race between a new request and an old grant; add clarification about basic operation

← Older revision		Revision as of 17:03, 27 July 2025
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	'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to [[device controller]]s that ~~their~~ request for [[interrupt]]~~s and~~ [[Direct Memory Access\|DMA]] ~~have~~ been [[bus grant\|granted]] (hence the name).		'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to a [[device controller]] that its request for an [[interrupt]] or [[Direct Memory Access\|DMA]] has been [[bus grant\|granted]] (hence the name). The CPU does this by sending a [[pulse]] down the grant line, to the device controller, to notify it.

	~~They~~ are ~~often~~ wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting ~~the~~ the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA~~/interrupt~~, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on ~~'''~~its~~'''~~ grant out line.		Such lines are usually wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested an interrupt/DMA, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on its grant out line.

	In ~~other words~~, when there are conflicting requests for the bus, ~~this kind of system prioritizes~~ the requests based on the devices' location on the bus; the ones closest to the CPU have the highest priority.		(A perceptive reader may have noticed that there is a potential [[race]] here, between an incoming grant, previously sent by the CPU in response to some ''other'' device's request, and a ''new'' request just raised by the device. For a more detailed discussion of this topic, see [[Bus Arbitration on the Unibus and QBUS\|here]].)

			In such series-wired systems, when there are conflicting requests for the bus, the requests are prioritized based on the devices' location on the bus; the ones closest to the CPU have the highest priority.

	On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].		On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].
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	* [[DMA Request and Grant]] - QBUS DMA request and grant lines		* [[DMA Request and Grant]] - QBUS DMA request and grant lines
	* [[M8264 No-SACK Timeout Module]] - in particular, the [[M8264 No-SACK Timeout Module#Functionality discussion\|Discussion]] section		* [[M8264 No-SACK Timeout Module]] - in particular, the [[M8264 No-SACK Timeout Module#Functionality discussion\|Discussion]] section
	* [[Bus Arbitration on the Unibus and QBUS‎‎]]

	[[Category: Hardware Basics]]		[[Category: Hardware Basics]]

Jnc: /* See also */ +UNIBUS/QBUS DMA lines

2023-02-13T23:01:02Z

Jnc: /* See also */ +M8264 No-SACK Timeout Module

2022-12-04T14:27:29Z

Jnc: +see also

2019-10-01T17:37:26Z

+see also

← Older revision		Revision as of 17:37, 1 October 2019
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	On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].		On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].

			==See also==

			* [[Bus Arbitration on the Unibus and QBUS‎‎]]

	[[Category: Hardware Basics]]		[[Category: Hardware Basics]]

Jnc: +cat

2018-12-16T00:08:47Z

+cat

← Older revision		Revision as of 00:08, 16 December 2018
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	On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].		On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].

			[[Category: Hardware Basics]]

Jnc: +link

2018-09-18T18:30:08Z

+link

← Older revision		Revision as of 18:30, 18 September 2018
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	'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to [[device controller]]s that their request for [[interrupt]]s and [[Direct Memory Access\|DMA]] have been granted (hence the name).		'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to [[device controller]]s that their request for [[interrupt]]s and [[Direct Memory Access\|DMA]] have been [[bus grant\|granted]] (hence the name).

	They are often wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.		They are often wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.

Jnc: Discuss priority

2018-09-18T15:34:26Z

Discuss priority

← Older revision		Revision as of 15:34, 18 September 2018
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	'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to ~~devices~~ that their request for [[interrupt]]s and [[Direct Memory Access\|DMA]] have been granted (hence the name).		'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to [[device controller]]s that their request for [[interrupt]]s and [[Direct Memory Access\|DMA]] have been granted (hence the name).

	They are wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.		They are often wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.

			In other words, when there are conflicting requests for the bus, this kind of system prioritizes the requests based on the devices' location on the bus; the ones closest to the CPU have the highest priority.

	On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].		On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].

Jnc: Simpler

2018-01-06T01:02:49Z

Simpler

← Older revision		Revision as of 01:02, 6 January 2018
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	They are wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.		They are wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.

	On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card~~\|G7273~~]] ~~grant continuity card~~.		On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card]].

Jnc: Add grant continuity cards

2018-01-05T12:33:43Z

Add grant continuity cards

← Older revision		Revision as of 12:33, 5 January 2018
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	'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[CPU]] to communicate to devices that their request for [[interrupt]]s and [[Direct Memory Access\|DMA]] have been granted (hence the name).		'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[Central Processing Unit\|CPU]] (or whatever circuitry is controlling the bus) to communicate to devices that their request for [[interrupt]]s and [[Direct Memory Access\|DMA]] have been granted (hence the name).

	They are wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.		They are wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.

			On systems which have [[backplane]]s into which devices can be plugged, it is usually necessary to provide some means for a grant to 'jump over' an empty backplane slot; for the UNIBUS, this is done with either a [[G727 grant continuity card\|G727]] or a [[G7273 grant continuity card\|G7273]] grant continuity card.

Jnc: Separate page for use by other pages

2017-07-23T14:50:34Z

Separate page for use by other pages

New page

'''Bus grant lines''' are used in a number of bus architectures (for example, the [[UNIBUS]] and [[QBUS]]) for the [[CPU]] to communicate to devices that their request for [[interrupt]]s and [[Direct Memory Access|DMA]] have been granted (hence the name).

They are wired in series, so that one device's 'grant out' line is connected to the next device's 'grant in' line, starting the the CPU's 'grant out' line. When a device sees a 'granted' pulse on one of its grant in lines, '''if''' the device had requested a DMA/interrupt, it 'consumes' the grant pulse, and goes on to do the type of operation it requested; if it was '''not''' requesting that type of operation, it 'passes' the grant by generating a 'granted' pulse on '''its''' grant out line.

← Older revision		Revision as of 23:01, 13 February 2023
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	==See also==		==See also==

			* [[Non-Processor Request and Grant]] - UNIBUS DMA request and grant lines
			* [[DMA Request and Grant]] - QBUS DMA request and grant lines
	* [[M8264 No-SACK Timeout Module]] - in particular, the [[M8264 No-SACK Timeout Module#Functionality discussion\|Discussion]] section		* [[M8264 No-SACK Timeout Module]] - in particular, the [[M8264 No-SACK Timeout Module#Functionality discussion\|Discussion]] section
	* [[Bus Arbitration on the Unibus and QBUS‎‎]]		* [[Bus Arbitration on the Unibus and QBUS‎‎]]

	[[Category: Hardware Basics]]		[[Category: Hardware Basics]]

← Older revision		Revision as of 14:27, 4 December 2022
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	==See also==		==See also==

			* [[M8264 No-SACK Timeout Module]] - in particular, the [[M8264 No-SACK Timeout Module#Functionality discussion\|Discussion]] section
	* [[Bus Arbitration on the Unibus and QBUS‎‎]]		* [[Bus Arbitration on the Unibus and QBUS‎‎]]

	[[Category: Hardware Basics]]		[[Category: Hardware Basics]]