CDC 6600 - Revision history

Jnc: Ref sibling 6400

2025-07-04T04:30:02Z

Ref sibling 6400

Jnc: /* External links */ +Watson's famous memo on the CDC 6600

2025-07-04T04:24:20Z

‎External links: +Watson's famous memo on the CDC 6600

Jnc: /* External links */ +CDC DD60A console

2025-04-22T15:04:30Z

‎External links: +CDC DD60A console

Jnc: /* Further reading */ +Parallel Operation in the Control Data 6600

2024-01-22T15:26:24Z

‎Further reading: +Parallel Operation in the Control Data 6600

Jnc: Add link for online copy of book

2024-01-11T14:14:54Z

Add link for online copy of book

Jnc: /* External links */ Several more

2024-01-11T14:12:45Z

‎External links: Several more

Jnc: Link to docs; mention dual-CPU version

2024-01-11T13:53:19Z

Link to docs; mention dual-CPU version

Jnc: interleaving cleanup

2023-07-30T17:46:45Z

interleaving cleanup

Larsbrinkhoff: Never forget!

2023-07-11T11:51:18Z

Never forget!

Jnc: New cat

2023-01-29T13:38:52Z

New cat

← Older revision		Revision as of 04:30, 4 July 2025
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	The 6600 was built using then-new silicon [[transistor]]s, and the physical arrangement was designed to minimize [[conductor]] lengths, to minimize 'speed of light' delays. All the longer [[conductor\|wires]] in the system were [[transmission line]]s, for more reliable operation.		The 6600 was built using then-new silicon [[transistor]]s, and the physical arrangement was designed to minimize [[conductor]] lengths, to minimize 'speed of light' delays. All the longer [[conductor\|wires]] in the system were [[transmission line]]s, for more reliable operation.
		+
		+	A sibling machine, the [[CDC 6400]] shared its [[instruction set architecture]] with the 6600, and so was [[program compatible]] at the [[object code]] level, but it did not use a superscalar internal architecture, as the 6600 did. As a result, it was not as fast as the 6600, but was cheaper.

	==Superscalar details==		==Superscalar details==

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 * [https://people.computing.clemson.edu/~mark/cdc6600.html CDC 6600 Links]
 * [http://gordonbell.azurewebsites.net/Computer_Structures__Readings_and_Examples/00000509.htm Parallel operation in the Control Data 6600]
 * [https://www.christies.com/en/lot/lot-6495043 CDC DD60A console] - front console for a CDC 6600, from [[Paul Allen]]'s collection at the [[Living Computer Museum|LCM]]; includes several images
 [[Category: Supercomputers]]
 [[Category: 60-bit Computers]]

@@ Line 86: / Line 86: @@
 * [https://people.computing.clemson.edu/~mark/cdc6600.html CDC 6600 Links]
 * [http://gordonbell.azurewebsites.net/Computer_Structures__Readings_and_Examples/00000509.htm Parallel operation in the Control Data 6600]
 [[Category: Supercomputers]]
 [[Category: 60-bit Computers]]

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 ==Further reading==
-* Jim E. Thornton, [http://www.bitsavers.org/pdf/cdc/cyber/books/DesignOfAComputer_CDC6600.pdf ''Design of A Computer: The Control Data 6600''], Scott, Foresman, Glenview, 1970
+* Jim E. Thornton, [http://www.bitsavers.org/pdf/cdc/cyber/books/DesignOfAComputer_CDC6600.pdf ''Design of A Computer: The Control Data 6600''], Scott, Foresman, Glenview, 1970 <!--
 ==External links==

@@ Line 72: / Line 72: @@
 ==Further reading==
-* Jim E. Thornton, ''Design of A Computer: The Control Data 6600'', Scott, Foresman, Glenview, 1970
+* Jim E. Thornton, [http://www.bitsavers.org/pdf/cdc/cyber/books/DesignOfAComputer_CDC6600.pdf ''Design of A Computer: The Control Data 6600''], Scott, Foresman, Glenview, 1970
 ==External links==
@@ Line 78: / Line 78: @@
 * [http://bitsavers.org/pdf/cdc/cyber/ Cyber] - CDC 6600 documentation at [[Bitsavers]]
 ** [http://bitsavers.org/pdf/cdc/cyber/cyber_70/thornton_6600_paper.pdf Considerations in Computer Design - Leading up to the Control Data 6600]
 ** [http://bitsavers.org/pdf/cdc/cyber/cyber_70/60100000AL_6000_Series_Computer_Systems_HW_Reference_Aug78.pdf Control Data 6000 Series Computer Systems Hardware Reference Manual]
 * [http://bitsavers.org/pdf/cdc/Tom_Hunter_Scans/ Scans] - additional 6000 Series documents

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 |}}
-The '''CDC 6600''' was an influential early (1964) [[mainframe]] computer. It is generally considered the first true [[supercomputer]], three times faster than the [[IBM 7030 Stretch]], the previous 'fastest computer' record-holder; the 6600 held the title from 1965 to 1969.
+The '''CDC 6600''' was an influential early (1964) [[mainframe]] computer; the dual-[[Central Processing Unit|CPU]] version of the 6600 was denominated as a '''CDC 6700'''. It is generally considered the first true [[supercomputer]], three times faster than the [[IBM 7030 Stretch]], the previous 'fastest computer' record-holder; the 6600 held the title from 1965 to 1969.
 It was also the first computer to use a [[superscalar]] internal [[architecture]] (although the term 'superscalar' did not exist at that time). The functional units were not [[pipeline]]d internally, a refinement that was introduced with the 6600's successor, the [[CDC 7600]].
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 * Jim E. Thornton, ''Design of A Computer: The Control Data 6600'', Scott, Foresman, Glenview, 1970
 [[Category: Supercomputers]]
 [[Category: 60-bit Computers]]

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 It used a [[Reduced Instruction Set Computer|RISC]]-like approach, in that [[instruction]]s were simple, doing only one thing; the [[instruction set]] was basically [[load-store architecture|load-store]]. Instructions took a minimum of three clock ticks.
-The [[Central Processing Unit|CPU]] did not do any [[input/output|I/O]]; that was left to a set of ten 'Peripheral Processing Units', which shared access to the [[main memory]] (which had a 32-way [[interleaving|interleave]] to maximize throughput).
+The [[Central Processing Unit|CPU]] did not do any [[input/output|I/O]]; that was left to a set of ten 'Peripheral Processing Units', which shared access to the [[main memory]] (which had a 32-way [[memory interleaving|interleave]] to maximize throughput).
 In addition to the main memory, the 6600 was later upgraded with an 'Extended Core Storage' unit, with a [[cycle time]] of 3.2 µseconds, holding up to 2 megawords. This was intended to smooth out the large performance gap in the [[storage hierarchy]] between main memory and [[disk]].
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 * Second Order Conflict: a conflict where one operand of an instruction is the output of a previous instruction, which has not yet completed - these were dealt with by not letting the given functional unit start its processing until its input was available.
 * Third Order Conflict: one where an instruction will use as an output register one which is an input to a previous, but as-yet un-started instruction - these are handled by holding the result in the functional unit until it can safely be stored.
 ==Further reading==
 * Jim E. Thornton, ''Design of A Computer: The Control Data 6600'', Scott, Foresman, Glenview, 1970
 [[Category: Supercomputers]]
 [[Category: 60-bit Computers]]

← Older revision		Revision as of 11:51, 11 July 2023
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	[[Category: Supercomputers]]		[[Category: Supercomputers]]
		+	[[Category: 60-bit Computers]]