CD interconnect - Revision history

Jnc: /* Further reading */ +C-D Interconnect Scheme

2024-07-25T13:11:24Z

Further reading: +C-D Interconnect Scheme

← Older revision		Revision as of 13:11, 25 July 2024
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	The DEC [[H9278-A backplane]] (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.		The DEC [[H9278-A backplane]] (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.

			==Further reading==

			* ''C-D Interconnect Scheme'', [[MicroNote]] #037

	[[Category: DEC Buses]]		[[Category: DEC Buses]]

Jnc: Update URL; original site now offline

2024-07-24T01:15:50Z

Update URL; original site now offline

← Older revision		Revision as of 01:15, 24 July 2024
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	The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and [[PMI memories]], to carry PMI [[signal]]s.		The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and [[PMI memories]], to carry PMI [[signal]]s.

	'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as PMI memory cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. (The exact details of why are as yet unclear.) [''NOTE:'' The exact failure mode here is still not understood; the PMI spec was examined, but no clash of pin assignments was found. The warning is accurate, though: [~~http~~://~~web~~.~~frainresearch~~.org~~:8080~~/~~projects~~/pdp-11/micronotes/micronote28.txt MicroNote 28] says "MSV11-J MODULES CAN[NOT] BE PLACED IN A Q/Q BACKPLANE SLOT. IF THIS IS ATTEMPTED PERMANENT DAMAGE WILL BE DONE TO THE BOARDS".] So, plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.		'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as PMI memory cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. (The exact details of why are as yet unclear.) [''NOTE:'' The exact failure mode here is still not understood; the PMI spec was examined, but no clash of pin assignments was found. The warning is accurate, though: [https://www.ibiblio.org/pub/academic/computer-science/history/pdp-11/hardware/micronotes/numerical/micronote28.txt MicroNote #28] says "MSV11-J MODULES CAN[NOT] BE PLACED IN A Q/Q BACKPLANE SLOT. IF THIS IS ATTEMPTED PERMANENT DAMAGE WILL BE DONE TO THE BOARDS".] So, plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.

	==Details==		==Details==

Jnc: /* Backplanes */ +links

2023-06-22T14:15:26Z

Backplanes: +links

← Older revision		Revision as of 14:15, 22 June 2023
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	==Backplanes==		==Backplanes==

	The DEC H9273-A backplane (used in the [[BA11-N mounting box]]) and H9276 backplane (used in the [[BA11-S mounting box]]) are both full Q/CD backplanes (i.e. every slot is a Q/CD slot); the former is [[QBUS#Variable address size\|Q18]], and the latter Q22, although the former is easy to [[Upgrading QBUS backplanes\|modify to Q22]].		The DEC [[H9273 backplane\|H9273-A backplane]] (used in the [[BA11-N mounting box]]) and [[H9276 backplane]] (used in the [[BA11-S mounting box]]) are both full Q/CD backplanes (i.e. every slot is a Q/CD slot); the former is [[QBUS#Variable address size\|Q18]], and the latter Q22, although the former is easy to [[Upgrading QBUS backplanes\|modify to Q22]].

	The DEC H9278-A backplane (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.		The DEC [[H9278-A backplane]] (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.

	[[Category: DEC Buses]]		[[Category: DEC Buses]]

Jnc: /* Use by PMI */ PMI damage reason still not fully understood

2021-10-21T13:27:49Z

Use by PMI: PMI damage reason still not fully understood

← Older revision		Revision as of 13:27, 21 October 2021
Line 9:		Line 9:
	The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and [[PMI memories]], to carry PMI [[signal]]s.		The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and [[PMI memories]], to carry PMI [[signal]]s.

	'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as PMI memory cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. (The exact details of why are as yet unclear.) ~~Plugging~~ such a card into a Q/Q backplane will generally '''''destroy''''' the card.		'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as PMI memory cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. (The exact details of why are as yet unclear.) [''NOTE:'' The exact failure mode here is still not understood; the PMI spec was examined, but no clash of pin assignments was found. The warning is accurate, though: [http://web.frainresearch.org:8080/projects/pdp-11/micronotes/micronote28.txt MicroNote 28] says "MSV11-J MODULES CAN[NOT] BE PLACED IN A Q/Q BACKPLANE SLOT. IF THIS IS ATTEMPTED PERMANENT DAMAGE WILL BE DONE TO THE BOARDS".] So, plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.

	==Details==		==Details==

Jnc: Move PMI details to PMI page

2021-02-09T20:57:22Z

Move PMI details to PMI page

← Older revision		Revision as of 20:57, 9 February 2021
Line 5:		Line 5:
	In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.		In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.

	'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as ~~[[Private Memory Interconnect\|~~PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.		==Use by PMI==

			The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and [[PMI memories]], to carry PMI [[signal]]s.

			'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as PMI memory cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. (The exact details of why are as yet unclear.) Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.

	==Details==		==Details==
Line 20:		Line 24:

	The DEC H9278-A backplane (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.		The DEC H9278-A backplane (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.

	~~==Use by PMI==~~

	~~The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and the [[MSV11-J QBUS memory]].~~

	The connection is somewhat idiosyncratic, because it is desirable to be able to plug in a variable number of memory cards - i.e. create a true 'bus' by connecting together more than two slots. If the CPU card sent out the PMI bus on the bottom (2, or solder-side) pins, then the memory card would have to take the PMI bus in on its top (1, component-side) pins, and repeat the bus through on its bottom pins, for use by a notional 'next memory card'. However, if the next card is ''not'' a PMI memory card, this will result in the PMI bus being sent to a card which does not use it - possibly with harmful effects.

	So, instead, PMI CPU cards emit the PMI bus on their '''''top''''' CD connector pins, and the memory cards take the bus in on their '''''bottom''''' pins, and repeat it through to their '''''top''''' pins. Thus, PMI memory cards must be placed in a Q/CD backplane '''''above''''' the CPU card.

	An exception to this rule is the backplane in the [[PDP-11/84]], in which the CD connectors of the QBUS section of the backplane are wired to form a true bus; in this machine, the PMI memory cards are placed ''below'' the processor card.

	[[Category: DEC Buses]]		[[Category: DEC Buses]]

Jnc: typo

2021-02-09T16:43:04Z

typo

← Older revision		Revision as of 16:43, 9 February 2021
Line 5:		Line 5:
	In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.		In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.

	'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as [[Private Memory Interconnect\|PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]].which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.		'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as [[Private Memory Interconnect\|PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]] which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.

	==Details==		==Details==

Jnc: clarify

2021-02-09T16:42:26Z

clarify

← Older revision		Revision as of 16:42, 9 February 2021
Line 5:		Line 5:
	In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.		In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.

	'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as [[Private Memory Interconnect\|PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.		'''''NOTE WELL:''''' For reasons which seem utterly incomprehensible, many boards designed for Q/CD slots (such as [[Private Memory Interconnect\|PMI]] cards) '''do not''' avoid the QBUS pins on the CD connectors of a [[QBUS#Backplanes\|Q/Q backplane]].which contain 'hazardous' (to TTL circuitry) voltages. Plugging such a card into a Q/Q backplane will generally '''''destroy''''' the card.

	==Details==		==Details==

Jnc: Fix cat, add links

2018-02-19T22:06:59Z

Fix cat, add links

← Older revision		Revision as of 22:06, 19 February 2018
Line 1:		Line 1:
	The '''CD interconnect''' (sometimes given as '''C/D interconnection''', or some variant thereof) is the name given to the 'bus' which is present on the [[DEC edge connector contact identification\|C and D connectors]] of a [[QBUS#Backplanes\|Q/CD backplane]].		The '''CD interconnect''' (sometimes given as '''C/D interconnection''', or some variant thereof) is the name given to the 'bus' which is present on the [[DEC edge connector contact identification\|C and D connectors]] of a [[QBUS#Backplanes\|Q/CD backplane]].

	It is not actually a full bus (i.e. a given pin is not connected to 'all' instances of that pin, in every slot in the backplane); rather, slots are connected together in pairs, and these connections are used to connect together board pairs, without the need of a so-called 'over the back' connector cable.		It is not actually a full [[bus]] (i.e. a given pin is not connected to 'all' instances of that pin, in every slot in the [[backplane]]); rather, slots are connected together in pairs, and these connections are used to connect together board pairs, without the need of a so-called '[[over the back]]' connector cable.

	In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.		In general (see below for details), the bottom ([[DEC card form factor#Edge connector contact identification\|2]], or solder-side) pins on one slot are connected to the top (1, or component-side) pins on the next slot. It runs down the right-hand side of the backplane, when facing the side of the backplane where the boards plug in.
Line 17:		Line 17:
	==Backplanes==		==Backplanes==

	The DEC H9273-A backplane (used in the BA11-N ~~cabinet~~) and H9276 backplane (used in the BA11-S ~~cabinet~~) are both full Q/CD backplanes (i.e. every slot is a Q/CD slot); the former is [[QBUS#Variable address size\|Q18]], and the latter Q22, although the former is easy to [[Upgrading QBUS backplanes\|modify to Q22]].		The DEC H9273-A backplane (used in the [[BA11-N mounting box]]) and H9276 backplane (used in the [[BA11-S mounting box]]) are both full Q/CD backplanes (i.e. every slot is a Q/CD slot); the former is [[QBUS#Variable address size\|Q18]], and the latter Q22, although the former is easy to [[Upgrading QBUS backplanes\|modify to Q22]].

	The DEC H9278-A backplane (used in the BA23-A ~~cabinet~~) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.		The DEC H9278-A backplane (used in the BA23-A mounting box) is a hybrid; the first three slots are Q/CD, and the rest are Q/Q.

	==Use by PMI==		==Use by PMI==

	The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B]] ~~processor card~~, and the [[MSV11-J]] ~~memory card~~.		The CD interconnect is used by [[Private Memory Interconnect]] cards, such as the [[KDJ11-B CPU]], and the [[MSV11-J QBUS memory]].

	The connection is somewhat idiosyncratic, because it is desirable to be able to plug in a variable number of memory cards - i.e. create a true 'bus' by connecting together more than two slots. If the CPU card sent out the PMI bus on the bottom (2, or solder-side) pins, then the memory card would have to take the PMI bus in on its top (1, component-side) pins, and repeat the bus through on its bottom pins, for use by a notional 'next memory card'. However, if the next card is ''not'' a PMI memory card, this will result in the PMI bus being sent to a card which does not use it - possibly with harmful effects.		The connection is somewhat idiosyncratic, because it is desirable to be able to plug in a variable number of memory cards - i.e. create a true 'bus' by connecting together more than two slots. If the CPU card sent out the PMI bus on the bottom (2, or solder-side) pins, then the memory card would have to take the PMI bus in on its top (1, component-side) pins, and repeat the bus through on its bottom pins, for use by a notional 'next memory card'. However, if the next card is ''not'' a PMI memory card, this will result in the PMI bus being sent to a card which does not use it - possibly with harmful effects.
Line 31:		Line 31:
	An exception to this rule is the backplane in the [[PDP-11/84]], in which the CD connectors of the QBUS section of the backplane are wired to form a true bus; in this machine, the PMI memory cards are placed ''below'' the processor card.		An exception to this rule is the backplane in the [[PDP-11/84]], in which the CD connectors of the QBUS section of the backplane are wired to form a true bus; in this machine, the PMI memory cards are placed ''below'' the processor card.

	~~{{PDP-11}}~~		[[Category: DEC Buses]]

	[[Category: ~~Bus Architectures~~]]

Jnc: Content moved

2017-12-17T01:10:12Z

Content moved

← Older revision		Revision as of 01:10, 17 December 2017
Line 1:		Line 1:
	The '''CD interconnect''' (sometimes given as '''C/D interconnection''', or some variant thereof) is the name given to the 'bus' which is present on the [[DEC ~~card form factor#Edge~~ connector contact identification\|C and D connectors]] of a [[QBUS#Backplanes\|Q/CD backplane]].		The '''CD interconnect''' (sometimes given as '''C/D interconnection''', or some variant thereof) is the name given to the 'bus' which is present on the [[DEC edge connector contact identification\|C and D connectors]] of a [[QBUS#Backplanes\|Q/CD backplane]].

	It is not actually a full bus (i.e. a given pin is not connected to 'all' instances of that pin, in every slot in the backplane); rather, slots are connected together in pairs, and these connections are used to connect together board pairs, without the need of a so-called 'over the back' connector cable.		It is not actually a full bus (i.e. a given pin is not connected to 'all' instances of that pin, in every slot in the backplane); rather, slots are connected together in pairs, and these connections are used to connect together board pairs, without the need of a so-called 'over the back' connector cable.

Jnc: /* Use by PMI */ blast, _another_ typo!

2016-06-13T18:19:44Z

Use by PMI: blast, _another_ typo!

← Older revision		Revision as of 18:19, 13 June 2016
Line 29:		Line 29:
	So, instead, PMI CPU cards emit the PMI bus on their '''''top''''' CD connector pins, and the memory cards take the bus in on their '''''bottom''''' pins, and repeat it through to their '''''top''''' pins. Thus, PMI memory cards must be placed in a Q/CD backplane '''''above''''' the CPU card.		So, instead, PMI CPU cards emit the PMI bus on their '''''top''''' CD connector pins, and the memory cards take the bus in on their '''''bottom''''' pins, and repeat it through to their '''''top''''' pins. Thus, PMI memory cards must be placed in a Q/CD backplane '''''above''''' the CPU card.

	An exception to this rule is the backplane in the [{PDP-11/84]], in which the CD connectors of the QBUS section of the backplane are wired to form a true bus; in this machine, the PMI memory cards are placed ''below'' the processor card.		An exception to this rule is the backplane in the [[PDP-11/84]], in which the CD connectors of the QBUS section of the backplane are wired to form a true bus; in this machine, the PMI memory cards are placed ''below'' the processor card.

	{{PDP-11}}		{{PDP-11}}

	[[Category: Bus Architectures]]		[[Category: Bus Architectures]]