Clearpoint Q-RAM 11 - Revision history

Jnc: Jnc moved page Q-RAM 11 to Clearpoint Q-RAM 11: naming sys

2020-12-14T00:52:10Z

Jnc moved page Q-RAM 11 to Clearpoint Q-RAM 11: naming sys

Jnc: +cat

2018-12-16T15:33:25Z

+cat

Jnc: link some things

2016-12-26T16:55:11Z

link some things

Jnc: What little is know about the card

2016-02-20T13:49:08Z

What little is know about the card

New page

The '''Clearpoint Q-RAM 11''' is a 512 Kbyte QBUS memory card in a quad QBUS card-size format, using 64Kx1 DRAMs.

Only configuration documentation is currently known for this card, and no schematics, but since this card has four banks (i.e. it has a 9x4 array of xx64 64Kx1 chips; i.e. to provide a 16 bit wide bank of 128 Kbytes, plus byte parity, there are four groups of 18 chips), it is sometimes possible to repair problems in one.

If one bank is picking or dropping bit(s), and the others are not, or if the banks have differing errors, that meant that data paths are probably all OK, and it is a simple matter of finding the bad memory chips.

By pulling memory chips (luckily, they were socketed on the board of this type which was examined, so this was pretty painless), it was possible to work out which bits are stored in which chips; the order is semi-random, so a complete table is needed.

There does not seem to be any component location identification system on the card, so one has been created for use here. Looking at the card from the component side, with the handle at the top, and the contact fingers at the bottom, there's an array of memory chips 12 columns wide, and 6 rows high; the columns are identified as A-L (from the left), and the rows as 0-5 (from the top).

'''Bank 0''' - Columns A, E, I:

{| class="wikitable"
! Bit !! Chip
|-
| 01 || I2
|-
| 02 || E5
|-
| 04 || I3
|-
| 010 || A5
|-
| 020 || A4
|-
| 040 || A2
|-
| 0100 || A0
|-
| 0200 || A1
|-
| 0400 || E3
|-
| 01000 || A3
|-
| 02000 || E0
|-
| 04000 || E4
|-
| 010000 || E1
|-
| 020000 || E2
|-
| 040000 || I1
|-
| 0100000 || I0
|}

'''Bank 1''' - Columns B, F, J:
<br>
'''Bank 2''' - Columns C, G, K:
<br>
'''Bank 3''' - Columns D, H, L:

The banks 2 and 3 column assignments are a guess, not verified as yet. The bit allocation seems to be the same in all banks; a few were tried in bank 1, and they matched the ones in bank 0 (suitably offset in column, of course).

← Older revision		Revision as of 15:33, 16 December 2018
Line 54:		Line 54:

	The banks 2 and 3 column assignments are a guess, not verified as yet. The bit allocation seems to be the same in all banks; a few were tried in bank 1, and they matched the ones in bank 0 (suitably offset in column, of course).		The banks 2 and 3 column assignments are a guess, not verified as yet. The bit allocation seems to be the same in all banks; a few were tried in bank 1, and they matched the ones in bank 0 (suitably offset in column, of course).
		+
		+	[[Category: QBUS Memories]]

← Older revision		Revision as of 16:55, 26 December 2016
Line 1:		Line 1:
−	The '''Clearpoint Q-RAM 11''' is a 512 Kbyte QBUS memory card in a quad QBUS card-size format, using 64Kx1 DRAMs.	+	The '''Clearpoint Q-RAM 11''' is a 512 Kbyte [[QBUS]] [[main memory\|memory]] card in a [[DEC card form factor\|quad]] QBUS card-size format, using 64Kx1 DRAMs.

	Only configuration documentation is currently known for this card, and no schematics, but since this card has four banks (i.e. it has a 9x4 array of xx64 64Kx1 chips; i.e. to provide a 16 bit wide bank of 128 Kbytes, plus byte parity, there are four groups of 18 chips), it is sometimes possible to repair problems in one.		Only configuration documentation is currently known for this card, and no schematics, but since this card has four banks (i.e. it has a 9x4 array of xx64 64Kx1 chips; i.e. to provide a 16 bit wide bank of 128 Kbytes, plus byte parity, there are four groups of 18 chips), it is sometimes possible to repair problems in one.

← Older revision	Revision as of 00:52, 14 December 2020
(No difference)