DF10 Data Channel - Revision history

Larsbrinkhoff: Unredirect ITS.

2023-09-06T05:32:38Z

Unredirect ITS.

2022-10-25T12:50:07Z

link to new pages

2022-09-23T19:45:37Z

‎External links: +DEC-10-XSRMA-A-D

2021-10-17T21:08:57Z

‎External links: +later MM

2021-10-14T14:20:47Z

+External links

2021-04-10T02:01:27Z

Ooops, channels don't connect directly to the I/O bus

2021-04-09T15:39:31Z

not a periperal, really

2019-07-05T03:19:44Z

‎Models: Link to Project MAC.

2019-06-28T06:27:15Z

Add list of models.

2019-06-28T04:36:36Z

Add RH10.

@@ Line 22: / Line 22: @@
 * MIT modified DF10
-Used on the [[Project MAC]] [[KA10]] DM and ML machines running [[ITS]].  The control word has the negated word count in bits 3-17, and the 21-bit memory address is split with bits 15-17 inverted in control bits 0-2, and bits 18-35 in the right half of the control word.
+Used on the [[Project MAC]] [[KA10]] DM and ML machines running [[Incompatible Timesharing System|ITS]].  The control word has the negated word count in bits 3-17, and the 21-bit memory address is split with bits 15-17 inverted in control bits 0-2, and bits 18-35 in the right half of the control word.
 {{semi-stub}}

← Older revision		Revision as of 12:50, 25 October 2022
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−	The '''DF10 Data Channel''' is a [[channel]] for the early [[PDP-10]] models ([[KA10]] and [[KI10]]) which had the PDP-10 ~~[[main memory]] [[bus~~]] as a standard bus. It can connect to [[multi-port memory]] banks either directly, or via an [[MX10 Memory Data Multiplexor]]. It is also connected indirectly (through the [[device controller]]s which attach to it) to the system's [[~~input~~/~~output~~\|I/O]] ~~bus~~, to allow the [[Central Processing Unit\|CPU]] to control it.	+	The '''DF10 Data Channel''' is a [[channel]] for the early [[PDP-10]] models ([[KA10]] and [[KI10]]) which had the [[PDP-10 Memory Bus]] as a standard bus. It can connect to [[multi-port memory]] banks either directly, or via an [[MX10 Memory Data Multiplexor]]. It is also connected indirectly (through the [[device controller]]s which attach to it) to the system's [[PDP-10 I/O Bus\|I/O bus]], to allow the [[Central Processing Unit\|CPU]] to control it.

	It has limited capabilities, compared to most channels from other manufacturers: it supports only the following types of [[channel command word]]s:		It has limited capabilities, compared to most channels from other manufacturers: it supports only the following types of [[channel command word]]s:

@@ Line 33: / Line 33: @@
 * [http://bitsavers.org/pdf/dec/pdp10/periph/A-MN-DF10-C_MAN1_DF10-C_Data_Channel_Maintenance_Manual_Oct74.pdf DF10-C Data Channel Maintenance Manual] (A-MN-DF10-C_MAN1)
 * [http://bitsavers.org/pdf/dec/pdp10/periph/DF10_Engineering_Drawings.pdf DF10 Engineering Drawings]
 [[Category: PDP-10s]]

@@ Line 30: / Line 30: @@
 * [http://bitsavers.org/pdf/dec/pdp10/periph/DEC-10-I8BA-D_DF10_Maint_Jun68.pdf DF10 Data Channel Maintenance Manual] (DEC-10-I8BA-D)
 * [http://bitsavers.org/pdf/dec/pdp10/periph/DEC-10-I8BB-D_DF10_Data_Channel_Maintenance_Manual_Feb70.pdf DF10 Data Channel Maintenance Manual] (DEC-10-I8BB-D)
 * [http://bitsavers.org/pdf/dec/pdp10/periph/A-MN-DF10-C_MAN1_DF10-C_Data_Channel_Maintenance_Manual_Oct74.pdf DF10-C Data Channel Maintenance Manual] (A-MN-DF10-C_MAN1)
 * [http://bitsavers.org/pdf/dec/pdp10/periph/DF10_Engineering_Drawings.pdf DF10 Engineering Drawings]
 [[Category: PDP-10s]]

@@ Line 10: / Line 10: @@
 It is used with device controllers such as the [[RP10 disk controller‎]], [[TM10 Magnetic Tape Control]], and [[RH10 MASSBUS controller]].
-== Models ==
+==Models==
 * DF10
@@ Line 25: / Line 25: @@
 {{semi-stub}}
 [[Category: PDP-10s]]

@@ Line 1: / Line 1: @@
-The '''DF10 Data Channel''' is a [[channel]] for the early [[PDP-10]] models ([[KA10]] and [[KI10]]) which had the PDP-10 [[main memory]] [[bus]] as a standard bus. It can connect to [[multi-port memory]] banks either directly, or via an [[MX10 Memory Data Multiplexor]]. It is also connected to the system's [[input/output|I/O]] bus, to allow the [[Central Processing Unit|CPU]] to control it.
+The '''DF10 Data Channel''' is a [[channel]] for the early [[PDP-10]] models ([[KA10]] and [[KI10]]) which had the PDP-10 [[main memory]] [[bus]] as a standard bus. It can connect to [[multi-port memory]] banks either directly, or via an [[MX10 Memory Data Multiplexor]]. It is also connected indirectly (through the [[device controller]]s which attach to it) to the system's [[input/output|I/O]] bus, to allow the [[Central Processing Unit|CPU]] to control it.
 It has limited capabilities, compared to most channels from other manufacturers: it supports only the following types of [[channel command word]]s:
@@ Line 8: / Line 8: @@
 * Transfer data to/from memory
-It is used with [[device controller]]s such as the [[RP10 disk controller‎]], [[TM10 Magnetic Tape Control]], and [[RH10 MASSBUS controller]].
+It is used with device controllers such as the [[RP10 disk controller‎]], [[TM10 Magnetic Tape Control]], and [[RH10 MASSBUS controller]].
 == Models ==

← Older revision		Revision as of 15:39, 9 April 2021
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	{{semi-stub}}		{{semi-stub}}

−	[[Category: ~~DEC Storage Controllers~~]]	+	[[Category: PDP-10s]]