DP11-A Synchronous Line Interface - Revision history

Jnc: New cat scheme

2023-02-18T02:17:07Z

New cat scheme

2022-11-18T19:27:26Z

2022-11-18T19:26:55Z

+ EngDrw, manual

2022-08-15T19:28:20Z

New cat

2020-06-08T19:39:06Z

proper cat

2020-02-02T21:39:46Z

‎Registers: sync regs

2020-02-02T20:47:08Z

‎Implementation: +board images

2020-02-01T15:28:50Z

+parity, image

2020-02-01T15:23:25Z

‎Registers: Add register bit descriptions

2020-02-01T03:32:34Z

‎Registers: Add RCSR, TCSR

← Older revision		Revision as of 02:17, 18 February 2023
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	* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/DEC-11-HDPAA-C-D%20DP11-A%20Synchronous%20Line%20Interface%20Manual.pdf DP11-A synchronous line interface manual] (DEC-11-HDPAA-C-D)		* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/DEC-11-HDPAA-C-D%20DP11-A%20Synchronous%20Line%20Interface%20Manual.pdf DP11-A synchronous line interface manual] (DEC-11-HDPAA-C-D)

−	[[Category: UNIBUS ~~Serial Interfaces]]~~	+	[[Category: UNIBUS Synchronous Serial Interfaces]]
−	~~[[Category: DEC~~ Synchronous Serial Interfaces]]

@@ Line 1: / Line 1: @@
-The ''' DP11-A''' is the earliest [[synchronous serial line]] [[peripheral|interface]] for the [[UNIBUS]]. It was double-[[buffer]]ed, and used [[programmed I/O]] (with separate receive and transmit [[interrupt]]s) to transfer data, in either [[half-duplex]] or [[full-duplex]], at [[baud rate]]s up to 50K bits/second; [[parity]] was supported for error detection.
+The '''DP11-A Synchronous Line Interface''' is the earliest [[synchronous serial line]] [[peripheral|interface]] for the [[UNIBUS]]. It was double-[[buffer]]ed, and used [[programmed I/O]] (with separate receive and transmit [[interrupt]]s) to transfer data, in either [[half-duplex]] or [[full-duplex]], at [[baud rate]]s up to 50K bits/second; [[parity]] was supported for error detection.
 It was intended to interface to Bell 201, 301 and 303 series [[modem]]s. The [[character]] length (6, 7 or 8 [[bit]]s), and the [[sync character]], were selectable under program control, as were idling (sending the sync character), as well as the modem control leads; the DP11-A could also be set to discard incoming sync characters.
@@ Line 104: / Line 104: @@
 Power comes in on a single-width stub card in the A3 slot (as is canonical in the [[PDP-11/20]] generation of [[PDP-11]]s).
 [[Category: UNIBUS Serial Interfaces]]
 [[Category: DEC Synchronous Serial Interfaces]]

← Older revision		Revision as of 19:28, 15 August 2022
Line 105:		Line 105:
	Power comes in on a single-width stub card in the A3 slot (as is canonical in the [[PDP-11/20]] generation of [[PDP-11]]s).		Power comes in on a single-width stub card in the A3 slot (as is canonical in the [[PDP-11/20]] generation of [[PDP-11]]s).

−	[[Category:UNIBUS Serial Interfaces]]	+	[[Category: UNIBUS Serial Interfaces]]
		+	[[Category: DEC Synchronous Serial Interfaces]]

← Older revision		Revision as of 19:39, 8 June 2020
Line 105:		Line 105:
	Power comes in on a single-width stub card in the A3 slot (as is canonical in the [[PDP-11/20]] generation of [[PDP-11]]s).		Power comes in on a single-width stub card in the A3 slot (as is canonical in the [[PDP-11/20]] generation of [[PDP-11]]s).

−	[[Category:UNIBUS ~~Peripherals~~]]	+	[[Category:UNIBUS Serial Interfaces]]

@@ Line 25: / Line 25: @@
 |}
-The two SYNC registers seem to overlay the buffer registers; this is not yet sorted out.
+The two SYNC registers overlay the buffer registers; access to them is gained via byte UNIBUS operations to odd addresses.
 The [[address]]es shown are for the first DP11-A in a system; additional ones are normally set to be at 774760, 774750, etc to 774400.

← Older revision	Revision as of 19:27, 18 November 2022
(No difference)

@@ Line 67: / Line 67: @@
 ==Implementation==
-[[Image:M594.jpg|250px|thumb|right|M594 TTL to EIA Level Converter]]
+[[Image:DP11Boards.jpg|250px|thumb|right|M7065 and M7075 boards]]
 The modules are:
@@ Line 82: / Line 82: @@
 The M7223 is a [[DEC card form factor|quad]] card; the others are all single. (Of those, the M105, M7820, M7065 and M7075 are [[DEC card form factor|extended length]]; the M239 and M405 are standard length.)
 The M594 can be substituted with other adapter cards from the [[DF11 Communications Line Adapter|DF11]] series; in particular, the M595 is used with the Bell 303 series modem.

@@ Line 34: / Line 34: @@
 | colspan=3 | Unused || CPAR || RACT || colspan=3 | BPCH || RDN || RDIE || colspan=2 |  Unused || MRCV || MAINT || HLFD || STRS
 {{16bitoctal-bitout}}
 ===774774: Transmitter Control and Status Register (DPXCSR)===
@@ Line 40: / Line 50: @@
 | CARRF || RXOF || RING || MRDY || CARR || CTS || RTS || Unused || XDN || XDIE || XSIE || Unused || MXMT || Unused || IDLS || TRDY
 {{16bitoctal-bitout}}
 ==Implementation==

@@ Line 20: / Line 20: @@
 |Additional Sync Register                  || DPASYNC || 774777
 |-
-|Transmitter Control and Status Register   || DPRCSR || 774774
+|Transmitter Control and Status Register   || DPXCSR || 774774
 |-
-|Transmitter Buffer Register               || DPRBUF || 774776
+|Transmitter Buffer Register               || DPXBUF || 774776
 |}
@@ Line 28: / Line 28: @@
 The [[address]]es shown are for the first DP11-A in a system; additional ones are normally set to be at 774760, 774750, etc to 774400.
 ==Implementation==