DV11 Communications Multiplexer - Revision history

Jnc: New cat scheme

2023-02-18T02:24:11Z

New cat scheme

Jnc: New cat

2022-08-15T19:31:28Z

New cat

Jnc: /* Implementation */ Std DEC d/p name fmt

2021-09-09T21:17:09Z

‎Implementation: Std DEC d/p name fmt

Jnc: uproc details

2021-09-09T20:50:46Z

uproc details

Jnc: Uses DM11-BB for modem control

2021-09-09T16:04:47Z

Uses DM11-BB for modem control

Jnc: Fairly complete

2021-09-09T15:55:18Z

Fairly complete

New page

The '''DV11 Communications Multiplexer''' (also called the '''DV11 Synchrous Preprocessor''') was a [[UNIBUS]] multi-line [[synchronous serial line]] [[peripheral|interface]]. It supported up to 16 lines, and had a maximum aggregate throughput of 34K [[character]]s/second. It used a [[microprocessor]] to drive the lines, using [[Direct Memory Access|DMA]] to the [[PDP-11]]'s [[main memory]] for both input and output.

==Registers==

{| border=1
! Register !! Abbreviation !! Address
|-
|System Control Register || DVSCR || 775000
|-
|Receiver Interrupt Character Register || DVRICR || 775002
|-
|Line Control Register || DVLCR || 775004
|-
|Secondary Register Selection Register || DVSRSR || 775006
|-
|Secondary Register Access Register || DVSRAR || 775010
|-
|Special Functions Register || DVSFR || 775012
|-
|NPR Status Register || DVNSR || 775014
|-
|[[Modem]] Control Status Register || DVMCSR || 775020
|-
|Modem Line Status Register || DVMLSR || 775022
|}

The [[address]]es shown are for the first DV11 in a system; additional units are normally set to be immediately following (0775040, 0775100, 0775140, etc).

The DV11 has a set of 16 'secondary' registers for each line, access to which is gained by placing the secondary register number and line number in the appropriate bits in the DVSRSR, and then reading/writing the DVSRAR. The secondary registers are:

{| border=1
! Register !! Function
|-
|0 || Transmitter Principal Current Address
|-
|1 || Transmitter Principal Byte Count
|-
|2 || Transmitter Alternate Current Address
|-
|3 || Transmitter Alternate Byte Count
|-
|4 || Receiver Current Address
|-
|5 || Receiver Byte Count
|-
|6 || Transmitter Accumulated Block Check
|-
|7 || Receiver Accumulated Block Check
|-
|10 || Transmitter Control Table Base Address
|-
|11 || Receiver Control Table Base Address
|-
|12 || Line Protocol Parameters
|-
|13 || Line State
|-
|14 || Transmitter Mode Bits
|-
|15 || Receiver Mode Bits
|-
|16 || Line Progress
|-
|17 || Receiver Control Byte Storage
|}

===775000: System Control Register (DVSCR)===

{{16bit-header}}
| NSI || Unused || NSIE || SIE || MCLR || NSOI || MAINT || RIRC || RI || RIE || colspan=2 | MEXT || colspan=3 | MU || MGO
{{16bitoctal-bitout}}

* NSI - NPR Status Interrupt
* NSIE - NPR Status Interrupt Enable
* SIE - Storage Interrupt Enable
* MCLR - Master Clear
* NSOI - NPR Status Overflow Interrupt
* MAINT - Maintenance Enable
* RIRC - Receiver Interrupt Response Completed
* RI - Receiver Interrupt
* RIE - Receiver Interrupt Enable
* MEXT - Memory Extension
* MU - Maintenance Use
* MGO - Microprocessor Go

===775006: Secondary Register Selection Register (DVSRSR)===

{{16bit-header}}
| colspan=4 | Unused || colspan=4 | RSEL || colspan=4 | Unused || colspan=4 | LSEL
{{16bitoctal-bitout}}

* RSEL - Register Selection
* LSEL - Line Selection

==Implementation==

It was constructed from a custom 9-slot [[backplane]] double [[system unit]] ([[DEC part number]] 54-11420), into which were plugged a number of [[DEC card form factor|hex]] and quad [[printed circuit board|boards]], along with up to two DV11-BA [[distribution panel]]s (H317C). Four BC08R [[flat cable]]s connect the main unit to each distribution panel (two for data and [[clock]], two for modem control.).

The boards in the main unit are:

* M7807 - Mux and Bus Control
* M7808 - Mux and Modem Scan Control
* M7836 - [[arithmetic logic unit|ALU]] and Transfer Bus
* M7837 - UNIBUS Data and NPR Control
* M7838 - ROM, RAM and Branch
* M7839 - Sync Mux Line Card, 4 lines (up to four cards)

The M7836-M7839 are hex cards; the M7807 and M7808 are quad. (The M7807 and M7808 are shared with the [[DH11 asynchronous serial line interface|DH11]].)

Board locations (as seen from the board insertion side of the backplanes, not the [[wire-wrap]] pin side, as is common in [[DEC]] documentation) are (main backplane):

{| class="wikitable"
! !! colspan="6" | Connector
|-
! Slot !! A !! B !! C !! D !! E !! F
|-
| 1 || colspan="2" style="text-align:center;" | UNIBUS In || colspan="4" style="text-align:center;" | M7807
|-
| 2 || colspan="6" style="text-align:center;" | M7836
|-
| 3 || colspan="6" style="text-align:center;" | M7837
|-
| 4 || colspan="6" style="text-align:center;" | M7838
|-
| 5 || colspan="6" style="text-align:center;" | M7839
|-
| 6 || colspan="6" style="text-align:center;" | M7839
|-
| 7 || colspan="6" style="text-align:center;" | M7839
|-
| 8 || colspan="6" style="text-align:center;" | M7839
|-
| 9 || colspan="2" style="text-align:center;" | UNIBUS Out || colspan="4" style="text-align:center;" | M7808
|}

==See also==

* [[DP11-A synchronous serial line interface]]
* [[DU11 synchronous serial line interface]]
* [[DUP11 synchronous serial line interface]]
* [[DQ11 NPR Synchronous Line Interface]]

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DV11_Option_Bulletin_Jul75.pdf DV11 Synchronous Preprocessor Option Bulletin]
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-DV11-OP-001%20DV11%20Communications%20Multiplexer%20User's%20Manual.pdf DV11 communications multiplexer user's manual]
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-DV11-MM-002%20DV11%20Communications%20Multiplexer%20Maintenance%20Manual.pdf DV11 communications multiplexer maintenance manual]
* [http://www.bitsavers.org/pdf/dec/unibus/DV11_Engineering_Drawings_May75.pdf DV11 Engineering Drawings]

[[Category: UNIBUS Serial Interfaces]]

← Older revision		Revision as of 02:24, 18 February 2023
Line 154:		Line 154:
	* [http://www.bitsavers.org/pdf/dec/unibus/DV11_Engineering_Drawings_May75.pdf DV11 Engineering Drawings]		* [http://www.bitsavers.org/pdf/dec/unibus/DV11_Engineering_Drawings_May75.pdf DV11 Engineering Drawings]

−	[[Category: UNIBUS ~~Serial Interfaces]]~~	+	[[Category: UNIBUS Synchronous Serial Interfaces]]
−	~~[[Category: DEC~~ Synchronous Serial Interfaces]]

← Older revision		Revision as of 19:31, 15 August 2022
Line 155:		Line 155:

	[[Category: UNIBUS Serial Interfaces]]		[[Category: UNIBUS Serial Interfaces]]
		+	[[Category: DEC Synchronous Serial Interfaces]]

@@ Line 97: / Line 97: @@
 ==Implementation==
-It was constructed from a custom 9-slot backplane double [[system unit]] ([[DEC part number]] 54-11420), into which were plugged a number of [[DEC card form factor|hex]] and quad [[printed circuit board|boards]], along with up to two DV11-BA [[distribution panel]]s (H317C). Four BC08R [[flat cable]]s connect the main unit to each  distribution panel (two for data and [[clock]], two for modem control.).
+It was constructed from a custom 9-slot backplane double [[system unit]] ([[DEC part number]] 54-11420), into which were plugged a number of [[DEC card form factor|hex]] and quad [[printed circuit board|boards]], along with up to two DV11-BA [[distribution panel]]s (H317-C). Four BC08R [[flat cable]]s connect the main unit to each  distribution panel (two for data and [[clock]], two for modem control.).
 Processing is performed by a 'microprocessor', but this not the kind of device now understood by that term; rather, it is a small custom processor controlled by [[microcode]]. It has 8 different 16-[[bit]] [[instruction]]s (BRANCH A, BRANCH B, ALU OP, RAM OP, DATA XFR, NPR OP, SET/CLR OP, BCC OP), and an [[arithmetic logic unit|ALU]] built out of [[74 series]] 74181 ALU [[integrated circuit|chips]].

@@ Line 1: / Line 1: @@
-The '''DV11 Communications Multiplexer''' (also called the '''DV11 Synchrous Preprocessor''') was a [[UNIBUS]] multi-line [[synchronous serial line]] [[peripheral|interface]]. It supported up to 16 lines, and had a maximum aggregate throughput of 34K [[character]]s/second. It used a [[microprocessor]] to drive the lines, using [[Direct Memory Access|DMA]] to the [[PDP-11]]'s [[main memory]] for both input and output.
+The '''DV11 Communications Multiplexer''' (also called the '''DV11 Synchrous Preprocessor''') was a [[UNIBUS]] multi-line [[synchronous serial line]] [[peripheral|interface]]. It supported up to 16 lines, and had a maximum aggregate throughput of 34K [[character]]s/second. It used a 'microprocessor' to drive the lines, using [[Direct Memory Access|DMA]] to the [[PDP-11]]'s [[main memory]] for both input and output.
 For [[modem]] control, a single later style [[DM11-BB Modem Control Option‎]] per DV11, mounted in the main DV11 [[backplane]], along with the rest of the DV11 cards, was used. (The DM11-BB is logically a separate device, albeit one housed in the DH11.)
@@ Line 98: / Line 98: @@
 It was constructed from a custom 9-slot backplane double [[system unit]] ([[DEC part number]] 54-11420), into which were plugged a number of [[DEC card form factor|hex]] and quad [[printed circuit board|boards]], along with up to two DV11-BA [[distribution panel]]s (H317C). Four BC08R [[flat cable]]s connect the main unit to each  distribution panel (two for data and [[clock]], two for modem control.).
 The boards in the main unit are:
@@ Line 103: / Line 107: @@
 * M7807 - Mux and Bus Control
 * M7808 - Mux and Modem Scan Control
-* M7836 - [[arithmetic logic unit|ALU]] and Transfer Bus
+* M7836 - ALU and Transfer Bus
 * M7837 - UNIBUS Data and NPR Control
 * M7838 - ROM, RAM and Branch

@@ Line 1: / Line 1: @@
 The '''DV11 Communications Multiplexer''' (also called the '''DV11 Synchrous Preprocessor''') was a [[UNIBUS]] multi-line [[synchronous serial line]] [[peripheral|interface]]. It supported up to 16 lines, and had a maximum aggregate throughput of 34K [[character]]s/second. It used a [[microprocessor]] to drive the lines, using [[Direct Memory Access|DMA]] to the [[PDP-11]]'s [[main memory]] for both input and output.
 ==Registers==
@@ Line 20: / Line 22: @@
 |NPR Status Register                     || DVNSR || 775014
 |-
-|[[Modem]] Control Status Register           || DVMCSR || 775020
+|Modem Control Status Register           || DVMCSR || 775020
 |-
 |Modem Line Status Register              || DVMLSR || 775022
@@ Line 95: / Line 97: @@
 ==Implementation==
-It was constructed from a custom 9-slot [[backplane]] double [[system unit]] ([[DEC part number]] 54-11420), into which were plugged a number of [[DEC card form factor|hex]] and quad [[printed circuit board|boards]], along with up to two DV11-BA [[distribution panel]]s (H317C). Four BC08R [[flat cable]]s connect the main unit to each  distribution panel (two for data and [[clock]], two for modem control.).
+It was constructed from a custom 9-slot backplane double [[system unit]] ([[DEC part number]] 54-11420), into which were plugged a number of [[DEC card form factor|hex]] and quad [[printed circuit board|boards]], along with up to two DV11-BA [[distribution panel]]s (H317C). Four BC08R [[flat cable]]s connect the main unit to each  distribution panel (two for data and [[clock]], two for modem control.).
 The boards in the main unit are:
@@ Line 108: / Line 110: @@
 The M7836-M7839 are hex cards; the M7807 and M7808 are quad. (The M7807 and M7808 are shared with the [[DH11 asynchronous serial line interface|DH11]].)
-Board locations (as seen from the board insertion side of the backplanes, not the [[wire-wrap]] pin side, as is common in [[DEC]] documentation) are (main backplane):
+Board locations (as seen from the board insertion side of the backplanes, not the [[wire-wrap]] pin side, as is common in DEC documentation) are:
 {| class="wikitable"