FP11-C Floating-Point Processor - Revision history

Jnc: Better cat

2022-10-13T00:18:37Z

Better cat

Jnc: /* External links */ +manuals, FMPS

2022-03-06T17:16:11Z

‎External links: +manuals, FMPS

Jnc: +links

2020-02-04T15:10:33Z

+links

Jnc: +cat

2018-12-16T03:58:37Z

+cat

Jnc: Better links

2018-06-29T16:37:43Z

Better links

Jnc: +links

2018-06-28T18:04:25Z

+links

Jnc: rm bad cat

2018-02-12T13:43:15Z

rm bad cat

Jnc: update to use fp11 article

2016-09-18T13:04:26Z

update to use fp11 article

Jnc: +cats

2016-04-25T02:21:55Z

+cats

Jnc: Add more info

2016-04-25T02:05:43Z

Add more info

← Older revision		Revision as of 00:18, 13 October 2022
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	* [http://www.bitsavers.org/pdf/dec/pdp11/1145/FP11-C_Field_Maintenance_Print_Set_MP00038_NoRev_Dec75.pdf FP11-C Field Maintenance Print Set] (MP00038)		* [http://www.bitsavers.org/pdf/dec/pdp11/1145/FP11-C_Field_Maintenance_Print_Set_MP00038_NoRev_Dec75.pdf FP11-C Field Maintenance Print Set] (MP00038)

−	[[Category: PDP-11 Processors]]	+	[[Category: PDP-11 UNIBUS Processors]]

@@ Line 12: / Line 12: @@
 * M8127 Fraction Data Path - Low Order
-{{PDP-11}}
+==Further reading==
 [[Category: PDP-11 Processors]]

@@ Line 1: / Line 1: @@
-The '''FP11-C''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later [[KB11-D CPU|KB11-D]] and [[KB11-C CPU|KB11-C]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was program-compatible with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.
+The '''FP11-C''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later [[KB11-D CPU|KB11-D]] and [[KB11-C CPU|KB11-C]] [[Central Processing Unit|CPU]] variants thereof, respectively); it was [[program compatible]] with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.
-Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.
+Like the FP11-B, it operated in parallel with the main processor, so that two [[instruction]]s (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal [[clock]] which is synchronized to the basic CPU's clock.
 ==Implementation==

← Older revision		Revision as of 03:58, 16 December 2018
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	{{PDP-11}}		{{PDP-11}}
		+
		+	[[Category: PDP-11 Processors]]

← Older revision		Revision as of 16:37, 29 June 2018
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−	The '''FP11-C''' was a [[Floating point processor\|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later [[KB11-D CPU\|KB11-D]] and [[KB11-C CPU]] variants thereof, respectively); it was program-compatible with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.	+	The '''FP11-C''' was a [[Floating point processor\|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later [[KB11-D CPU\|KB11-D]] and [[KB11-C CPU\|KB11-C]] [[Central Processing Unit\|CPU]] variants thereof, respectively); it was program-compatible with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.

	Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.		Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.

← Older revision		Revision as of 18:04, 28 June 2018
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−	The '''FP11-C''' was a [[Floating point processor\|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later KB11-D and KB11-C CPU variants thereof, respectively); it was program-compatible with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.	+	The '''FP11-C''' was a [[Floating point processor\|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later [[KB11-D CPU\|KB11-D]] and [[KB11-C CPU]] variants thereof, respectively); it was program-compatible with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.

	Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.		Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.

← Older revision		Revision as of 13:43, 12 February 2018
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	{{PDP-11}}		{{PDP-11}}
−
−	~~[[Category:UNIBUS processors]]~~

@@ Line 1: / Line 1: @@
-The '''FP11-C''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (KB11-D and KB11-C CPU variants thereof, respectively); it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time.
+The '''FP11-C''' was a [[Floating point processor|FPP]] used in the [[PDP-11/45]] and [[PDP-11/70]] computers (the later KB11-D and KB11-C CPU variants thereof, respectively); it was program-compatible with the [[FP11-B Floating-Point Processor]], which was the progenitor of the semi-standard [[FP11 floating point]] used in many later [[PDP-11]]s.
-Like the [[FP11-B]], it supported short (32 bit) and long (64 bit) floating point numbers; both forms used an 8 bit exponent (in 'excess 0200' notation, giving an exponent range of +127. to -128.), a sign bit, and the remaining bits were the fractional part. A state bit controlled whether the FP11-C operated in short or long mode.
+Like the FP11-B, it operated in parallel with the main processor, so that two instructions (one floating point, one regular) could be processed at the same time; unlike the FP11-B, it used an internal clock which is synchronized to the basic CPU's clock.
 ==Implementation==
-The FP11-C used a clock which is synchronized to the basic CPU's clock. It plugged into special pre-wired slots in the CPU's [[backplane]], and included the following boards:
+It plugged into special pre-wired slots in the CPU's [[backplane]], and included the following boards:
 * M8128 ROM and ROM Control
@@ Line 16: / Line 14: @@
 {{PDP-11}}
 [[Category:UNIBUS processors]]

← Older revision		Revision as of 02:21, 25 April 2016
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	* M8126 Fraction Data Path - High Order		* M8126 Fraction Data Path - High Order
	* M8127 Fraction Data Path - Low Order		* M8127 Fraction Data Path - Low Order
		+
		+	{{PDP-11}}
		+
		+	[[Category:DEC processors]]
		+	[[Category:UNIBUS processors]]