FP11 floating point - Revision history

Jnc: /* See also */ +FIS floating point

2023-06-13T18:42:44Z

‎See also: +FIS floating point

Jnc: /* Implementations */ no hyphen, per DEC docs

2019-03-01T21:02:19Z

‎Implementations: no hyphen, per DEC docs

Jnc: /* Implementations */ proper target

2018-11-17T17:08:39Z

‎Implementations: proper target

Jnc: +cat

2018-02-17T16:08:03Z

+cat

Jnc: link FP

2017-06-30T23:55:51Z

link FP

Jnc: Add FIS

2016-12-25T16:01:07Z

Add FIS

Jnc: /* Implementations */ Add FPF11

2016-12-25T15:18:07Z

‎Implementations: Add FPF11

Jnc: Describe capabilties

2016-09-18T12:54:05Z

Describe capabilties

Jnc: a start, somewhat stubby

2016-09-18T03:17:17Z

a start, somewhat stubby

New page

'''FP11 floating point''' is the term used for the floating point data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability.)

It supported short (32 bit) and long (64 bit) floating point numbers; both forms used an 8 bit exponent (in 'excess 0200' notation, giving an exponent range of +127. to -128.), a sign bit, and the remaining bits were the fractional part.

The initial implementation was the [[FP11-B Floating-Point Processor]] for the [[KB11-A CPU]] for the [[PDP-11/45]]; it was later used in the [[KB11-B CPU]] of the [[PDP-11/70]]. Later implementations included:

* [[FP11-C Floating-Point Processor|FP11-C]], used in the [[KB11-D CPU]] and [[KB11-C CPU]] of the later-production PDP-11/45 and PDP-11/70, respectively
* [[FP11-A Floating-Point Processor|FP11-A]], used in the [[KD11-EA CPU]] of the [[PDP-11/34]]
* [[FP11-E Floating-Point Processor|FP11-E]], used in the [[KD11-K CPU]] of the [[PDP-11/60]]
* [[FP11-F Floating-Point Processor|FP11-F]], used in the [[KD11-Z CPU]] of the [[PDP-11/44]]
* [[KEF11-A floating point chip|KEF11-A]], used in the [[KDF11 CPUs]]
* [[FPJ11 floating point accelerator|FPJ11]], used in the [[KDJ11 CPUs]]

{{stub}}

{{PDP-11}}

@@ Line 20: / Line 20: @@
 * [[FPF11 floating point processor|FPF11]] board (M8188), a higher performance alternative for the [[KDF11 CPUs]]
 * [[FPJ11 floating point accelerator|FPJ11]], used in the [[KDJ11 CPUs]]
 {{PDP-11}}
 [[Category: PDP-11s]]

← Older revision		Revision as of 16:08, 17 February 2018
Line 22:		Line 22:

	{{PDP-11}}		{{PDP-11}}
		+
		+	[[Category: PDP-11s]]

← Older revision		Revision as of 23:55, 30 June 2017
Line 1:		Line 1:
−	'''FP11 floating point''' is the term used for the floating point data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability, the [[FIS floating point]].) It was tightly integrated with the CPU, so that the CPU processed a mix of 'regular' and floating point instructions.	+	'''FP11 floating point''' is the term used for the [[floating point]] data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability, the [[FIS floating point]].) It was tightly integrated with the CPU, so that the CPU processed a mix of 'regular' and floating point instructions.

	==Architecture==		==Architecture==

← Older revision		Revision as of 16:01, 25 December 2016
Line 1:		Line 1:
−	'''FP11 floating point''' is the term used for the floating point data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability.) It was tightly integrated with the CPU, so that the CPU processed a mix of 'regular' and floating point instructions.	+	'''FP11 floating point''' is the term used for the floating point data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability, the [[FIS floating point]].) It was tightly integrated with the CPU, so that the CPU processed a mix of 'regular' and floating point instructions.

	==Architecture==		==Architecture==

@@ Line 15: / Line 15: @@
 * [[FP11-C Floating-Point Processor|FP11-C]], used in the [[KB11-D CPU]] and [[KB11-C CPU]] of the later-production PDP-11/45 and PDP-11/70, respectively
 * [[FP11-A Floating-Point Processor|FP11-A]], used in the [[KD11-EA CPU]] of the [[PDP-11/34]]
-* [[FP11-E Floating-Point Processor|FP11-E]], used in the [[KD11-K CPU]] of the [[PDP-11/60]]
+* [[FP11-E Floating Point Processor|FP11-E]], used in the [[KD11-K CPU]] of the [[PDP-11/60]]
 * [[FP11-F Floating-Point Processor|FP11-F]], used in the [[KD11-Z CPU]] of the [[PDP-11/44]]
 * [[KEF11-A floating point chip|KEF11-A]], used in the [[KDF11 CPUs]]

@@ Line 1: / Line 1: @@
-'''FP11 floating point''' is the term used for the floating point data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability.)
+'''FP11 floating point''' is the term used for the floating point data types and instructions supported by most [[PDP-11]]s which had hardware support for floating point. (Some supported a simpler, less capable floating point capability.) It was tightly integrated with the CPU, so that the CPU processed a mix of 'regular' and floating point instructions.
-It supported short (32 bit) and long (64 bit) floating point numbers; both forms used an 8 bit exponent (in 'excess 0200' notation, giving an exponent range of +127. to -128.), a sign bit, and the remaining bits were the fractional part.
+==Architecture==
 The initial implementation was the [[FP11-B Floating-Point Processor]] for the [[KB11-A CPU]] for the [[PDP-11/45]]; it was later used in the [[KB11-B CPU]] of the [[PDP-11/70]]. Later implementations included:
@@ Line 11: / Line 19: @@
 * [[KEF11-A floating point chip|KEF11-A]], used in the [[KDF11 CPUs]]
 * [[FPJ11 floating point accelerator|FPJ11]], used in the [[KDJ11 CPUs]]
 {{PDP-11}}