First-In First-Out buffer - Revision history

Jnc: fmt, add links

2019-04-10T15:38:23Z

fmt, add links

ForOldHack: /* added link for UARTs */

2019-04-01T08:26:46Z

‎added link for UARTs

Jnc: +cat

2018-12-13T02:40:58Z

+cat

Jnc: +links

2018-10-01T11:40:25Z

+links

Jnc: Jnc moved page FIFO to First-In First-Out buffer: Use full name for actual article

2017-05-07T15:55:01Z

Jnc moved page FIFO to First-In First-Out buffer: Use full name for actual article

Jnc: Typo

2017-05-07T15:54:24Z

Typo

Jnc: Not a bad start

2017-05-07T15:54:02Z

Not a bad start

New page

A '''First-In First-Out buffer''' (usually given as '''FIFO''') is a form of buffer in which data is inserted at one end, and removed from the other, so that the data is retrieved in the same order as it went in - hence the name.

FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

{{stub]]

@@ Line 3: / Line 3: @@
 FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.
-FIFO buffers are used in serial communications, where a UART needs to receive more data without interrupting the CPU.
+FIFO buffers are also used in [[serial line|serial communications]], where a [[UART]] needs to receive more data without [[interrupt]]ing the CPU.
-https://www.tldp.org/HOWTO/Serial-HOWTO-18.html#ss18.3 [[User:ForOldHack|ForOldHack]] ([[User talk:ForOldHack|talk]]) 10:26, 1 April 2019 (CEST)
+==External links==
 {{semi-stub}}
 [[Category:Hardware Basics]]

@@ Line 2: / Line 2: @@
 FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.
 {{semi-stub}}
 [[Category:Hardware Basics]]

← Older revision		Revision as of 02:40, 13 December 2018
Line 4:		Line 4:

	{{semi-stub}}		{{semi-stub}}
		+
		+	[[Category:Hardware Basics]]

@@ Line 1: / Line 1: @@
-A '''First-In First-Out buffer''' (usually given as '''FIFO''') is a form of buffer in which data is inserted at one end, and removed from the other, so that the data is retrieved in the same order as it went in - hence the name.
+A '''First-In First-Out buffer''' (usually given as '''FIFO''') is a form of [[buffer]] in which data is inserted at one end, and removed from the other, so that the data is retrieved in the same order as it went in - hence the name.
-FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.
+FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.
-{{stub}}
+{{semi-stub}}

← Older revision		Revision as of 15:54, 7 May 2017
Line 3:		Line 3:
	FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.		FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

−	{{stub]]	+	{{stub}}

← Older revision	Revision as of 15:55, 7 May 2017
(No difference)