First-In First-Out buffer - Revision history

Jnc: fmt, add links

2019-04-10T15:38:23Z

fmt, add links

← Older revision		Revision as of 15:38, 10 April 2019
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	FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.		FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

	FIFO buffers are used in serial communications, where a UART needs to receive more data without ~~interrupting~~ the CPU.		FIFO buffers are also used in [[serial line\|serial communications]], where a [[UART]] needs to receive more data without [[interrupt]]ing the CPU.

	https://www.tldp.org/HOWTO/Serial-HOWTO-18.html#ss18.3 ~~[[User~~:~~ForOldHack\|ForOldHack~~]~~] ([[User talk:ForOldHack\|talk]]) 10:26, 1 April 2019 (CEST)~~		==External links==

			* [https://www.tldp.org/HOWTO/Serial-HOWTO-18.html#ss18.3 Serial HOWTO: What Are UARTs? How Do They Affect Performance? - FIFOs]

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	[[Category:Hardware Basics]]		[[Category:Hardware Basics]]

ForOldHack: /* added link for UARTs */

2019-04-01T08:26:46Z

added link for UARTs

← Older revision		Revision as of 08:26, 1 April 2019
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	FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.		FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

			FIFO buffers are used in serial communications, where a UART needs to receive more data without interrupting the CPU.

			https://www.tldp.org/HOWTO/Serial-HOWTO-18.html#ss18.3 [[User:ForOldHack\|ForOldHack]] ([[User talk:ForOldHack\|talk]]) 10:26, 1 April 2019 (CEST)

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	[[Category:Hardware Basics]]		[[Category:Hardware Basics]]

Jnc: +cat

2018-12-13T02:40:58Z

+cat

← Older revision		Revision as of 02:40, 13 December 2018
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			[[Category:Hardware Basics]]

Jnc: +links

2018-10-01T11:40:25Z

+links

← Older revision		Revision as of 11:40, 1 October 2018
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	A '''First-In First-Out buffer''' (usually given as '''FIFO''') is a form of buffer in which data is inserted at one end, and removed from the other, so that the data is retrieved in the same order as it went in - hence the name.		A '''First-In First-Out buffer''' (usually given as '''FIFO''') is a form of [[buffer]] in which data is inserted at one end, and removed from the other, so that the data is retrieved in the same order as it went in - hence the name.

	FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.		FIFO buffers are found in both [[hardware]] and [[software]]; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

	{{stub}}		{{semi-stub}}

Jnc: Jnc moved page FIFO to First-In First-Out buffer: Use full name for actual article

2017-05-07T15:55:01Z

Jnc moved page FIFO to First-In First-Out buffer: Use full name for actual article

← Older revision		Revision as of 15:55, 7 May 2017
(No difference)

Jnc: Typo

2017-05-07T15:54:24Z

Typo

← Older revision		Revision as of 15:54, 7 May 2017
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	FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.		FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

	{{stub]]		{{stub}}

Jnc: Not a bad start

2017-05-07T15:54:02Z

Not a bad start

New page

A '''First-In First-Out buffer''' (usually given as '''FIFO''') is a form of buffer in which data is inserted at one end, and removed from the other, so that the data is retrieved in the same order as it went in - hence the name.

FIFO buffers are found in both hardware and software; in the latter, they are usually implemented as [[ring buffer]]s, to avoid the un-productive overhead of shifting data around as data is added and removed.

{{stub]]