GE-645 - Revision history

Jnc: /* External links */ restore Bitsavers link

2024-01-12T16:00:01Z

‎External links: restore Bitsavers link

Jnc: +impl details

2023-01-06T21:58:19Z

+impl details

Jnc: Jnc moved page GE 645 to GE-645: docs seem to include the hyphen

2023-01-04T17:28:13Z

Jnc moved page GE 645 to GE-645: docs seem to include the hyphen

Jnc: An OK start, for now

2023-01-04T17:26:52Z

An OK start, for now

New page

The '''GE-645''' was a [[transistor]] [[mainframe]] computer, created for use by the [[Multics]] project. It had hardware support for a [[single-level store]], around which Multics was organized, as well as [[paging]]; although the two are logically separate, the two were both implemented by the same hardware (the 'Appending Unit', the main addition to the [[GE-635]], of which it was an enhanced descendant). The Multics group selected the GE-645, proposed to it by [[General Electric]], after [[International Business Machines|IBM]] refused to add necessary features, such as [[virtual memory]], to the [[IBM System/360|System 360]].

[[Address]]es in the GE-645 were notionally 36 bits wide (it was a 36-bit machine, as was common for scientific computers in that period): an 18-bit [[segment]] number, and an 18-bit offset within the segment. Due to its legacy as a modified GE-635, instructions, and many of the internal [[register]]s in the CPU, did not directly handle full 36-bit addresses, though.

The CPU included a single-width [[accumulator]]; a single-width 'multiplier quotient'; eight half-with [[index register]]s; a half-width Instruction Counter (the [[Program Counter]]); a half-width Procedure Base Register (these last two together formed a full segment-addressed PC); a Descriptor Base Register (below); and eight Address Base Registers (likewise).

The Descriptor Base Register (DBR) [[pointer|points]] to the 'descriptor segment', which is an array of 'segment descriptor words' (SDWs) - one for each segment in a [[process]]' [[address space]]. When switching to a different process, only the DBR needs to be reloaded.

An Address Base Register (ABR) can be used to hold a segment number; an instruction can specify that its data address is formed from the segment number in an ABR, and an offset in the instruction. ABRs can also be paired, so that one contains an offset, and a second (specified in the first ABR) contains the segment.

A GE-645 CPU operated in either Absolute mode, in which [[memory management]] was disabled; Master mode, in which the memory management was operational (although certain limitations were disabled), but there were no limitations on which [[instruction]]s could be executed; or Slave mode, in which all user code normally operated:

{| class="wikitable"
! Limitation !! colspan="3" style="text-align:center;" | Mode
|-
|   || Absolute || Master || Slave
|-
| Privileged instructions || Yes || Yes || No
|-
| [[Interrupt]] inhibit || Yes || Yes || No
|-
| Instruction [[fetch]] || Absolute || Segmented || Segmented
|-
| [[Operand]] fetch || Either || Segmented || Segmented
|-
| Controlled access || No || Yes || Yes
|}

The basic overall [[architecture]] of the GE-645 was inherited from the GE-635 (although larger configurations were supported): it was a [[tightly-coupled]] [[multi-processor]], with all the [[Central Processing Unit|CPUs]] sharing access to a collection of [[multi-port memory]] modules. [[Input/output|I/O]] activities were handled by Input/Output Controller modules, which similarly shared access to the memory modules.

==External links==

* [http://www.bitsavers.org/pdf/ge/GE-645/LSB0468_GE-645_System_Manual_Jan1968.pdf GE-645 System Manual]
* [https://multicians.org/fjcc2.html System Design of a Computer for Time Sharing Applications]
* [https://multicians.org/645-board.html GE-645 Circuit Board]

[[Category: Mainframes]]

@@ Line 38: / Line 38: @@
 ==External links==
-<!-- * [http://www.bitsavers.org/pdf/ge/GE-645/ GE-645] - Bitsavers, not much -->
-* [http://www.bitsavers.org/pdf/ge/GE-645/LSB0468_GE-645_System_Manual_Jan1968.pdf GE-645 System Manual]
+* [http://www.bitsavers.org/pdf/ge/GE-645/ GE-645] - documentation at [[Bitsavers]]
 * [https://multicians.org/fjcc2.html System Design of a Computer for Time Sharing Applications]
 * [https://multicians.org/ge635.html The GE-635s at Project MAC and BTL] - describes the creation of the 645

@@ Line 1: / Line 1: @@
-The '''GE-645''' was a [[transistor]] [[mainframe]] computer, created for use by the [[Multics]] project. It had hardware support for a [[single-level store]], around which Multics was organized, as well as [[paging]]; although the two are logically separate, the two were both implemented by the same hardware (the 'Appending Unit', the main addition to the [[GE-635]], of which it was an enhanced descendant). The Multics group selected the GE-645, proposed to it by [[General Electric]], after [[International Business Machines|IBM]] refused to add necessary features, such as [[virtual memory]], to the [[IBM System/360|System 360]].
+The '''GE-645''' was a large [[mainframe]] computer, created for use by the [[Multics]] project. It had hardware support for a [[single-level store]], around which Multics was organized, as well as [[paging]]; although the two are logically separate, the two were both implemented by the same hardware (the 'Appending Unit', the main addition to the [[GE-635]], of which it was an enhanced descendant). The Multics group selected the GE-645, proposed to it by [[General Electric]], after [[International Business Machines|IBM]] refused to add necessary features, such as [[virtual memory]], to the [[IBM System/360|System 360]].
-[[Address]]es in the GE-645 were notionally 36 bits wide (it was a 36-bit machine, as was common for scientific computers in that period): an 18-bit [[segment]] number, and an 18-bit offset within the segment. Due to its legacy as a modified GE-635, instructions, and many of the internal [[register]]s in the CPU, did not directly handle full 36-bit addresses, though.
+[[Address]]es in the GE-645 were notionally 36 bits wide (it was a 36-bit machine, as was common for scientific computers in that period): an 18-bit [[segment]] number, and an 18-bit offset within the segment. Due to its legacy as a modified GE-635, [[instruction]]s, and many of the internal [[register]]s in the CPU, did not directly handle full 36-bit addresses, though.
 The CPU included a single-width [[accumulator]]; a single-width 'multiplier quotient'; eight half-with [[index register]]s; a half-width Instruction Counter (the [[Program Counter]]); a half-width Procedure Base Register (these last two together formed a full segment-addressed PC); a Descriptor Base Register (below); and eight Address Base Registers (likewise).
@@ Line 8: / Line 10: @@
 An Address Base Register (ABR) can be used to hold a segment number; an instruction can specify that its data address is formed from the segment number in an ABR, and an offset in the instruction. ABRs can also be paired, so that one contains an offset, and a second (specified in the first ABR) contains the segment.
 A GE-645 CPU operated in either Absolute mode, in which [[memory management]] was disabled; Master mode, in which the memory management was operational (although certain limitations were disabled), but there were no limitations on which [[instruction]]s could be executed; or Slave mode, in which all user code normally operated:
@@ Line 26: / Line 30: @@
 | Controlled access || No || Yes || Yes
 |}
 The basic overall [[architecture]] of the GE-645 was inherited from the GE-635 (although larger configurations were supported): it was a [[tightly-coupled]] [[multi-processor]], with all the [[Central Processing Unit|CPUs]] sharing access to a collection of [[multi-port memory]] modules. [[Input/output|I/O]] activities were handled by Input/Output Controller modules, which similarly shared access to the memory modules.
 ==External links==
@@ Line 33: / Line 41: @@
 * [http://www.bitsavers.org/pdf/ge/GE-645/LSB0468_GE-645_System_Manual_Jan1968.pdf GE-645 System Manual]
 * [https://multicians.org/fjcc2.html System Design of a Computer for Time Sharing Applications]
 * [https://multicians.org/645-board.html GE-645 Circuit Board]
 [[Category: Mainframes]]

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