IAS computer - Revision history

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The '''IAS computer''' (sometimes called the '''IAS machine'''; it seems not to have had a formal name) was a very early [[electronic]] [[program]]mable [[computer]]. The group that designed and built it began the task in June, 1946, and it passed its initial acceptance test in June, 1952. Its most significant contribution was the vast list of first-generation computers, both in the US, and around the world, which were copies of it (below).

The group, the '''Electronic Computer Project''', was assembled by [[John von Neumann]] at the [[Institute for Avanced Study]] at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the [[EDVAC]] had enlightened him to the promise of the field. (He broke of his connection to [[John Mauchly]] and [[J. Presper Eckert]] because they were focused on starting a business, the eventual [[Eckert–Mauchly Computer Corporation]], and he wished to make all his work public - as the many copies of the IAS computer testified.)

The engineers on the ECP team initially included Julian Bigelow (Chief Engineer), John Davis, James Pomerene, Robert Shaw, Ralph Slutz, ad Willis Ware; Morris Rubinoff and Dick Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, Gerald Estrin, Herman Goldstine, and others. Their work was widely distributed via progress reports, which were circulated extensively.

It eventually used [[Williams tube]]s for its [[main memory]] (after the [[Selectron]] project failed to produce usable memory), 1K 40-[[bit]] [[word]]s in total. It was constructed using [[vacuum tube]]s (although only about 3,000; many fewer than the [[ENIAC]]), and was a [[parallel computer]] internally, using [[binary]].

[[Instruction]]s were 20 bits long, and contained a 10-bit [[operation code|opcode]] and a 10-bit [[address]]. There were 16 instruction classes, each with 16 variants, not all of which did something useful. It had instructions to perform multiplication and division, but no special hardware; both were performed a bit at a time, with shifting and addition/subtraction.

It was eventually given a [[drum]] of 2K words; that was eventually replaced with a 12K one. [[Input/output|I/O]] was on [[paper tape]], later switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output.

==Copies==

As mentioned, many copies of it were built, early on (and a few later), some with the help of people who had worked on the IAS machine. The faithfulness of the copies varied from machine to machine (apparently including a last one, built with [[transistor]]s); the later ones used [[core memory]]. The list of the US ones, with their dates of completion, is:

* AVIDAC(Argonne) - January, 1953
* CYCLONE (Iowa State University) - July, 1959
* ILLIAC (Illinois) - September, 1952
* JOHNNIAC (Rand) - March, 1954
* MANIAC (Los Alamos) - March, 1952 (slightly before the original)
* MISTIC (Michigan State University) - November, 1957 (a copy of the ILLIAC)
* ORACLE (Oak Ridge) - September, 1953
* ORDVAC (Aberdeen) - November, 1951

(The MANIAC was said to have been so named in protest against the 'cute' names which had become the fashion.) Elsewhere, they included:

* BESK (Royal Institute of Technology, Sweden) - November, 1953 (included hardware [[floating point]])
* DASK (Academy of Technical Sciences, Denmark) - 1957 (a copy of BESK)
* EDB-1 (Facit, Sweden) - 1957 (another copy of BESK, without floating point)
* MUSASINO-1 (NTT, Japan) - March, 1957
* SARA (SAAB, Sweden) - 1957 (another tweaked copy of BESK)
* SILLIAC (University of Sydney, Australia) - June, 1956
* SMIL (Lund University, Sweden) - June, 1956
* TRASK (Datasystem AB, Sweden) - 1965 (another copy of BESK, using transistors and core)
* WEIZAC (Weizmann Institute, Israel) - October, 1955

The [[IBM 701]] was apparently a 'cleaned up' copy as well, as were the [[EDB-2]] and [[EDB-3]] families built in Sweden from 1957 on, and the FACOM 201 (a copy of the MUSASINO-1) produced by Fujitsu from 1960.

Several other machines (such as the [[BESM 1]]) were built after close study of the IAS computer's documentation (and in the BESM 1's case, that of the BESK as well), but were not copies of it.

{{semi-stub}}

==Further reading==

* Herman H. Goldstine, ''The Computer from Pascal to von Neumann'', Princeton University, Princeton, 1972 - contains details of the entire effort, in which Goldstine participated
* William Aspray, ''John von Neumann and the Origins of Modern Computing'', MIT Press, Cambridge, 1990
* Nicholas Metropolis, Jack Howlett, Gian-Carlo Rota (editors), [https://www.sciencedirect.com/book/9780124916500/a-history-of-computing-in-the-twentieth-century ''A History of Computing in the Twentieth Century''], Academic Press, New York, 1980 - the IAS computer is covered in the first section of Part IV; many descendants are covered in detail in other sections
* George Dyson, ''Turing's Cathedral: The Origins of the Digital Universe'', Pantheon, New York, 2012 - focused on the creation of this machine at the Institute for Advanced Study
* Raul Rojas, Ulf Hashagen, ''The First Computers: History and Architectures'', MIT Press, Cambridge, 2002 - the IAS machine is covered in detail in chapter II/4
* W. H. Ware, [http://bitsavers.trailing-edge.com/pdf/rand/P-377_The_History_And_Development_Of_The_IAS_Computer_Mar53.pdf ''The History and Development of the Electronic Computer Project at the Institute for Avanced Study''] (Rand Report P-377, March, 1953) - includes interesting detail of the electrical engineering design philosophy
* John Deane, [https://archive.computerhistory.org/resources/access/text/2017/11/102693640-05-01-acc.pdf ''The IAS Computer Family Scrapbook''] - lists further information sources for each machine

==External links==

* [http://www.bitsavers.org/pdf/ias/ IAS] - documentation at [[Bitsavers]] (skimpy)
** [http://www.bitsavers.org/pdf/ias/IAS_Final_Report_Jan54.pdf ''Final Progress Report on the Physical Realization of an Electronic Computing Instrument''] - contains a lot of details on the mathematics, and a detailed list of instruction
* [https://www.ias.edu/electronic-computer-project Electronic Computer Project]

[[Category: Early Computers]]

@@ Line 1: / Line 1: @@
 The '''IAS computer''' (sometimes called the '''IAS machine'''; it seems not to have had a formal name, although some later contemporary documents call it 'MANIAC', a name used by the Los Alamos copy) was a very early [[electronic]] [[program]]mable [[computer]]. The group that designed and built it began the task in June, 1946, initial operation began in the fall of 1950, and it was formally dedicated on 10 June, 1952. Its most significant contribution was the vast list of first-generation computers, both in the US, and around the world, which were copies of it (below).
-The group, the '''Electronic Computer Project''' (ECP), was assembled by [[John von Neumann]] at the [[Institute for Avanced Study]] (IAS) at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the [[EDVAC]] had enlightened him to the promise of the field. (He broke off his connection to [[John Mauchly]], and especially [[J. Presper Eckert]], because they were focused on starting a business, the eventual [[Eckert–Mauchly Computer Corporation]], and he wished to make all his work public - as the many copies of the IAS computer testified.)
+The group, the '''Electronic Computer Project''' (ECP), was assembled by [[John von Neumann]] at the [[Institute for Advanced Study]] (IAS) at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the [[EDVAC]] had enlightened him to the promise of the field. (He broke off his connection to [[John Mauchly]], and especially [[J. Presper Eckert]], because they were focused on starting a business, the eventual [[Eckert–Mauchly Computer Corporation]], and he wished to make all his work public - as the many copies of the IAS computer testified.)
 The engineers on the ECP team initially included Julian Bigelow (Chief Engineer; replaced mid-way with initial team-member James Pomerene), John Davis, Robert Shaw, Ralph Slutz, and Willis Ware; Morris Rubinoff and Richard Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, N. Emslie, Gerald Estrin, E. Frei, Herman Goldstine, T. Hildebrandt, G. Kent, W. Melville, J. Rosenberg, Morris Rubinoff, Richard L. Snyder, and others. Their work was widely distributed via progress reports, which were circulated extensively. The IAS closed the ECP in 1957-58 (the exact date is uncertain); apparently because as an organization the IAS was uncomfortable with such an essentially practical effort. The personnel then scattered, taking their knowledge with them; many became leading lights on other early computers.
@@ Line 160: / Line 160: @@
 * Raul Rojas, Ulf Hashagen, [https://doc.lagout.org/science/0_Computer%20Science/0_Computer%20History/The%20First%20Computers%20-%20History%20and%20Architectures.pdf ''The First Computers: History and Architectures''], MIT Press, Cambridge, 2002 - the IAS machine is covered in chapter II/4; no detail of the machine, but interesting coverage of the background and influence
 <!-- https://dokumen.pub/the-first-computers-history-and-architectures-9780262282529-0262282526-9780585355351-0585355355-0-262-18197-5.html -->
 ===Papers===
@@ Line 176: / Line 175: @@
 * [http://www.bitsavers.org/pdf/ias/ IAS] - documentation at [[Bitsavers]] (skimpy)
 ** [http://www.bitsavers.org/pdf/ias/IAS_Final_Report_Jan54.pdf ''Final Progress Report on the Physical Realization of an Electronic Computing Instrument''] - contains a lot of details on the mathematics, and a detailed list of instructions
 * [https://www.ias.edu/electronic-computer-project Electronic Computer Project]
 [[Category: Early Computers]]

@@ Line 48: / Line 48: @@
 | S752 || Plus absolute clear || 25 || S || &nbsp; || Load abs(b) into R1
 |-
-| 750 || Plus absolute hold || 25 || S || &nbsp; || Add abs(b) to R1
+| S750 || Plus absolute hold || 25 || S || &nbsp; || Add abs(b) to R1
 |-
 | S772 || Minus absolute clear || 26 || S || &nbsp; || Load 2-abs(b) into R1

@@ Line 21: / Line 21: @@
 Each register is composed internally of a pair of 'sub-registers' (termed "ranks"), denoted as R<sub>n</sub> (the "permanent rank") and R<sup>n</sup> (the "temporary rank") in contemporary documentation. RI and RII can perform single-bit left and right shifts when copying data from the R<sup>n</sup> rank to R<sub>n</sub>; an un-shifted copy can take place from R<sub>n</sub> to R<sup>n</sup>. RIII can also be copied to RII, and RII to RI.
-[[Instruction]]s were 20 bits long, and contained a 10-bit [[operation code|opcode]] and a 10-bit [[address]]. <!-- There were 16 instruction classes, each with some variants, not all of which did something useful. (For instance, the 'load RII' instruction could optionally clear RI.) --> There were about 30 in total.
+[[Instruction]]s were 20 bits long, and contained a 10-bit [[operation code|opcode]] and a 10-bit [[address]]. <!-- There were 16 instruction classes, each with some variants, not all of which did something useful. (For instance, the 'load RII' instruction could optionally clear RI.) --> There were about 30 in total; the number changed over time (e.g. when the [[input/output|I/O]] system was first redone, in 1952).
 It had instructions to perform multiplication and division, but no special hardware; both were performed a bit at a time, with shifting (performed with the sub-registers described above) and addition/subtraction. (Throughout the contemporary documentation, a great amount of attention is paid to the details of the arithmetic - as one might expect of a design in which John von Neumann was involved!)
-It was eventually (June, 1953) given an IAS-built [[drum]] of 2K words; a 12K one from [[Engineering Research Associates|ERA]] was later (1955) installed. [[Input/output|I/O]] was on [[paper tape]] initially, later switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output.
+I/O was on [[paper tape]] initially, later (1952) switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output. It was eventually (June, 1953) given an IAS-built [[drum]] of 2K words; a 12K one from [[Engineering Research Associates|ERA]] was later (1955) installed.
 ===Instruction set===
@@ Line 93: / Line 93: @@
 ''NOTE: the document uses "digit" where we would now say 'bit'.''
-The [[operation code]]s are given in a table in the ''Final Progress Report'', but not in numeric form; and the column for each bit in the opcode has an individual name, not a number. It is not known if the columns are in numeric order; if they are, the step bit is in the bit number indicated elsewhere in the document (11), but the clear digit bit is not (it is given elsewhere as bit 18, but is 19 in the table). They are given above in octal, as if the bit columns in the ''Final Progress Report'' are in numeric order. The bit columns (numbered by apparent value, based on position) are labelled:
+The [[operation code]]s are given in a table in the ''Final Progress Report'', but not in numeric form; and the column for each bit in the opcode has an individual name, not a number. It is not known if the columns are in numeric order; if they are, the step bit is in the bit number indicated elsewhere in the document (11), but the clear digit bit is not (it is given elsewhere as bit 18, but is 19 in the table). The opcodes are given above in octal, as if the bit columns in the ''Final Progress Report'' are in numeric order. The bit columns (numbered by apparent value, based on position) are labelled:
 {| class="wikitable"

@@ Line 1: / Line 1: @@
-The '''IAS computer''' (sometimes called the '''IAS machine'''; it seems not to have had a formal name, although some later contemporary documents call it 'MANIAC', a name used by the Los Alamos copy) was a very early [[electronic]] [[program]]mable [[computer]]. The group that designed and built it began the task in June, 1946, and it passed its initial acceptance test in June, 1952. Its most significant contribution was the vast list of first-generation computers, both in the US, and around the world, which were copies of it (below).
+The '''IAS computer''' (sometimes called the '''IAS machine'''; it seems not to have had a formal name, although some later contemporary documents call it 'MANIAC', a name used by the Los Alamos copy) was a very early [[electronic]] [[program]]mable [[computer]]. The group that designed and built it began the task in June, 1946, initial operation began in the fall of 1950, and it was formally dedicated on 10 June, 1952. Its most significant contribution was the vast list of first-generation computers, both in the US, and around the world, which were copies of it (below).
 The group, the '''Electronic Computer Project''' (ECP), was assembled by [[John von Neumann]] at the [[Institute for Avanced Study]] (IAS) at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the [[EDVAC]] had enlightened him to the promise of the field. (He broke off his connection to [[John Mauchly]], and especially [[J. Presper Eckert]], because they were focused on starting a business, the eventual [[Eckert–Mauchly Computer Corporation]], and he wished to make all his work public - as the many copies of the IAS computer testified.)
-The engineers on the ECP team initially included Julian Bigelow (Chief Engineer; replaced mid-way with initial team-member James Pomerene), John Davis, Robert Shaw, Ralph Slutz, and Willis Ware; Morris Rubinoff and Dick Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, N. Emslie, Gerald Estrin, E. Frei, Herman Goldstine, T. Hildebrandt, G. Kent, W. Melville, J. Rosenberg, Morris Rubinoff, Richard L. Snyder, and others. Their work was widely distributed via progress reports, which were circulated extensively. The IAS closed the ECP in 1957-58 (the exact date is uncertain); apparently because as an organization it was uncomfortable with such an essentially practical effort. The personnel then scattered, taking their knowledge with them; many became leading lights on other early computers.
+The engineers on the ECP team initially included Julian Bigelow (Chief Engineer; replaced mid-way with initial team-member James Pomerene), John Davis, Robert Shaw, Ralph Slutz, and Willis Ware; Morris Rubinoff and Richard Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, N. Emslie, Gerald Estrin, E. Frei, Herman Goldstine, T. Hildebrandt, G. Kent, W. Melville, J. Rosenberg, Morris Rubinoff, Richard L. Snyder, and others. Their work was widely distributed via progress reports, which were circulated extensively. The IAS closed the ECP in 1957-58 (the exact date is uncertain); apparently because as an organization the IAS was uncomfortable with such an essentially practical effort. The personnel then scattered, taking their knowledge with them; many became leading lights on other early computers.
 ==Technical details==
@@ Line 9: / Line 9: @@
 Not one of the many, many later books which describe the IAS machine (below) give complete coverage of its [[architecture]]. This description is mostly gleaned from the ''Final Progress Report'' (below); the [[instruction set]] is enumerated at the end of that, and is given below.
-It eventually used 40 [[Williams tube]]s for its [[main memory]] (after the [[Selectron]] project failed to produce usable memory). That contained 1K words in total, each tube using a 32x32 [[array]]. (Although this memory had to be [[memory refresh|refreshed]], refresh cycles could be combined with read/write operations when possible.) The [[logic]] was constructed using [[vacuum tube]]s (although only about 3,000; many fewer than the [[ENIAC]]).
+It eventually used 40 [[Williams tube]]s for its [[main memory]] (after the [[Selectron]] project failed to produce usable memory, although a later copy used them). They contained 1K words in total, each tube using a 32x32 [[array]]. (Although this memory had to be [[memory refresh|refreshed]], refresh cycles could be combined with read/write operations when possible.) The [[logic]] was constructed using [[vacuum tube]]s (although only about 3,000; many fewer than the [[ENIAC]]).
 It was an [[asynchronous]] [[parallel computer]] internally, using 40-[[bit]] [[word]]s. It used [[binary]], with the sign bit at the left (and [[two's complement]]), and the binary point between it and the next bit; i.e. words can represent values between 1 and -1.
@@ Line 25: / Line 25: @@
 It had instructions to perform multiplication and division, but no special hardware; both were performed a bit at a time, with shifting (performed with the sub-registers described above) and addition/subtraction. (Throughout the contemporary documentation, a great amount of attention is paid to the details of the arithmetic - as one might expect of a design in which John von Neumann was involved!)
-It was eventually given a [[drum]] of 2K words; there was a plan to replace that with a 12K one, but it is not known if that was ever done. [[Input/output|I/O]] was on [[paper tape]] initially, later switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output.
+It was eventually (June, 1953) given an IAS-built [[drum]] of 2K words; a 12K one from [[Engineering Research Associates|ERA]] was later (1955) installed. [[Input/output|I/O]] was on [[paper tape]] initially, later switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output.
 ===Instruction set===
-Two instructions were stored in each word, referred to as the 'first' (left) and 'second' (right) 'phases'; executed in that order. A few instructions could be executed in the left half only, and one in the right; such limitations are given in the table below (a blank entry means 'either').
+Two instructions were stored in each word, referred to as the 'first' (left) and 'second' (right) 'phases'; executed in that order. A few instructions could be executed in the left phase only, and one in the right only; such limitations are given in the table below (a blank entry means 'either').
-The 'step digit', bit 11, may be 0 ([[halt]] after executing the instruction) or 1 in many instructions. If so, it is indicated by an 'S' in 'bits' column (and also in the numeric opcode). The 'clear digit', bit 18, is available in some instructions; if so, it is indicated by a 'C' in the 'bits' column (and will set the appropriate bit in the numeric opcode). It may be 0 (see 'Comment' for action) or 1 (clear R1 before commencing).
+The 'step digit', bit 11, may be 0 ([[halt]] after executing the instruction) or 1 in many instructions. If so, it is indicated by an 'S' in 'bits' column (and also in the numeric opcode). "S=1" means it ''must'' be set in that instruction. The 'clear digit', bit 18, is available in some instructions; if so, it is indicated by a 'C' in the 'bits' column (and will set the appropriate bit in the numeric opcode). It may be 0 (see 'Comment' for action) or 1 (clear R1 before commencing).
 Potential [[operand]]s are generally R<sub>1</sub>, R<sub>2</sub>, and R<sup>3</sup> (referred to as "R3" in the table); and the contents ('b') of the memory location (address 'x'). Most instruction (unless otherwise noted) leave b in R3. A detailed description of each instruction is provided on the given page of the ''Final Progress Report''.
 {| class="wikitable"
-! Group !! Opcode !! Name !! Page !! Phase !! Bits !! Brief description !! Comment
+! Group !! Opcode !! Name !! Page !! Bits !! Phase !! Brief description !! Comment
 |-
-| rowspan="8" | {{VerticalTextUp|Summation}} || S712 || Plus clear || 22 || &nbsp; || S || Load b into R1
+| rowspan="8" | {{VerticalTextUp|Summation}} || S712 || Plus clear || 22 || S || &nbsp; || Load b into R1
 |-
-| S710 || Plus hold || 23 || &nbsp; || S || Add b to R1
+| S710 || Plus hold || 23 || S || &nbsp; || Add b to R1
 |-
-| S732 || Minus clear || 24 || &nbsp; || S || Load 2-b into R1
+| S732 || Minus clear || 24 || S || &nbsp; || Load 2-b into R1
 |-
-| S730 || Minus hold || 24 || &nbsp; || S || Subtract b from R1
+| S730 || Minus hold || 24 || S || &nbsp; || Subtract b from R1
 |-
 | S752 || Plus absolute clear || 25 || S || &nbsp; || Load abs(b) into R1
@@ Line 144: / Line 144: @@
 * WEIZAC (Weizmann Institute, Israel) - October, 1955
-The [[IBM 701]] was apparently a 'cleaned up' copy as well, as were the [[EDB-2]] and [[EDB-3]] families built in Sweden from 1957 on, and the FACOM 201 (a copy of the MUSASINO-1) produced by Fujitsu from 1960.
+The [[IBM 701]] was apparently a 'cleaned up' copy as well (a different word length, with half-word addresses), as were the [[EDB-2]] and [[EDB-3]] families built in Sweden from 1957 on, and the FACOM 201 (a copy of the MUSASINO-1) produced by Fujitsu from 1960.
 Several other machines (such as the [[BESM 1]]) were built after close study of the IAS computer's documentation (and in the BESM 1's case, that of the BESK as well), but were not copies of it.
@@ Line 155: / Line 155: @@
 * Herman H. Goldstine, ''The Computer from Pascal to von Neumann'', Princeton University, Princeton, 1972 - contains details of the entire effort, in which Goldstine participated
-* William Aspray, ''John von Neumann and the Origins of Modern Computing'', MIT Press, Cambridge, 1990
+* William Aspray, ''John von Neumann and the Origins of Modern Computing'', MIT Press, Cambridge, 1990 - not much technical detail, but a good overall history, and a lot about problem areas the machine was used for
 * Julian Bigelow ''Computer Development at the Institute for Advanced Study''; pp. 291-310 in Nicholas Metropolis, Jack Howlett, Gian-Carlo Rota (editors), [https://www.sciencedirect.com/book/9780124916500/a-history-of-computing-in-the-twentieth-century ''A History of Computing in the Twentieth Century''], Academic Press, New York, 1980 - the IAS computer is covered in the first section of Part IV, but with a focus on the electrical engineering; many descendants are covered in detail in other sections
 * George Dyson, ''Turing's Cathedral: The Origins of the Digital Universe'', Pantheon, New York, 2012 - focused on the creation of this machine at the Institute for Advanced Study

@@ Line 73: / Line 73: @@
 * Gerald Estrin, [https://dl.acm.org/doi/pdf/10.1145/800259.809005 ''A description of the electronic computer at the Institute for Advanced Studies''], Proceedings of the 1952 ACM national meeting (Toronto), September 1952 - very complete, but low-level, description
 <!-- https://www.cs.unh.edu/~pjh/courses/cs520/05fall/p95-estrin.pdf -->
 ==External links==

@@ Line 123: / Line 123: @@
 As mentioned, many copies of it were built, early on (and a few later), some with the help of people who had worked on the IAS machine. The faithfulness of the copies varied from machine to machine (apparently including a last one, built with [[transistor]]s); the later ones used [[core memory]]. The list of the US ones, with their dates of completion, is:
-* AVIDAC(Argonne) - January, 1953
+* AVIDAC (Argonne) - January, 1953
 * CYCLONE (Iowa State University) - July, 1959
 * ILLIAC (Illinois) - September, 1952

@@ Line 1: / Line 1: @@
 The '''IAS computer''' (sometimes called the '''IAS machine'''; it seems not to have had a formal name) was a very early [[electronic]] [[program]]mable [[computer]]. The group that designed and built it began the task in June, 1946, and it passed its initial acceptance test in June, 1952. Its most significant contribution was the vast list of first-generation computers, both in the US, and around the world, which were copies of it (below).
-The group, the '''Electronic Computer Project''', was assembled by [[John von Neumann]] at the [[Institute for Avanced Study]] at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the [[EDVAC]] had enlightened him to the promise of the field. (He broke of his connection to [[John Mauchly]] and [[J. Presper Eckert]] because they were focused on starting a business, the eventual [[Eckert–Mauchly Computer Corporation]], and he wished to make all his work public - as the many copies of the IAS computer testified.)
+The group, the '''Electronic Computer Project''' (ECP), was assembled by [[John von Neumann]] at the [[Institute for Avanced Study]] (IAS) at Princeton (von Neumann's base institution at the time). This machine became his focus after his involvement in the planning for, and design of, the [[EDVAC]] had enlightened him to the promise of the field. (He broke off his connection to [[John Mauchly]], and especially [[J. Presper Eckert]], because they were focused on starting a business, the eventual [[Eckert–Mauchly Computer Corporation]], and he wished to make all his work public - as the many copies of the IAS computer testified.)
-The engineers on the ECP team initially included Julian Bigelow (Chief Engineer), John Davis, James Pomerene, Robert Shaw, Ralph Slutz, ad Willis Ware; Morris Rubinoff and Dick Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, Gerald Estrin, Herman Goldstine, and others. Their work was widely distributed via progress reports, which were circulated extensively.
+The engineers on the ECP team initially included Julian Bigelow (Chief Engineer; replaced mid-way with initial team-member James Pomerene), John Davis, Robert Shaw, Ralph Slutz, and Willis Ware; Morris Rubinoff and Dick Snyder joined later. Other members of the team included Arthur Burks, Jule Charney, Hewitt Crane, Gerald Estrin, Herman Goldstine, and others. Their work was widely distributed via progress reports, which were circulated extensively. The IAS closed the ECP in 1957-58 (the exact date is uncertain); apparently because as an organization it was uncomfortable with such an essentially practical effort. The personnel then scattered, taking their knowledge with them; many became leading lights on other early computers.
-It eventually used [[Williams tube]]s for its [[main memory]] (after the [[Selectron]] project failed to produce usable memory), 1K 40-[[bit]] [[word]]s in total. It was constructed using [[vacuum tube]]s (although only about 3,000; many fewer than the [[ENIAC]]), and was a [[parallel computer]] internally, using [[binary]].
+It eventually used [[Williams tube]]s for its [[main memory]] (after the [[Selectron]] project failed to produce usable memory), 1K 40-[[bit]] [[word]]s in total. It was constructed using [[vacuum tube]]s (although only about 3,000; many fewer than the [[ENIAC]]), and was a [[asynchronous]] [[parallel computer]] internally, using [[binary]].
 [[Instruction]]s were 20 bits long, and contained a 10-bit [[operation code|opcode]] and a 10-bit [[address]]. There were 16 instruction classes, each with 16 variants, not all of which did something useful. It had instructions to perform multiplication and division, but no special hardware; both were performed a bit at a time, with shifting and addition/subtraction.
-It was eventually given a [[drum]] of 2K words; that was eventually replaced with a 12K one. [[Input/output|I/O]] was on [[paper tape]], later switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output.
+It was eventually given a [[drum]] of 2K words; there was a plan to replace that with a 12K one. [[Input/output|I/O]] was on [[paper tape]] initially, later switched to [[punched card]]s, and supplemented with a 7" [[CRT]] for [[graphics]] output.
 ==Copies==
@@ Line 48: / Line 48: @@
 * Nicholas Metropolis, Jack Howlett, Gian-Carlo Rota (editors), [https://www.sciencedirect.com/book/9780124916500/a-history-of-computing-in-the-twentieth-century ''A History of Computing in the Twentieth Century''], Academic Press, New York, 1980 - the IAS computer is covered in the first section of Part IV; many descendants are covered in detail in other sections
 * George Dyson, ''Turing's Cathedral: The Origins of the Digital Universe'', Pantheon, New York, 2012 - focused on the creation of this machine at the Institute for Advanced Study
-* Raul Rojas, Ulf Hashagen, ''The First Computers: History and Architectures'', MIT Press, Cambridge, 2002 - the IAS machine is covered in detail in chapter II/4
+* Raul Rojas, Ulf Hashagen, [https://doc.lagout.org/science/0_Computer%20Science/0_Computer%20History/The%20First%20Computers%20-%20History%20and%20Architectures.pdf ''The First Computers: History and Architectures''], MIT Press, Cambridge, 2002 - the IAS machine is covered in chapter II/4; no detail of the machine, but interesting coverage of the background and influence
 * W. H. Ware, [http://bitsavers.trailing-edge.com/pdf/rand/P-377_The_History_And_Development_Of_The_IAS_Computer_Mar53.pdf ''The History and Development of the Electronic Computer Project at the Institute for Avanced Study''] (Rand Report P-377, March, 1953) - includes interesting detail of the electrical engineering design philosophy
 * John Deane, [https://archive.computerhistory.org/resources/access/text/2017/11/102693640-05-01-acc.pdf ''The IAS Computer Family Scrapbook''] - lists further information sources for each machine