IBM 7030 Stretch - Revision history

Jnc: typo

2024-01-11T14:37:30Z

typo

Jnc: /* External links */ Add docs

2024-01-11T14:35:25Z

‎External links: Add docs

Jnc: interleaving cleanup

2023-07-30T17:47:51Z

interleaving cleanup

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2023-01-29T13:34:22Z

+New cat

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2018-12-19T23:15:29Z

+cat

Jnc: A decent start

2018-10-05T14:21:06Z

A decent start

New page

{{Infobox Machine
| name = IBM 7030 (Stretch)

| manufacturer = [[International Business Machines]]
| year announced = late 1956
| year design started = late 1954; formal project start January 1956
| year first shipped = April, 1961

| year discontinued = May, 1961
| form factor = [[mainframe]]
| word size = 64 bits
| physical address = 18 bits (256K words)
| virtual address = 18 bits
| logic type = [[Emitter-coupled logic|ECL]] using drift [[transistor]]s



| memory speed = 2.1 µsec




| price = US$7.8M (reduced from US$13.5M)
}}

The '''IBM 7030''' (a product of '''Project Stretch''', so it was often called by some variant of that) was a ground-breaking and influential [[mainframe]] from [[International Business Machines|IBM]], arguably the first [[supercomputer]]. It was the fastest computer in the world from 1961 until the advent of the [[CDC 6600]] in 1964.

Although initially considered a commercial failure by IBM, it was later recognized as the foundation of the success of the [[IBM System/360]]; both its technology (it was the first machine IBM built with [[transistor]]s, and Stretch hardware was used directly in the [[IBM 7090]]), and many of its [[architecture|architectural]] innovations were used there, especially in the higher-performance models of the /360 line. Indeed, many of them (such as [[pipeline]]s) are still in use today, and important.

The initial goal was a performance 100 times that of the [[IBM 704]]; this target was not met, but the 7030 was roughly 30 times as fast (the exact multiplier depends on the problem, due to the large amount of overlap between successive [[instruction]]s).

It also introduced the concept of the 8-[[bit]] [[byte]], although the [[Central Processing Unit|CPU]] could [[address]] individual bits.

The logic used was basically [[emitter-coupled logic|ECL]], in that it used "switching (or steering) a constant current .. toward [either] output". The CPU alone contained no less than 169,000 discrete transistors, packaged in wat was effectively an early form of [[Standard Modular System]] [[printed circuit board|cards]]. The [[main memory]] used [[interleaving]] (up to 4-way, depending on the number of memory banks installed) to increase the memory bandwidth.

It was intended from the start to be used in [[multi-tasking|multi-programming]] mode; the system included what was effectively [[base and bounds]] [[memory management]].

==Further reading==

* Werner Buchholz (editor), ''Planning a Computer System: Project Stretch'', McGraw-Hill, New York, 1962

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 It also introduced the concept of the 8-[[bit]] [[byte]], although the [[Central Processing Unit|CPU]] could [[address]] individual bits.
-The logic used was basically [[emitter-coupled logic|ECL]], in that it used "switching (or steering) a constant current .. toward [either] output". The CPU alone contained no less than 169,000 discrete transistors, packaged in wat was effectively an early form of [[Standard Modular System]] [[printed circuit board|cards]]. The [[main memory]] used [[memory interleaving|interleaving]] (up to 4-way, depending on the number of memory banks installed) to increase the memory bandwidth.
+The logic used was basically [[emitter-coupled logic|ECL]], in that it used "switching (or steering) a constant current .. toward [either] output". The CPU alone contained no less than 169,000 discrete transistors, packaged in what was effectively an early form of [[Standard Modular System]] [[printed circuit board|cards]]. The [[main memory]] used [[memory interleaving|interleaving]] (up to 4-way, depending on the number of memory banks installed) to increase the memory bandwidth.
 It was intended from the start to be used in [[multi-tasking|multi-programming]] mode; the system included what was effectively [[base and bounds]] [[memory management]].

@@ Line 43: / Line 43: @@
 ==Further reading==
-* Werner Buchholz (editor), ''Planning a Computer System: Project Stretch'', McGraw-Hill, New York, 1962
+* Werner Buchholz (editor), [https://ed-thelen.org/comp-hist/IBM-7030-Planning-McJones.pdf ''Planning a Computer System: Project Stretch''], McGraw-Hill, New York, 1962
 [[Category: IBM Mainframes]]
 [[Category: Supercomputers]]

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