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		<title>KA820 CPU - Revision history</title>
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		<updated>2026-05-15T18:09:25Z</updated>
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		<id>https://gunkies.org/w/index.php?title=KA820_CPU&amp;diff=35590&amp;oldid=prev</id>
		<title>Jnc: Fairly complete (for a start)</title>
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				<updated>2024-11-27T17:49:40Z</updated>
		
		<summary type="html">&lt;p&gt;Fairly complete (for a start)&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;The '''KA820 CPU''' is a mid-range [[VAX]] [[Central Processing Unit|CPU]] used in [[VAX 82xx/83xx series]] systems. It, and they, use the [[VAX Bus Interconnect|VAXBI]] [[bus]] to connect their main sub-systems, including the [[main memory]]. The CPU also supports the PCI bus (apparently un-related to the bus of the [[Peripheral Component Interconnect|same name]] on [[IBM-compatible PC]]s), used to connect local, low-speed [[peripheral|devices]].&lt;br /&gt;
&lt;br /&gt;
It used the V-11 [[integrated circuit|chip]] set (code named 'Scorpio'), fabricated in-house using [[Metal Oxide Semiconductor|MOS]] technology. It made extensive use of [[pipeline|pipelining]] internally; operation throughout the CPU is extensively protected by [[parity]].&lt;br /&gt;
&lt;br /&gt;
Physically, the KA820 is a single [[printed circuit board|board]] containing a number of custom [[VLSI]] chips: one for [[instruction]] decoding and [[execute|execution]]; one for [[memory management]] and [[cache]] management; one for [[floating point]]; and the VAXBI interconnect interface chip (BIIC). A separate cache is also provided for main memory; another cache, the backup translation buffer (BTB), holds [[page table]] entries (this supplements a 'mini-translation buffer' (MTB) held directly on the memory management chip).&lt;br /&gt;
&lt;br /&gt;
The KA820 is a [[microcode]]d CPU, using 40-bit micro-instructions. The microcode is mostly held in [[read-only memory|ROM]], but a novel scheme involving a [[content-addressable memory|CAM]] allows it to be 'patched', using a small amount of [[Random Access Memory|RAM]]. An [[EEPROM]] holds microcode patches, along with configuration settings, across power-down/up cycles. [[Front panel]] functionality is also provided by microcode, along with an on-board [[asynchronous serial line]] interface.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- ==See also==&lt;br /&gt;
==Further reading==&lt;br /&gt;
--&amp;gt;&lt;br /&gt;
==External links==&lt;br /&gt;
&lt;br /&gt;
* [http://www.bitsavers.org/pdf/dec/vax/8200/ 8200] - documentation at [[Bitsavers]]&lt;br /&gt;
** [http://www.bitsavers.org/pdf/dec/vax/8200/KA820-AA.TXT KA820-AA Specification - Part II - User and Programming Information]&lt;br /&gt;
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KA820-TM-003%20KA820-KA825%20Processor%20Technical%20Manual.pdf KA820/KA825 Processor Technical Manual] (EK-KA820-TM-003)&lt;br /&gt;
* [https://en.wikipedia.org/wiki/DEC_V-11 DEC V-11]&lt;br /&gt;
* [https://simh.trailing-edge.com/semi/v11.html V-11 (1986)]&lt;br /&gt;
&lt;br /&gt;
[[Category: DEC VAX Processors]]&lt;br /&gt;
[[Category: VAX 82xx/83xx Systems]]&lt;br /&gt;
[[Category: VAXBI]]&lt;/div&gt;</summary>
		<author><name>Jnc</name></author>	</entry>

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