KD11-E CPU - Revision history

Jnc: /* KY11-LB Interface */ +link

2022-12-06T00:23:03Z

‎KY11-LB Interface: +link

Jnc: /* Implementation */ reg file

2022-11-05T03:27:18Z

‎Implementation: reg file

Jnc: better cat

2022-03-31T20:40:24Z

better cat

Jnc: KY11-L to CPU interface

2022-03-01T04:17:30Z

KY11-L to CPU interface

Jnc: +uword bits

2022-02-11T23:03:49Z

+uword bits

Jnc: /* Implementation */ typo

2022-02-10T17:26:21Z

‎Implementation: typo

Jnc: +Internal details

2022-02-10T15:32:57Z

+Internal details

Jnc: /* External links */ +FMPS, manual

2022-01-12T12:44:29Z

‎External links: +FMPS, manual

Jnc: +images, correct desc of maint cable conns

2020-06-16T12:45:02Z

+images, correct desc of maint cable conns

Jnc: Mention backplane

2019-01-09T20:08:24Z

Mention backplane

@@ Line 114: / Line 114: @@
 ==KY11-LB Interface==
-The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s with female [[Berg connector]]s connected to [[wire-wrap]] pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
+The main functionality of the KY11-B [[KY11-L to CPU interface|is performed]] over the UNIBUS, and a pair of backplane lines.
 ==See also==

@@ Line 55: / Line 55: @@
 {| class="wikitable"
-! Chip !! [[DEC part number]] !! Size !! Function
+! Chip !! DEC part number !! Size !! Function
 |-
 | E52 || 23-175A2 || 256x4 || Trap Decoder
@@ Line 82: / Line 82: @@
 |-
 | E81 || 23-107A1 || 32x8 || DOP ALU Control
 |}

@@ Line 95: / Line 95: @@
 * [http://www.bitsavers.org/pdf/dec/pdp11/1134/EK-KD11E-TM-001_KD11-E_Central_Processor_Maintenance_Manual_Dec76.pdf KD11-E central processor maintenance manual] (EK-KD11E-TM-001)
-* [http://www.bitsavers.org/pdf/dec/pdp11/1134/MP00082_1134_Vol2_Sep76.pdf 11/34 Vol. 2 Field Maintenance Print Set] (MP00082) - KD11-E is covered on pp. 41-62
+* [http://www.bitsavers.org/pdf/dec/pdp11/1134/MP00082_1134_Vol2_Sep76.pdf 11/34 Vol. 2 Field Maintenance Print Set] (MP00082) - KD11-E is covered on pp. 41-62 of the PDF
-[[Category: PDP-11 Processors]]
+[[Category: PDP-11 UNIBUS Processors]]

← Older revision		Revision as of 04:17, 1 March 2022
Line 4:		Line 4:

	Although it supported the [[KY11-LB Programmer's Console]], including the [[diagnostic]] functionality which allow the CPU's [[microcode]] to be [[single-step]]ped, it did not support the [[FP11-A Floating-Point Processor\|FP11-A]] [[FP11 floating point\|floating point]] unit or the [[KK11-A Cache Memory\|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.		Although it supported the [[KY11-LB Programmer's Console]], including the [[diagnostic]] functionality which allow the CPU's [[microcode]] to be [[single-step]]ped, it did not support the [[FP11-A Floating-Point Processor\|FP11-A]] [[FP11 floating point\|floating point]] unit or the [[KK11-A Cache Memory\|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
		+
		+	The KD11-E uses the same [[KY11-L to CPU interface]] as the other machines that use them.

	[[Image:KD11-E M7266.jpg\|250px\|right\|thumb\|M7266 Control card]]		[[Image:KD11-E M7266.jpg\|250px\|right\|thumb\|M7266 Control card]]

@@ Line 21: / Line 21: @@
 {| class="wikitable"
-! Chip !! [[DEC part number]]!! Bits
+! Chip !! [[DEC part number]] !! Bits !! Function
 |-
-| E97 || 23-021A9 || B, BX, OVX CTL
+| E97/E94|| 23-021A9 || 24-27 || B, BX, OVX CTL
 |-
-| E98 || 23-022A9 || SSMUX CTL, AMUX CTL
+| E98/E95 || 23-022A9 || 28-31 || SSMUX CTL, AMUX CTL
 |-
-| E99 || 23-020A9 || FUNC CODE 01-03
+| E99/E96 || 23-020A9 || 20-23 || FUNC CODE 01-03
 |-
-| E100 || 23-023A9 || BUT BITS
+| E100/E97 || 23-023A9 || 32-35 || BUT BITS
 |-
-| E102 || 23-025A9 || FORCE K, BUT SERV, PREV, FORCE RSV1
+| E102/E111 || 23-025A9 || 40-43 || FORCE K, BUT SERV, PREV, FORCE RSV1
 |-
-| E103 || 23-024A9 || SPA SRC SEL0-1, SPA DST SEL0-1
+| E103/E112 || 23-024A9 || 36-9 || SPA SRC SEL0-1, SPA DST SEL0-1
 |-
-| E104 || 23-026A9 || ROM SPA 00-03
+| E104/E113 || 23-026A9 || 44-47 || ROM SPA 00-03
 |-
-| E105 || 23-019A9 || LOAD BA, LONG CYC, AUX SETUP, FUNC CODE 04
+| E105/E114 || 23-019A9 || 16-19 || LOAD BA, LONG CYC, AUX SETUP, FUNC CODE 04
 |-
-| E106 || 23-018A9 || BUF DAT TRAN, BUF C0/C1, ENAB MAINT
+| E106/E115 || 23-018A9 || 12-15 || BUF DAT TRAN, BUF C0/C1, ENAB MAINT
 |-
-| E107 || 23-017A9 || MPC00, Misc Control
+| E107/E116 || 23-017A9 || 8-11 || MPC00, Misc Control
 |-
-| E108 || 23-016A9 || MPC01-04
+| E108/E117 || 23-016A9 || 4-7 || MPC01-04
 |-
-| E109 || 23-015A9 || MPC05-08
+| E109/E118 || 23-015A9 || 0-3 || MPC05-08
 |}
-The Instruction Decoder uses 13 PROMs, of differing sizes:
+''Note:'' The chip numbers in the KD11-E FMPS (MP0004) are given with two differing assignments; the 'Control Word' diagram (pg. 1 of the 'KD11-E Flow Diagrams') gives one set of numbers (the second, in the table above); the actual prints of the M7266 use another (given as the first in the table above).
 {| class="wikitable"

@@ Line 73: / Line 73: @@
 | E69 || 23-171A2 || 256x4 || DOP Decoder
 |-
-| E71 || 23-22A2 || 256x4 || Branch Decoder
+| E71 || 23-A22A2 || 256x4 || Branch Decoder
 |-
 | E73 || 23-110A1 || 32x8 || [[PDP-11 Extended Instruction Set|EIS]] Decoder

@@ Line 1: / Line 1: @@
 [[Image:KD11-E M7265.jpg|250px|right|thumb|M7265 Data Paths card]]
-The '''KD11-E CPU''' was the first [[Central Processing Unit|CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit board]]s, the M7265 Data Paths module and the M7266 Control module. They plugged into a modified [[Modified UNIBUS Device|MUD]] [[backplane]], the [[DD11-P backplane]], which was customized for the KD11-E.
+The '''KD11-E CPU''' was the first [[Central Processing Unit|CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit board]]s, the '''M7265''' Data Paths module and the '''M7266''' Control module. They plugged into a modified [[Modified UNIBUS Device|MUD]] [[backplane]], the [[DD11-P backplane]], which was customized for the KD11-E.
 Although it supported the [[KY11-LB Programmer's Console]], including the [[diagnostic]] functionality which allow the CPU's [[microcode]] to be [[single-step]]ped, it did not support the [[FP11-A Floating-Point Processor|FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
@@ Line 10: / Line 10: @@
 The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s with female [[Berg connector]]s connected to [[wire-wrap]] pin groups (denominated J1 and J2) in the upper left corner of the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
 ==See also==
@@ Line 15: / Line 17: @@
 * [[KD11-E/EA microcode]]
-{{semi-stub}}
+==External links==
-{{PDP-11}}
+* [http://www.bitsavers.org/pdf/dec/pdp11/1134/EK-KD11E-TM-001_KD11-E_Central_Processor_Maintenance_Manual_Dec76.pdf KD11-E central processor maintenance manual] (EK-KD11E-TM-001)
 [[Category: PDP-11 Processors]]
 [[Category: UNIBUS Processors]]

@@ Line 1: / Line 1: @@
-The '''KD11-E CPU''' was the first [[CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit board]]s, the M7265 Data Paths module and the M7266 Control module.
+The '''KD11-E CPU''' was the first [[CPU]] version for the [[PDP-11/34]]; it consisted of two [[DEC card form factor|hex]] [[printed circuit board]]s, the M7265 Data Paths module and the M7266 Control module. They plugged into a modified [[Modified UNIBUS Device|MUD]] [[backplane]] which was customized for the KD11-E, the [[DD11-P backplane]].
 Although it supported the [[KY11-LB Programmer's Console]], including the maintainence functionality which allow the CPU's [[microcode]] to be [[single-step]]ped, it did not support the [[FP11-A Floating-Point Processor|FP11-A]] [[FP11 floating point|floating point]] unit or the [[KK11-A Cache Memory|KK11-A]] [[cache]]; a PDP-11/34 system needed the upgraded [[KD11-EA CPU]] for that.
@@ Line 5: / Line 5: @@
 ==KY11-LB Interface==
-The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s connected to [[Berg connector]] headers (denominated J1 and J2) on the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and several backplane lines.)
+The microcode diagnostic interface to the KY11-LB is carried over two 10-wire [[flat cable]]s connected to [[Berg connector]] headers (denominated J1 and J2) on the M7266 module. (The main functionality of the KY11-B is done over the UNIBUS, and a pair of backplane lines.)
 ==See also==