KE11-F Floating Instruction Set - Revision history

Jnc: Not a high-performance implementation

2025-12-25T07:20:26Z

Not a high-performance implementation

Jnc: Better cat

2022-10-12T00:34:26Z

Better cat

Jnc: +backup UM

2021-11-19T17:01:43Z

+backup UM

Jnc: +External links (manuals, eng drws)

2021-10-18T15:15:30Z

+External links (manuals, eng drws)

Jnc: Add image

2019-09-19T01:35:49Z

Add image

Jnc: +cat

2018-12-16T14:05:53Z

+cat

Jnc: A decent start

2018-05-08T03:10:48Z

A decent start

New page

The '''KE11-F Floating Instruction Set‏‎''' is the optional [[floating point]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]].

Physically, it consists of a single [[DEC card form factor|quad]] board, the M7239, which plugs into a pre-wired slot in the [[Central Processing Unit|CPU]] [[backplane]].

It requires the installation of the [[KE11-E Extended Instruction Set]], which allows the [[microcode]] of the basic CPU to be extended.

The KE11-F includes its own microcode [[Read-only memory|ROM]], which provides an additional 8 bits width of microcode (to control the [[data path]]s and [[register]]s on the M7239), but it also uses microcode stored on the KE11-E, to control registers and datapaths elsewhere.

==Further reading==

* "KE11-E and KE11-F Instruction Set Options Manual", EK-KE11E-TM-002

← Older revision		Revision as of 00:34, 12 October 2022
Line 15:		Line 15:
	* [https://manx-docs.org/collections/hcps/KE11-FIS.pdf KE11-F floating instruction set (FIS) option engineering drawings]		* [https://manx-docs.org/collections/hcps/KE11-FIS.pdf KE11-F floating instruction set (FIS) option engineering drawings]

−	[[Category: PDP-11 Processors]]	+	[[Category: PDP-11 UNIBUS Processors]]

@@ Line 11: / Line 11: @@
 ==External links==
-* [http://bitsavers.org/pdf/dec/pdp11/1140/KE11_RefMan.pdf KE11-E and KE11-F instruction set options user's manual]  (EK-KE11E-OP-001)
+* [http://www.bitsavers.org/pdf/dec/pdp11/1140/KE11_RefMan.pdf KE11-E and KE11-F instruction set options user's manual] (EK-KE11E-OP-001) <!-- also http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KE11E-OP-001%20KE11-E%20and%20KE11-F%20Instruction%20Set%20Options%20User's%20Manual.pdf -->
 * [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KE11E-TM-002%20KE11-E%20and%20KE11-F%20Instruction%20Set%20Options%20Manual.pdf KE11-E and KE11-F instruction set options manual] (EK-KE11E-TM-002)
 * [https://manx-docs.org/collections/hcps/KE11-FIS.pdf KE11-F floating instruction set (FIS) option engineering drawings]
 [[Category: PDP-11 Processors]]

@@ Line 7: / Line 7: @@
 It requires the installation of the [[KE11-E Extended Instruction Set]], which allows the [[microcode]] of the basic CPU to be extended.
-The KE11-F includes its own microcode [[Read-only memory|ROM]], which provides an additional 8 bits width of microcode (to control the [[data path]]s and [[register]]s on the M7239), but it also uses microcode stored on the KE11-E, to control registers and datapaths elsewhere.
+The KE11-F includes its own microcode [[read-only memory|ROM]], which provides an additional 8 bits width of microcode (to control the [[data path]]s and [[register]]s on the M7239), but it also uses microcode stored on the KE11-E, to control registers and data paths elsewhere.
-==Further reading==
+==External links==
-* "KE11-E and KE11-F Instruction Set Options Manual", EK-KE11E-TM-002
+* [http://bitsavers.org/pdf/dec/pdp11/1140/KE11_RefMan.pdf KE11-E and KE11-F instruction set options user's manual]  (EK-KE11E-OP-001)
 [[Category: PDP-11 Processors]]

← Older revision		Revision as of 01:35, 19 September 2019
Line 1:		Line 1:
		+	[[Image:M7239KE11-FFIS.jpg\|thumb\|right\|300px\|M7239 card]]
		+
	The '''KE11-F Floating Instruction Set‏‎''' is the optional [[floating point]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]].		The '''KE11-F Floating Instruction Set‏‎''' is the optional [[floating point]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]].

← Older revision		Revision as of 14:05, 16 December 2018
Line 10:		Line 10:

	* "KE11-E and KE11-F Instruction Set Options Manual", EK-KE11E-TM-002		* "KE11-E and KE11-F Instruction Set Options Manual", EK-KE11E-TM-002
		+
		+	[[Category: PDP-11 Processors]]

@@ Line 2: / Line 2: @@
 The '''KE11-F Floating Instruction Set‏‎''' is the optional [[floating point]] unit for the [[KD11-A CPU]] of the [[PDP-11/40]]. It implements the [[PDP-11]] [[FIS floating point]], not the full [[FP11 floating point]].
 Physically, it consists of a single [[DEC card form factor|quad]] board, the M7239, which plugs into a pre-wired slot in the [[Central Processing Unit|CPU]] [[backplane]].
-It requires the installation of the [[KE11-E Extended Instruction Set]], which allows the [[microcode]] of the basic CPU to be extended.
+It requires the installation of the [[KE11-E Extended Instruction Set]], which allows the microcode of the basic CPU to be extended.
 The KE11-F includes its own microcode [[read-only memory|ROM]], which provides an additional 8 bits width of microcode (to control the [[data path]]s and [[register]]s on the M7239), but it also uses microcode stored on the KE11-E, to control registers and data paths elsewhere.