Jnc: /* External links */ Bitsavers has reorganized a bit

2026-10-07T14:37:32Z

External links: Bitsavers has reorganized a bit

← Older revision		Revision as of 14:37, 7 October 2026
Line 41:		Line 41:
	==External links==		==External links==

	* [http://www.bitsavers.org/pdf/dec/unibus/DEC-11-HPWB-D_KW11P_Oct72.pdf KW11-P programmable real-time clock manual] (DEC-11-HPWB-D)		* [http://www.bitsavers.org/pdf/dec/unibus/KW11-P/DEC-11-HPWB-D_KW11P_Oct72.pdf KW11-P programmable real-time clock manual] (DEC-11-HPWB-D)
	* [http://www.bitsavers.org/pdf/dec/unibus/KW11-P_Schem_Aug73.pdf KW11-P programmable real-time clock engineering drawings]		* [http://www.bitsavers.org/pdf/dec/unibus/KW11-P/KW11-P_Schem_Aug73.pdf KW11-P programmable real-time clock engineering drawings]

	[[Category: UNIBUS Peripherals]]		[[Category: UNIBUS Peripherals]]

Jnc: Fairly complete

2022-02-10T12:22:41Z

Fairly complete

New page

The '''KW11-P Programmable Real-Time Clock''' is a [[UNIBUS]] [[peripheral|device]] option which can either provide interval counting, or produce either single or repeated [[interrupt]]s at a programmed rate (at a multiple of the base rate). Four different base clock rates are available:

* 100 KHz
* 10 KHz
* line rate from the [[alternating current|AC]] power provided to the [[power supply]]
* external

The programming interface is fairly simple; there are three [[register]]s:

* control/status
* count set
* counter

The counter register can be set to count up or down, governed by the selected rate; an interrupt can be triggered when it reaches 0 (on overflow or underflow). It can then optionally be automatically reloaded from the count set register.

==Implementation==

Physically, the KW11-P is an [[DEC card form factor|quad]]-height board ('''M7228'''), which plugs into a [[Small Peripheral Controller|SPC]] slot in a [[backplane]].

==Control and Status Register (CSR)==
{{16bit-header}}
| ERR || colspan=7 | Unused || DONE || INTENB || FIX || UP/DN || MODE || colspan=2 | RATE || RUN
{{16bitoctal-bitout}}

*ERR - Overflow/underflow before previous interrupt completed
*DONE - Set on overflow/underflow (causes an interrupt when that happens, if the INTENB bit is set)
*INTENB - Interrupt enable
*FIX - Diagnostic count
*MODE - Count up/down
*MODE - Single/repeat interrupt
*RATE
**00 - 100 KHz
**01 - 10 KHz
**10 - line
**11 - external

All [[bit]]s are read/write, except FIX (write-only), and DONE and ERR (read-only).

==External links==

* [http://www.bitsavers.org/pdf/dec/unibus/DEC-11-HPWB-D_KW11P_Oct72.pdf KW11-P programmable real-time clock manual] (DEC-11-HPWB-D)
* [http://www.bitsavers.org/pdf/dec/unibus/KW11-P_Schem_Aug73.pdf KW11-P programmable real-time clock engineering drawings]

[[Category: UNIBUS Peripherals]]

KW11-P Programmable Real-Time Clock - Revision history

Jnc: /* External links */ Bitsavers has reorganized a bit

Jnc: Fairly complete