KY11-L to CPU interface - Revision history

Jnc: point to relevant section

2022-12-04T14:50:13Z

point to relevant section

Jnc: /* See also */ SACK turnaround and CPU hangs

2022-12-04T14:48:05Z

‎See also: SACK turnaround and CPU hangs

Jnc: Note use of SACK can freeze machines with missing grant cards

2022-03-31T13:55:22Z

Note use of SACK can freeze machines with missing grant cards

Jnc: /* KD11-EA */ Halt Grant requests

2022-03-01T10:53:38Z

‎KD11-EA: Halt Grant requests

Jnc: +KD11-EA

2022-03-01T10:18:13Z

+KD11-EA

Jnc: Jnc moved page KY11 to CPU interface to KY11-L to CPU interface: better name; many KY11s, but only the -LA and -LB use this

2022-03-01T04:18:48Z

Jnc moved page KY11 to CPU interface to KY11-L to CPU interface: better name; many KY11s, but only the -LA and -LB use this

Jnc: Mostly all there

2022-03-01T04:14:53Z

Mostly all there

New page

The [[KY11-LA Operator's Console]] and the [[KY11-LB Programmer's Console]] use the same '''KY11 to CPU interface''' with all the [[PDP-11]] [[Central Processing Unit|CPUs]] which use them: the [[KD11-D CPU]] of the [[PDP-11/04]], the [[KD11-E CPU]] of the [[PDP-11/34]], and the [[KD11-EA CPU]] of the [[PDP-11/34A]].

The common interface of both KY11's to the CPU allows the console to request that the CPU [[halt]]; this is done with the standard [[UNIBUS]] [[signal]], SACK, and a pair of additional signals, Halt Request and Grant. As the names indicate, the latter two request that the main CPU halt, and allow the CPU to acknowledge that it has honoured that request. SACK is used by the console to indicate to the CPU (if asserted) that it should remain halted (with the CPU's [[clock]] inhibited), and when it should resume normal [[execute|execution]] of [[instruction]]s.

Parenthetically, a HALT instruction ''also'' uses this mechanism; decoding of one (by the instruction decoding [[Read-only memory#PROM|PROMs]]) asserts Halt Request directly - there is no [[microcode]] to implement the HALT instruction. When the console ceases to assert SACK, that allows the clock to resume operation, and thus the execution of instructions.

The physical connection from the KY11 to the CPU differs slightly between the KY11-LA and the KY11-LB (all 3 CPUs are identical in how they connect). For the LY11-LA, a [[flat cable]] runs directly from the console to the CPU. For the KY11-LB, a flat cable runs from the console to the M7859 [[printed circuit board|board]], which plugs into the [[Modified UNIBUS Device|MUD]] [[backplane]] holding the CPU (the special [[DD11-P backplane]] for the two -11/34's, and either a DD11-P or either the [[DD11-C backplane|DD11-C]] or [[DD11-D backplane]]s for the -11/04). The M7859 communicates with the CPU over that backplane.

==Documentation==

The KY11 to CPU interface is documented in a number of diverse locations.

===KY11-LB===

In EK-KY1LB-MM, see:

* 5.3.15 "Halt Logic"

===KD11-D===

In EK-KD11D-TM, see:

* 5.5.3.5 "Operate Instructions"
** "Halt Instructions - Enable HLT RQST L"
* 5.9 "Processor Clock"
** "It is turned off ... 7. While BUS SACK is asserted"
* 5.10.3 "Halt Grant Request"

===KD11-E===

In EK-KD11E-TM, see:

* 4.5.3.5 "Operate Instructions"
** "HALT - Enable HLT RQST L"
* 4.9 "Processor Clock"
** "The clock is turned off ... 9. After a Halt instruction is executed"
* 4.10.3 "Halt Grant Request"

==External links==

* [http://www.bitsavers.org/pdf/dec/pdp11/1134/KY11-LB_MaintMan.pdf KY11-LB programmer's console/interface module operation and maintenance manual] (EK-KY1LB-MM-001)
* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KD11D-TM-PRE%20KD11-D%20Processor%20Manual%20(PDP-11-04).pdf KD11-D Processor Manual (PDP-11/04)] (EK-KD11D-TM-PRE)
* [http://www.bitsavers.org/pdf/dec/pdp11/1134/EK-KD11E-TM-001_KD11-E_Central_Processor_Maintenance_Manual_Dec76.pdf KD11-E central processor maintenance manual] (EK-KD11E-TM-001)

[[Category: PDP-11 Processors]]
[[Category: UNIBUS Processors]]

@@ Line 3: / Line 3: @@
 The common interface of both KY11's to the CPU allows the console to request that the CPU [[halt]]; this is done with the standard [[UNIBUS]] [[signal]], SACK, and a pair of additional signals, Halt Request and Grant. As the names indicate, the latter two request that the main CPU halt, and allow the CPU to acknowledge that it has honoured that request. SACK is used by the console to indicate to the CPU (if asserted) that it should remain halted (with the CPU's [[clock]] inhibited), and when it should resume normal [[execute|execution]] of [[instruction]]s.
-The use of SACK to keep the CPU halted means that if a system has an [[M9302 UNIBUS terminator]], and a break in a [[bus grant line]] (e.g. from a missing [[grant continuity card]]), the machine will irretrievably 'freeze'; see [[UNIBUS and QBUS termination]] for an explanation.
+The use of SACK to keep the CPU halted means that if a system has an [[M9302 UNIBUS terminator]], and a break in a [[bus grant line]] (e.g. from a missing [[grant continuity card]]), the machine will irretrievably 'freeze'; see [[UNIBUS and QBUS termination#SACK turnaround and CPU hangs|SACK turnaround and CPU hangs]] for an explanation.
 Parenthetically, a HALT instruction ''also'' uses this mechanism; decoding of one (by the instruction decoding [[Read-only memory#PROM|PROMs]]) asserts Halt Request directly - there is no [[microcode]] to implement the HALT instruction. When the console ceases to assert SACK, that allows the CPU clock to resume operation, and thus the execution of instructions.
@@ Line 55: / Line 55: @@
 * [[M8264 No-SACK Timeout Module]]
 ==External links==

← Older revision		Revision as of 14:48, 4 December 2022
Line 51:		Line 51:

	This text is obviously for the KY11-LA; the KY11-LB will operate identically: when the console releases SACK (e.g. after 'Continue' is entered), the processor resumes operation.		This text is obviously for the KY11-LA; the KY11-LB will operate identically: when the console releases SACK (e.g. after 'Continue' is entered), the processor resumes operation.
		+
		+	==See also==
		+
		+	* [[M8264 No-SACK Timeout Module]]
		+	* [[UNIBUS and QBUS termination]] - in particular, the [[UNIBUS and QBUS termination#SACK turnaround and CPU hangs\|SACK turnaround and CPU hangs]] section

	==External links==		==External links==

@@ Line 3: / Line 3: @@
 The common interface of both KY11's to the CPU allows the console to request that the CPU [[halt]]; this is done with the standard [[UNIBUS]] [[signal]], SACK, and a pair of additional signals, Halt Request and Grant. As the names indicate, the latter two request that the main CPU halt, and allow the CPU to acknowledge that it has honoured that request. SACK is used by the console to indicate to the CPU (if asserted) that it should remain halted (with the CPU's [[clock]] inhibited), and when it should resume normal [[execute|execution]] of [[instruction]]s.
-Parenthetically, a HALT instruction ''also'' uses this mechanism; decoding of one (by the instruction decoding [[Read-only memory#PROM|PROMs]]) asserts Halt Request directly - there is no [[microcode]] to implement the HALT instruction. When the console ceases to assert SACK, that allows the clock to resume operation, and thus the execution of instructions.
+The use of SACK to keep the CPU halted means that if a system has an [[M9302 UNIBUS terminator]], and a break in a [[bus grant line]] (e.g. from a missing [[grant continuity card]]), the machine will irretrievably 'freeze'; see [[UNIBUS and QBUS termination]] for an explanation.
 The physical connection from the KY11 to the CPU differs slightly between the KY11-LA and the KY11-LB (all 3 CPUs are identical in how they connect). For the LY11-LA, a [[flat cable]] runs directly from the console to the CPU. For the KY11-LB, a flat cable runs from the console to the M7859 [[printed circuit board|board]], which plugs into the [[Modified UNIBUS Device|MUD]] [[backplane]] holding the CPU (the special [[DD11-P backplane]] for the two -11/34's, and either a DD11-P or either the [[DD11-C backplane|DD11-C]] or [[DD11-D backplane]]s for the -11/04). The M7859 communicates with the CPU over that backplane.
@@ Line 48: / Line 50: @@
 ** "The user can maintain the processor in this inactive state (Halted) indefinitely. When the HALT switch is released, the user's console releases BUS SACK L, and the processor continues operation"
-This text is obviously for the KY11-LA; the KY11-LB will operate identically: when the console releases SACK, the processor resumes operation.
+This text is obviously for the KY11-LA; the KY11-LB will operate identically: when the console releases SACK (e.g. after 'Continue' is entered), the processor resumes operation.
 ==External links==
@@ Line 57: / Line 59: @@
 * [http://www.bitsavers.org/pdf/dec/pdp11/1134/KD11EA_CPU_Maint.pdf KD11-EA central processor maintenance manual] (EK-KD1EA-MM-001)
-[[Category: PDP-11 Processors]]
+[[Category: PDP-11 UNIBUS Processors]]

@@ Line 46: / Line 46: @@
 ** "The clock is turned off ... 9. After a Halt instruction is executed"
 * 4.10.3 "Halt Grant Requests"
 ==External links==

@@ Line 35: / Line 35: @@
 * 4.9 "Processor Clock"
 ** "The clock is turned off ... 9. After a Halt instruction is executed"
-* 4.10.3 "Halt Grant Request"
+* 4.10.3 "Halt Grant Requests"
 ==External links==
@@ Line 42: / Line 52: @@
 * [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-KD11D-TM-PRE%20KD11-D%20Processor%20Manual%20(PDP-11-04).pdf KD11-D Processor Manual (PDP-11/04)] (EK-KD11D-TM-PRE)
 * [http://www.bitsavers.org/pdf/dec/pdp11/1134/EK-KD11E-TM-001_KD11-E_Central_Processor_Maintenance_Manual_Dec76.pdf KD11-E central processor maintenance manual] (EK-KD11E-TM-001)
 [[Category: PDP-11 Processors]]
 [[Category: UNIBUS Processors]]

← Older revision	Revision as of 04:18, 1 March 2022
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