MJ11 memory system - Revision history

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2024-02-06T01:22:15Z

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	[[Category: PDP-11 Memories]]		[[Category: PDP-11 Memories]]
	~~[[Category: DEC Memories]]~~

Jnc: Better category

2024-02-06T01:18:19Z

Better category

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	* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MJ11%201170%2016K%2032K%20Core%20Memory/01%20MJ11%20Documentation/MJ11-A%20Engineering%20Drawings/ MJ11-A Engineering Drawings]		* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MJ11%201170%2016K%2032K%20Core%20Memory/01%20MJ11%20Documentation/MJ11-A%20Engineering%20Drawings/ MJ11-A Engineering Drawings]

	[[Category: PDP-11 ~~Peripherals~~]]		[[Category: PDP-11 Memories]]
	[[Category: DEC Memories]]		[[Category: DEC Memories]]

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2024-02-05T23:55:08Z

+New Category

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	* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MJ11%201170%2016K%2032K%20Core%20Memory/01%20MJ11%20Documentation/MJ11-A%20Engineering%20Drawings/ MJ11-A Engineering Drawings]		* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MJ11%201170%2016K%2032K%20Core%20Memory/01%20MJ11%20Documentation/MJ11-A%20Engineering%20Drawings/ MJ11-A Engineering Drawings]

	[[Category: PDP-~~11s~~]]		[[Category: PDP-11 Peripherals]]
	[[Category: DEC Memories]]		[[Category: DEC Memories]]

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	* [http://www.bitsavers.org/pdf/dec/pdp11/1170/EK-MJ11-OP-001_UsersMan_Dec76.pdf MJ11 memory system user's manual] (EK-MJ11-OP-001)		* [http://www.bitsavers.org/pdf/dec/pdp11/1170/EK-MJ11-OP-001_UsersMan_Dec76.pdf MJ11 memory system user's manual] (EK-MJ11-OP-001)
	* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MJ11%201170%2016K%2032K%20Core%20Memory/01%20MJ11%20Documentation/MJ11-A%20Engineering%20Drawings/ MJ11-A Engineering Drawings]		* [https://deramp.com/downloads/mfe_archive/011-Digital%20Equipment%20Corporation/08%20PDP-11/05%20Unibus%20Options/MJ11%201170%2016K%2032K%20Core%20Memory/01%20MJ11%20Documentation/MJ11-A%20Engineering%20Drawings/ MJ11-A Engineering Drawings]

	~~{{PDP-11}}~~

	[[Category: PDP-11s]]		[[Category: PDP-11s]]
	[[Category: DEC Memories]]		[[Category: DEC Memories]]

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2021-12-24T12:51:08Z

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			[[Image:M8147MJ11Ctl.jpg\|300px\|thumb\|right\|M8147 Control and Timing card]]

	The '''MJ11 memory system''' was a [[core memory\|core]] [[main memory]] system for the [[PDP-11/70]]. It was 32 bits wide, to interface to the -11/70's Main Memory Bus, and provided byte [[parity]] (4 bits/double-[[word]]). Read, Write, and Exchange cycles were supported.		The '''MJ11 memory system''' was a [[core memory\|core]] [[main memory]] system for the [[PDP-11/70]]. It was 32 bits wide, to interface to the -11/70's Main Memory Bus, and provided byte [[parity]] (4 bits/double-[[word]]). Read, Write, and Exchange cycles were supported.

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	==Implementation==		==Implementation==

	It was housed in a [[BA11-K mounting box]], and used a custom 26-slot [[backplane]] ([[DEC part number]] 70-10497), holding a number of [[DEC card form factor\|hex]] [[printed circuit board\|boards]]. These included a pair of control boards - an M8149 transceiver board, and either an M8147 or M8148 control and timing board (the M8148 could only be used with 32KB core stack modules, whereas the M8147 could be used with either); the Main Memory Bus was carried on [[flat cable]]s, which plugged into [[Berg connector]] headers on the control cards. Data was stored on between 1 and 4 pairs of core stack sets.		[[Image:M8149MJ11Trans.jpg\|300px\|thumb\|right\|M8149 Transceiver card]]

			The MJ11 was housed in a [[BA11-K mounting box]], and used a custom 26-slot [[backplane]] ([[DEC part number]] 70-10497), holding a number of [[DEC card form factor\|hex]] [[printed circuit board\|boards]]. These included a pair of control boards - an M8149 transceiver board, and either an M8147 or M8148 control and timing board (the M8148 could only be used with 32KB core stack modules, whereas the M8147 could be used with either); the Main Memory Bus was carried on [[flat cable]]s, which plugged into [[Berg connector]] headers on the control cards. Data was stored on between 1 and 4 pairs of core stack sets.

	A 32KB core stack set consisted of:		A 32KB core stack set consisted of:
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	The 32KB stack set contains the same boards as those in the [[MM11-U core memory]]; the 64KB stack set contains the same boards as those in the [[MM11-W core memory]].		The 32KB stack set contains the same boards as those in the [[MM11-U core memory]]; the 64KB stack set contains the same boards as those in the [[MM11-W core memory]].

	[[Image:H224-C-core-stack.jpg\|300px\|thumb\|right\|H224-C core stack, showing flat cables]]		[[Image:H224-C-core-stack.jpg\|300px\|thumb\|right\|H224-C core stack, showing inter-card flat cables]]

	In the 64KB set, the H224-C is connected to the G116/G236 cards with '[[over the back]]' flat cables, which carry the [[core memory#Technical details\|sense/inhibit]] signals from the core stack board to the electronics board. This is possibly because the MJ11 backplane was designed for use with the MM11-U board set, and changes in the functional modularization may have made those connections unsuitable for use by the 64KB set.		In the 64KB set, the H224-C is connected to the G116/G236 cards with '[[over the back]]' flat cables, which carry the [[core memory#Technical details\|sense/inhibit]] signals from the core stack board to the electronics board. This is possibly because the MJ11 backplane was designed for use with the MM11-U board set, and changes in the functional modularization may have made those connections unsuitable for use by the 64KB set.

Jnc: Emphasize uses modules in pairs

2021-10-07T18:49:20Z

Emphasize uses modules in pairs

← Older revision		Revision as of 18:49, 7 October 2021
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	The '''MJ11 memory system''' was a [[core memory\|core]] [[main memory]] system for the [[PDP-11/70]]. It was 32 bits wide, to interface to the -11/70's Main Memory Bus, and provided byte [[parity]] (4 bits/double-word). Read, Write, and Exchange cycles were supported.		The '''MJ11 memory system''' was a [[core memory\|core]] [[main memory]] system for the [[PDP-11/70]]. It was 32 bits wide, to interface to the -11/70's Main Memory Bus, and provided byte [[parity]] (4 bits/double-[[word]]). Read, Write, and Exchange cycles were supported.

	It came in two variants, the '''MJ11-A''' (which used 32KB core stack modules), and the '''MJ11-B''' (which used 64KB modules). A maximum of eight MJ11 systems could be installed on a single machine, for a maximum of 2MB of memory when using 32KB modules, or slightly less than 4MB with 64KB modules.		It came in two variants, the '''MJ11-A''' (which used 32KB core stack modules), and the '''MJ11-B''' (which used 64KB modules). Both kinds of modules had to be installed in pairs (since they were 16 bits wide, and the MJ11 dealt in 32-bit words).

			A maximum of eight MJ11 systems could be installed on a single machine, for a maximum of 2MB of memory when using 32KB modules, or slightly less than 4MB with 64KB modules.

	==Implementation==		==Implementation==

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+core stack img

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	The 32KB stack set contains the same boards as those in the [[MM11-U core memory]]; the 64KB stack set contains the same boards as those in the [[MM11-W core memory]].		The 32KB stack set contains the same boards as those in the [[MM11-U core memory]]; the 64KB stack set contains the same boards as those in the [[MM11-W core memory]].

	In the 64KB set, the H224-C is connected to the ~~other two~~ cards with '[[over the back]]' flat cables~~; this~~ is possibly because the MJ11 backplane was designed for use with the MM11-U board set, and changes in the functional modularization may have made those connections unsuitable for use by the 64KB set.		[[Image:H224-C-core-stack.jpg\|300px\|thumb\|right\|H224-C core stack, showing flat cables]]

			In the 64KB set, the H224-C is connected to the G116/G236 cards with '[[over the back]]' flat cables, which carry the [[core memory#Technical details\|sense/inhibit]] signals from the core stack board to the electronics board. This is possibly because the MJ11 backplane was designed for use with the MM11-U board set, and changes in the functional modularization may have made those connections unsuitable for use by the 64KB set.

	The H224-C core stack is connected to the G236 with a 20-pin cable, and to the G116 with three 40-pin connectors. The cable end on the G116/G236 end is a standard Berg header, but on the H224-C end, the cables are soldered directly to the board, not plugged into a connector.		The H224-C core stack is connected to the G236 with a 20-pin cable, and to the G116 with three 40-pin connectors. The cable end on the G116/G236 end is a standard Berg header, but on the H224-C end, the cables are soldered directly to the board, not plugged into a connector.

Jnc: /* Further reading */ fiche only

2021-09-27T13:36:52Z

Jnc: /* Further reading */ +MJ11 Memory System Maintenance Manual

2021-09-27T12:35:00Z

Further reading: +MJ11 Memory System Maintenance Manual

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	* [[MK11 memory system]]		* [[MK11 memory system]]

			==Further reading==

			* ''MJ11 Memory System Maintenance Manual'' (EK-MJ11-MM-002) - not available

	==External links==		==External links==

Jnc: /* Implementation */ Add board layout

2021-09-26T11:59:11Z

Implementation: Add board layout

@@ Line 5: / Line 5: @@
 ==Implementation==
-It was housed in a [[BA11-K]] mounting box, and used a custom [[backplane]] ([[DEC part number]] 70-10497). A backplane held a pair of control boards (an M8149 transceiver board, and either an M8147 or M8148 control and timing board; the M8148 could only be used with 32KB core stack modules, whereas the M8147 could be used with either), and between 1 and 4 pairs of core stack sets.
+It was housed in a [[BA11-K mounting box]], and used a custom 26-slot [[backplane]] ([[DEC part number]] 70-10497), holding a number of [[DEC card form factor|hex]] [[printed circuit board|boards]]. These included a pair of control boards - an M8149 transceiver board, and either an M8147 or M8148 control and timing board (the M8148 could only be used with 32KB core stack modules, whereas the M8147 could be used with either); the Main Memory Bus was carried on [[flat cable]]s, which plugged into [[Berg connector]] headers on the control cards. Data was stored on between 1 and 4 pairs of core stack sets.
 A 32KB core stack set consisted of:
@@ Line 21: / Line 21: @@
 The 32KB stack set contains the same boards as those in the [[MM11-U core memory]]; the 64KB stack set contains the same boards as those in the [[MM11-W core memory]].
-In the 64KB set, the H224-C is connected to the other two cards with '[[over the back]]' cables; this is possibly because the MJ11 backplane was designed for use with the MM11-U board set, and changes in the functional modularization may have made those connections unsuitable for use by the 64KB set.
+In the 64KB set, the H224-C is connected to the other two cards with '[[over the back]]' flat cables; this is possibly because the MJ11 backplane was designed for use with the MM11-U board set, and changes in the functional modularization may have made those connections unsuitable for use by the 64KB set.
-The H224-C core stack is connected to the G236 with a 20-pin cable, and to the G116 with three 40-pin connectors. The cable end on the G116/G236 is a standard [[Berg connector]] header, but on the H224-C end, the cables are soldered directly to the board, not plugged into a connector.
+The H224-C core stack is connected to the G236 with a 20-pin cable, and to the G116 with three 40-pin connectors. The cable end on the G116/G236 end is a standard Berg header, but on the H224-C end, the cables are soldered directly to the board, not plugged into a connector.
 The stack sets were placed in the backplane from the outer edges (on each side, since they had to be installed in pairs of sets) toward the center; the control boards went in the two center slots. Interestingly, the order within each group of 3 boards was not mirror-imaged; the X-Y driver, core stack, and sense/inhibit module were in the same order on both sides of the center.
 ==Upgrades==

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	==Further reading==		==Further reading==

	* ''MJ11 Memory System Maintenance Manual'' (EK-MJ11-MM-002) - ~~not~~ available		* ''MJ11 Memory System Maintenance Manual'' (EK-MJ11-MM-002) - only available in microfiche

	==External links==		==External links==