MLH-DH/LSI11 Multiple Channel Controller - Revision history

Jnc: more specific category

2021-11-08T14:35:13Z

more specific category

Larsbrinkhoff: Meow.

2021-11-08T10:16:30Z

Meow.

Jnc: Link 1822

2021-11-02T19:07:01Z

Link 1822

Jnc: Fairly complete

2021-10-30T21:05:02Z

Fairly complete

New page

The '''MLH-DH/LSI11 Multiple Channel Controller''' is a [[Direct Memory Access|DMA]] [[QBUS]] [[IMP interface]] produced by [[Advanced Computer Communications‎|ACC]] to allow a QBUS machine to connect to an [[ARPANET]] [[Interface Message Processor|IMP]].

It consists of 2 or more [[DEC card form factor|dual]] [[printed circuit board]]s (one which is the QBUS interface, the MICRO-11 [[device controller|controller]], joined to one or more [[Host-to-IMP Protocol|1822 interface]] cards), connected together by a [[flat cable]] running to 40-pin [[Berg connector]] headers on the card ends. Level converters allow use as either a Local Host or Distant Host interface; a cable from a further 26-pin Berg connector header leads to the standard 1822 Amphenol connector, which will be mounted on the rear bulkhead.

It was created by ACC under contract from [[SRI International|SRI]]. It is [[program compatible]] with ACC's earlier [[UNIBUS]] [[LH-DH/11 Local/Distant Host Controller]].

==Registers==

{| border=1
! Register !! Abbreviation !! Address
|-
|Receive Control Status Register || RCSR || 0767600
|-
|Receive Data Buffer Register || RDBR || 0767602
|-
|Receive Current Address Register || RCAR || 0767604
|-
|Receive Word Count Register || RWCR || 0767606
|-
|Transmit Control Status Register || CSRO || 0767610
|-
|Transmit Data Buffer Register || DBRO || 0767612
|-
|Transmit Current Address Register || CWAO || 0767614
|-
|Transmit Word Count Register || WCO || 0767616
|}

===0767600: Receive Control Status Register (RCSR)===
{{16bit-header}}
| RERR || MTO || REOM || Unused || HRYO || IRYO || RYER || RBF || RRDY || RIEN || colspan=2 | XBA16-17 || RCVEN || HRLY || RST || RGO
{{16bit-bitout}}

* RERR - Error Flag
* MTO - Non-Existent Memory
* REOM - End of Message
* HRYO - Host Ready
* IRYO - IMP Not Ready
* RYER - Receive Master Ready Error
* RBF - Input Data Buffer Full
* RRDY - Device Ready
* RIEN - Interrupt Enable
* RCVEN - Store Enable
* HRLY - Host Relay Control
* RST - Input Interface Reset

===0767602: Receive Data Buffer Register (RDBR)===
{{16bit-header}}
| colspan=16 | Data15 <---> Data00
{{16bit-bitout}}

Read only [[register]].

===0767604: Receive Current Address Register (RCAR)===
{{16bit-header}}
| colspan=16 | CA15 <---> CA00
{{16bit-bitout}}

===0767606: Receive Word Count Register (RWCR)===
{{16bit-header}}
| colspan=16 | WC15 <---> WC00
{{16bit-bitout}}

===0767610: Transmit Control Status Register (TCSR)===
{{16bit-header}}
| TERR || TMTO || colspan=4 | Unused || RYER || TBE || TRDY || TIEN || colspan=2 | XBA16-17 || BBAK || LBIT || RST || TGO
{{16bit-bitout}}

* TERR - Error Flag
* TMTO - Non-Existent Memory
* RYER - Transmit Master Ready Error
* TBE - Output Data Buffer Empty
* TRDY - Device Ready
* TIEN - Interrupt Enable
* BBAK - Bus-Back Mode
* LBIT - Enable Last Bit
* RST - Output Interface Reset

===0767612: Transmit Data Buffer Register (TDBR)===
{{16bit-header}}
| colspan=16 | Data15 <---> Data00
{{16bit-bitout}}

Write only register.

===0767614: Transmit Current Address Register (TCAR)===
{{16bit-header}}
| colspan=16 | CA15 <---> CA00
{{16bit-bitout}}

===0767616: Transmit Word Count Register (TWCR)===
{{16bit-header}}
| colspan=16 | WC15 <---> WC00
{{16bit-bitout}}

==Further reading==
* MDMA Multichannel DMA Controller for LSI-11 Maintenance Manual
* XQ/1822 Maintenance Manual


[[Category: QBUS Network Interfaces]]

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	[[Category: QBUS Network Interfaces]]		[[Category: QBUS Network Interfaces]]
		+	[[Category: ARPANET]]

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 <!--==External links==
 -->
 [[Category: QBUS Network Interfaces]]

@@ Line 1: / Line 1: @@
 The '''MLH-DH/LSI11 Multiple Channel Controller''' is a [[Direct Memory Access|DMA]] [[QBUS]] [[IMP interface]] produced by [[Advanced Computer Communications‎|ACC]] to allow a QBUS machine to connect to an [[ARPANET]] [[Interface Message Processor|IMP]].
-It consists of 2 or more [[DEC card form factor|dual]] [[printed circuit board]]s (one which is the QBUS interface, the MICRO-11 [[device controller|controller]], joined to one or more [[Host-to-IMP Protocol|1822 interface]] cards), connected together by a [[flat cable]] running to 40-pin [[Berg connector]] headers on the card ends. Level converters allow use as either a Local Host or Distant Host interface; a cable from a further 26-pin Berg connector header leads to the standard 1822 Amphenol connector, which will be mounted on the rear bulkhead.
+It consists of 2 or more [[DEC card form factor|dual]] [[printed circuit board]]s (one which is the QBUS interface, the MICRO-11 [[device controller|controller]], joined to one or more [[1822 interface]] cards), connected together by a [[flat cable]] running to 40-pin [[Berg connector]] headers on the card ends. Level converters allow use as either a Local Host or Distant Host interface; a cable from a further 26-pin Berg connector header leads to the standard 1822 Amphenol connector, which will be mounted on the rear bulkhead.
 It was created by ACC under contract from [[SRI International|SRI]]. It is [[program compatible]] with ACC's earlier [[UNIBUS]] [[LH-DH/11 Local/Distant Host Controller]].
@@ Line 98: / Line 98: @@
 * XQ/1822 Maintenance Manual
 <!--==External links==
 -->
 [[Category: QBUS Network Interfaces]]