MS11-L MOS memory - Revision history

Jnc: Avoid dab

2022-09-21T19:15:14Z

Avoid dab

← Older revision		Revision as of 19:15, 21 September 2022
Line 5:		Line 5:
	Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB.		Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB.

	It plugs into a [[Modified UNIBUS Device\|MUD]] [[backplane]] (only; not [[Small Peripheral Controller\|SPC]]). It is a single [[DEC card form factor\|hex]] card, the M7891, so it cannot go in the end slots of the backplane.		It plugs into a [[Modified UNIBUS Device\|MUD]] [[backplane]] (''only''; not [[Small Peripheral Controller\|SPC]]). It is a single [[DEC card form factor\|hex]] card, the M7891, so it cannot go in the end slots of the backplane.

	The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).		The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[memory refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).

	It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, e.g. in the [[BA11-A mounting box]], the '15V' pins provide 12V). The board has provision to use battery backup power to retain data during a power outage. Power requirements are 1.5-1.8A of +5V, 1-1.3A of +5VBB, 9-20mA of -12/-15V (depending on size, i.e. number of MOS memory chips), and 485-700 mA of +12/+15 (when active; depending on size).		It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, e.g. in the [[BA11-A mounting box]], the '15V' pins provide 12V). The board has provision to use battery backup power to retain data during a power outage. Power requirements are 1.5-1.8A of +5V, 1-1.3A of +5VBB, 9-20mA of -12/-15V (depending on size, i.e. number of MOS memory chips), and 485-700 mA of +12/+15 (when active; depending on size).

Jnc: /* External links */ +FMPS, manuals

2022-04-03T10:23:42Z

External links: +FMPS, manuals

← Older revision		Revision as of 10:23, 3 April 2022
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	The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).		The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).

	It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, the 15V pins provide 12V). The board has provision to use battery backup power to retain data during a power outage. Power requirements are 1.5-1.8A of +5V, 1-1.3A of +5VBB, 9-20mA of -12/-15V (depending on size, i.e. number of MOS memory chips), and 485-700 mA of +12/+15 (when active; depending on size).		It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, e.g. in the [[BA11-A mounting box]], the '15V' pins provide 12V). The board has provision to use battery backup power to retain data during a power outage. Power requirements are 1.5-1.8A of +5V, 1-1.3A of +5VBB, 9-20mA of -12/-15V (depending on size, i.e. number of MOS memory chips), and 485-700 mA of +12/+15 (when active; depending on size).

	~~{{PDP~~-~~11}}~~		==External links==

			* [http://bitsavers.org/pdf/dec/pdp11/memory/EK-MS11L-UG-001.pdf MS11-L MOS memory user's guide] (EK-MS11L-UG-001)
			* [http://www.bitsavers.org/www.computer.museum.uq.edu.au/pdf/EK-MS11L-TM-001%20MS11-L%20MOS%20Memory%20Technical%20Manual.pdf MS11-L MOS memory technical manual] (EK-MS11L-TM-001)
			* [http://bitsavers.org/pdf/dec/pdp11/memory/MP00672_MS11L_engDrw.pdf MS11-L Field Maintenance Print Set] (MP00672)

	[[Category: UNIBUS Memories]]		[[Category: UNIBUS Memories]]
	[[Category: EUB Memories]]		[[Category: EUB Memories]]

Jnc: typo

2020-01-26T12:37:44Z

typo

← Older revision		Revision as of 12:37, 26 January 2020
Line 1:		Line 1:
	[[Image:MS11-L.jpg\|300px\|thumb\|right\|MS11-L board]]		[[Image:MS11-L.jpg\|300px\|thumb\|right\|MS11-L board]]

	The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used on-board[[parity]] for error detection.		The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used on-board [[parity]] for error detection.

	Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB.		Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB.

Jnc: +Image

2020-01-25T18:53:56Z

+Image

← Older revision		Revision as of 18:53, 25 January 2020
Line 1:		Line 1:
			[[Image:MS11-L.jpg\|300px\|thumb\|right\|MS11-L board]]

	The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used on-board[[parity]] for error detection.		The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used on-board[[parity]] for error detection.

Jnc: current rqmts

2020-01-25T15:24:31Z

current rqmts

← Older revision		Revision as of 15:24, 25 January 2020
Line 1:		Line 1:
	The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used [[parity]] for error detection.		The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used on-board[[parity]] for error detection.

	Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB~~. All versions include on-board [[parity]] support~~.		Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB.

	It plugs into a [[Modified UNIBUS Device\|MUD]] [[backplane]] (only; not [[Small Peripheral Controller\|SPC]]). It is a single [[DEC card form factor\|hex]] card, the M7891, so it cannot go in the end slots of the backplane.		It plugs into a [[Modified UNIBUS Device\|MUD]] [[backplane]] (only; not [[Small Peripheral Controller\|SPC]]). It is a single [[DEC card form factor\|hex]] card, the M7891, so it cannot go in the end slots of the backplane.
Line 7:		Line 7:
	The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).		The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).

	It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, the 15V pins provide 12V). The board has provision to use battery backup power to retain data during a power outage.		It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, the 15V pins provide 12V). The board has provision to use battery backup power to retain data during a power outage. Power requirements are 1.5-1.8A of +5V, 1-1.3A of +5VBB, 9-20mA of -12/-15V (depending on size, i.e. number of MOS memory chips), and 485-700 mA of +12/+15 (when active; depending on size).

	{{PDP-11}}		{{PDP-11}}

Jnc: Parity

2020-01-25T13:03:15Z

Parity

← Older revision		Revision as of 13:03, 25 January 2020
Line 1:		Line 1:
	The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]].		The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]. Configuration is by [[Dual Inline Package\|DIP]] switches. It used [[parity]] for error detection.

	Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB. All versions include on-board [[parity]] support.		Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB. All versions include on-board [[parity]] support.
Line 7:		Line 7:
	The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).		The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).

	It can use ''either'' +/-15V or +/12V to power the memory chips (in some MUD slots, the 15V pins provide 12V). The board has provision to use battery backup power to retain data during a power outage~~. Configuration is by [[Dual Inline Package\|DIP]] switches~~.		It can use ''either'' +/-15V or +/-12V to power the memory chips (in some MUD slots, the 15V pins provide 12V). The board has provision to use battery backup power to retain data during a power outage.

	{{PDP-11}}		{{PDP-11}}

Jnc: Dual voltage

2020-01-22T14:18:49Z

Dual voltage

← Older revision		Revision as of 14:18, 22 January 2020
Line 7:		Line 7:
	The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).		The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).

	The board has provision to use battery backup power to retain data during a power outage. Configuration is by [[Dual Inline Package\|DIP]] switches.		It can use ''either'' +/-15V or +/12V to power the memory chips (in some MUD slots, the 15V pins provide 12V). The board has provision to use battery backup power to retain data during a power outage. Configuration is by [[Dual Inline Package\|DIP]] switches.

	{{PDP-11}}		{{PDP-11}}

Jnc: +cat

2018-10-16T23:29:57Z

+cat

← Older revision		Revision as of 23:29, 16 October 2018
Line 12:		Line 12:

	[[Category: UNIBUS Memories]]		[[Category: UNIBUS Memories]]
			[[Category: EUB Memories]]

Jnc: clarify

2018-10-16T16:13:30Z

clarify

← Older revision		Revision as of 16:13, 16 October 2018
Line 5:		Line 5:
	It plugs into a [[Modified UNIBUS Device\|MUD]] [[backplane]] (only; not [[Small Peripheral Controller\|SPC]]). It is a single [[DEC card form factor\|hex]] card, the M7891, so it cannot go in the end slots of the backplane.		It plugs into a [[Modified UNIBUS Device\|MUD]] [[backplane]] (only; not [[Small Peripheral Controller\|SPC]]). It is a single [[DEC card form factor\|hex]] card, the M7891, so it cannot go in the end slots of the backplane.

	The access time is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the cycle time is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); ~~cycle~~ time is 14.5 μsec (typical), 13.5 μsec (minimum).		The [[access time]] is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the [[cycle time]] is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); the time for a complete refresh pass is 14.5 μsec (typical), 13.5 μsec (minimum).

	The board has provision to use battery backup power to retain data during a power outage. ~~Configuation~~ is by [[Dual Inline Package\|DIP]] switches.		The board has provision to use battery backup power to retain data during a power outage. Configuration is by [[Dual Inline Package\|DIP]] switches.

	{{PDP-11}}		{{PDP-11}}

	[[Category: UNIBUS Memories]]		[[Category: UNIBUS Memories]]

Jnc: Kinda important, move up

2018-05-22T20:28:25Z

Kinda important, move up

← Older revision		Revision as of 20:28, 22 May 2018
Line 1:		Line 1:
	The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]].		The '''MS11-L''' was final [[UNIBUS]] [[main memory]] from [[Digital Equipment Corporation\|DEC]]; a single card can hold enough [[Metal Oxide Semiconductor\|MOS]] [[Dynamic RAM\|DRAM]] [[integrated circuit\|chips]] to fill the entire UNIBUS [[address space]]. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]].

	Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB. All versions include on-board [[parity]] support.		Fully populated with 16Kx1 chips, it is known as the '''MS11-LD''', and holds 256K [[byte]]s. The quarter-, half- and three-quarter-populated versions are the '''MS11-LA''', '''-LB''' and '''-LC''', respectively; with 64KB, 128KB and 192KB. All versions include on-board [[parity]] support.
Line 7:		Line 7:
	The access time is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the cycle time is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); cycle time is 14.5 μsec (typical), 13.5 μsec (minimum).		The access time is 385 nsec (typical; 1025 nsec maximum on [[refresh]] conflict), and the cycle time is 510 nsec (1050 nsec maximum on refresh conflict). Refresh time is 570 nsec (typical; 610 nsec maximum); cycle time is 14.5 μsec (typical), 13.5 μsec (minimum).

	The board has provision to use battery backup power to retain data during a power outage. Configuation is by [[Dual Inline Package\|DIP]] switches~~. It had a [[jumper]] option to enable use on an [[Extended UNIBUS]]~~.		The board has provision to use battery backup power to retain data during a power outage. Configuation is by [[Dual Inline Package\|DIP]] switches.

	{{PDP-11}}		{{PDP-11}}

	[[Category: UNIBUS Memories]]		[[Category: UNIBUS Memories]]