MSV11-P MOS Random-Access Memory - Revision history

Jnc: /* Further reading */ +Differences Between MSVI1-L and MSV11-P Memories

2024-07-25T21:36:48Z

‎Further reading: +Differences Between MSVI1-L and MSV11-P Memories

Jnc: /* External links */ +manual, FMPS

2023-07-02T19:23:43Z

‎External links: +manual, FMPS

Jnc: oops

2020-05-09T12:27:23Z

oops

Jnc: +image

2020-05-08T22:18:55Z

+image

Jnc: basic info

2020-05-07T11:41:07Z

basic info

New page

The '''MSV11-P''' (M8067) is a [[DEC card form factor|quad]]-height [[QBUS]] [[Dynamic RAM|DRAM]] [[main memory]] card. The MSV11-PL (M8067-Lx) holds 512 KBytes when fully populated with 64K DRAMs [[integrated circuit|chips]], the MSV11-PK (M8067-Kx) is half-populated (the only partially-filled configuration allowed) and holds 256 Kbytes. (The 'x' in the board identifier is a capital letter which identifies the manufacturer of the DRAM chips.)

The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, with 2 additional bits for [[parity]] (1 per [[byte]]). It can be configured as either a [[QBUS#Variable address size|Q18]] card, or a Q22 card; the -PK ''must'' be configured as a Q22 card due to its size. It can also be configured for use either in a [[QBUS#Backplanes|Q/CD backplane]] or a [[QBUS#Backplanes|Q/Q backplane]]. .

==Configuration==

The card is configured by [[jumper]]s on [[wire-wrap]] posts; it is possible to set:
* the starting address;
* the size (256KB or 512KB);
* the CSR address;

* enable wrong parity.


==Further reading==

* ''MSV11-P User Guide'', EK-MSV0P-UG
* ''MSV11-P Field Maintenance Printset'' (MP-01239)

{{PDP-11}}

[[Category: QBUS Memories]]

← Older revision		Revision as of 22:18, 8 May 2020
Line 1:		Line 1:
−	~~<!--~~ [[Image:MSV11-P.jpg\|thumb\|250px\|right\|MSV11-P card]] ~~-->~~	+	[[Image:MSV11-P.jpg\|thumb\|250px\|right\|MSV11-PK card]]

	The '''MSV11-P''' (M8067) is a [[DEC card form factor\|quad]]-height [[QBUS]] [[Dynamic RAM\|DRAM]] [[main memory]] card. The MSV11-PL (M8067-Lx) holds 512 KBytes when fully populated with 64K DRAMs [[integrated circuit\|chips]], the MSV11-PK (M8067-Kx) is half-populated (the only partially-filled configuration allowed) and holds 256 Kbytes. (The 'x' in the board identifier is a capital letter which identifies the manufacturer of the DRAM chips.)		The '''MSV11-P''' (M8067) is a [[DEC card form factor\|quad]]-height [[QBUS]] [[Dynamic RAM\|DRAM]] [[main memory]] card. The MSV11-PL (M8067-Lx) holds 512 KBytes when fully populated with 64K DRAMs [[integrated circuit\|chips]], the MSV11-PK (M8067-Kx) is half-populated (the only partially-filled configuration allowed) and holds 256 Kbytes. (The 'x' in the board identifier is a capital letter which identifies the manufacturer of the DRAM chips.)

@@ Line 75: / Line 75: @@
 The following 256K DRAM chips have been observed to be used: MB81256-15 (Fujitsu). M5K4164ANP-15P (Micron Technologies), NEC D4164C211 (NEC Electronics). HM50256-15 (Hitachi), TMS4256-15NL (Texas Instruments)
 Note that some of these parts are 120 nsec parts, while others are 150 nsec; the faster parts do not seem to be necessary, or give any advantage. -->
 ==External links==

@@ Line 76: / Line 76: @@
 Note that some of these parts are 120 nsec parts, while others are 150 nsec; the faster parts do not seem to be necessary, or give any advantage. -->
-==Further reading==
+==External links==
-* ''MSV11-P User Guide'', EK-MSV0P-UG
+* [http://bitsavers.org/pdf/dec/qbus/EK-MSV0P-UG-001_MSV11P_Aug81.pdf MSV11-P User Guide] (EK-MSV0P-UG-001)
-* ''MSV11-P Field Maintenance Printset'' (MP-01239)
+* [https://manx-docs.org/collections/hcps/msv11p.pdf MSV11-P Field Maintenance Print Set] (MP01239)
 [[Category: QBUS Memories]]

@@ Line 3: / Line 3: @@
 The '''MSV11-P''' (M8067) is a [[DEC card form factor|quad]]-height [[QBUS]] [[Dynamic RAM|DRAM]] [[main memory]] card. The MSV11-PL (M8067-Lx) holds 512 KBytes when fully populated with 64K DRAMs  [[integrated circuit|chips]], the MSV11-PK (M8067-Kx) is half-populated (the only partially-filled configuration allowed) and holds 256 Kbytes. (The 'x' in the board identifier is a capital letter which identifies the manufacturer of the DRAM chips.)
-The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, with 2 additional bits for [[parity]] (1 per [[byte]]). It can be configured as either a [[QBUS#Variable address size|Q18]] card, or a Q22 card; the -PK ''must'' be configured as a Q22 card due to its size. It can also be configured for use either in a [[QBUS#Backplanes|Q/CD backplane]] or a [[QBUS#Backplanes|Q/Q backplane]]. <!--; it reportedly supports QBUS block mode-->.
+The memory is arranged as 2 banks, each 16 data bits (1 [[PDP-11]] [[word]]) wide, with 2 additional bits for [[parity]] (1 per [[byte]]). It can be configured as either a [[QBUS#Variable address size|Q18]] card, or a Q22 card; the -PL ''must'' be configured as a Q22 card due to its size. It can also be configured for use either in a [[QBUS#Backplanes|Q/CD backplane]] or a [[QBUS#Backplanes|Q/Q backplane]]. <!--; it reportedly supports QBUS block mode-->.
 ==Configuration==