Micro-LINC 300 - Revision history

Larsbrinkhoff: /* Memory banks */ Fix wording.

2025-11-19T10:08:26Z

‎Memory banks: Fix wording.

Larsbrinkhoff: More details.

2025-11-15T15:54:37Z

More details.

Larsbrinkhoff: Work in progress to reverse engineer the additions over a classic LINC.

2025-11-15T13:19:39Z

Work in progress to reverse engineer the additions over a classic LINC.

New page

The '''micro-LINC 300''' was a [[LINC]] compatible computer by SPEaR, Inc. It came with 4K memory, expandable to 32K.

==Instruction set additions==

===Memory banks===

The [[primary memory]]] can be up to 32K, divided into 32 1K pages. There are two five-bit registers, '''LP''' and '''UP'''. The '''LMB''' and '''UMB''' instructions set the lower and upper memory banks, i.e. LP or UP. Both instructions take a five-bit page number. The '''Z''' register is set to the previous contents of the page register.

===Flag===

There is an additional '''flag''' register, which is a single bit. The '''MSC 2''' instruction sets the flag, and the '''MSC 12''' clears it. '''SKP 17''' skips if the flag is set.

===Buffered tape===

Tape transfers can run in parallel with the processor. There is a new tape accumulator, '''TA'''. '''MSC 4''' transfers the TA to the regular accumulator. The '''MSC 3''' instruction makes a following tape instruction not pause. The '''SKP 16''' instruction skips if the tape is busy.

===Disable interrupts===

The '''MSC 7''' instruction disables interrupts.

@@ Line 7: / Line 7: @@
 ===Memory banks===
-The [[primary memory]] can be up to 32K, divided into 32 1K pages.  There are two five-bit registers, '''LP''' and '''UP'''.  The '''LMB''' and '''UMB''' instructions set the lower and upper memory banks, i.e. LP or UP.  Both instructions take a five-bit page number.  The '''Z''' register is set an instruction code that will restore the previous bank, i.e. an LMB or UMB instruction with the previous page.
+The [[primary memory]] can be up to 32K, divided into 32 1K "pages".  There are two five-bit registers, '''LP''' and '''UP'''.  The '''LMB''' and '''UMB''' instructions take a five-bit page number and set the lower and upper memory banks, i.e. LP or UP.  Both instructions set the '''Z''' register to an instruction code that will restore the previous bank, i.e. an LMB or UMB instruction with the previous page.
 ===Flag===

@@ Line 1: / Line 1: @@
-The '''micro-LINC 300''' was a [[LINC]] compatible computer by SPEaR, Inc.  It came with 4K memory, expandable to 32K.
+The '''micro-LINC 300''' was a [[LINC]] compatible computer by [[SPEaR, Inc]].  It was implemented with [[Motorola]] [[Emitter-coupled logic|ECL]] parts and came with 4K memory, expandable to 32K.
 ==Instruction set additions==
 ===Memory banks===
-The [[primary memory]]] can be up to 32K, divided into 32 1K pages.  There are two five-bit registers, '''LP''' and '''UP'''.  The '''LMB''' and '''UMB''' instructions set the lower and upper memory banks, i.e. LP or UP.  Both instructions take a five-bit page number.  The '''Z''' register is set to the previous contents of the page register.
+The [[primary memory]] can be up to 32K, divided into 32 1K pages.  There are two five-bit registers, '''LP''' and '''UP'''.  The '''LMB''' and '''UMB''' instructions set the lower and upper memory banks, i.e. LP or UP.  Both instructions take a five-bit page number.  The '''Z''' register is set an instruction code that will restore the previous bank, i.e. an LMB or UMB instruction with the previous page.
 ===Flag===
@@ Line 13: / Line 15: @@
 ===Buffered tape===
-Tape transfers can run in parallel with the processor.  There is a new tape accumulator, '''TA'''.  '''MSC 4''' transfers the TA to the regular accumulator.  The '''MSC 3''' instruction makes a following tape instruction not pause.  The '''SKP 16''' instruction skips if the tape is busy.
+Tape transfers can run in parallel with the processor.  There is a new tape accumulator, '''TA'''.  '''MSC 4''' pauses if the tape is busy, and then transfers the TA to the regular accumulator.  The '''MSC 3''' instruction makes a following tape instruction not pause.  The '''SKP 16''' instruction skips if the tape is busy.
 ===Disable interrupts===
 The '''MSC 7''' instruction disables interrupts.