Motorola MC68030 - Revision history

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2022-03-04T18:39:22Z

Corral external links

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2022-03-02T23:57:14Z

‎links to protoypes and data sheets

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2018-10-28T02:17:34Z

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{{Infobox CPU
| name = MC68030
| manufacturer = [[Motorola]]
| family = [[Motorola M68000 Family]]
| architecture = 32-bit
| address bus = 32-bit
| data bus = 32-bit
| year introduced = 1987
| cache = 256 byte icache+dcache
| registers = 15 general 32-bit registers (8 data, 7 address)
| clock speed = 16, 20, 25, 33, 40, 50 MHz
}}

The '''Motorola MC68030''' is a 32-[[bit]] [[microprocessor]] in the [[Motorola M68000 Family]], the successor to the [[Motorola MC68020|68020]]. Later members include the [[Motorola MC68040|68040]] and [[Motorola MC68060|68060]].

Performance was increased over earlier members in part by the increased use of [[cache|caching]]; the MC68030 included an additional separate 256-byte cache for data.

It was the first family member to include [[memory management]] on the main chip. It does not include [[floating point]]; a separate floating point chip must be used if [[hardware]] floating point is desired.

It was used in a number of [[Macintosh]], [[Amiga]] and later [[Atari]] [[personal computer]]s, and also [[workstation]]s from [[NeXT Computer, Inc|NeXT]].

Downgraded versions which omitted the [[memory management]] were produced.

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[[Category:Microprocessors]]

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 The '''Motorola MC68030''' is a 32-[[bit]] [[microprocessor]] in the [[Motorola M68000 Family]], the successor to the [[Motorola MC68020|68020]]. Later members include the [[Motorola MC68040|68040]] and [[Motorola MC68060|68060]].
-The internal [[architecture]] was similar to the 68020; performance was increased in part by the increased use of [[cache|caching]]; the MC68030 included an additional separate 256-byte cache for data. The MC68030 Data sheet gives a detailed description of the organization of its caches, and pipe-lining. [http://www.bitsavers.org/components/motorola/68000/MC68030_Data_Sheet_1991.pdf MC68030 Data sheet]
+The internal [[architecture]] was similar to the 68020; performance was increased in part by the increased use of [[cache|caching]]; the MC68030 included an additional separate 256-byte cache for data. The MC68030 Data sheet (below) gives a detailed description of the organization of its caches, and [[pipeline|pipe-lining]].
 It was the first family member to include [[memory management]] on the main chip. It did not include [[floating point]]; a separate floating point chip had to be used if [[hardware]] floating point was desired.
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 It was used in a number of [[Macintosh]], [[Amiga]] and later [[Atari]] [[personal computer]]s, and also [[workstation]]s from [[NeXT Computer, Inc|NeXT]].
-The prototyping of this processor, occurring before modern silicon libraries were designed, was debugged in TTL Logic. [https://retrocomputingforum.com/t/68030-prototype-at-1-mhz-18-boards-of-ttl/1387 MC68030 1Mhz Prototype]
+The prototyping of this processor, occurring before modern silicon libraries were designed, was debugged in [[Transistor-transistor logic|TTL]] [[logic]] (below).
-Downgraded versions which omitted the [[memory management]] were produced for embedded systems.
+Downgraded versions which omitted the [[memory management]] were produced for [[embedded system]]s.
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 [[Category: Motorola Microprocessors]]

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