National Semiconductor NS23C QBUS memory - Revision history

Jnc: Avoid dab

2022-09-22T12:12:10Z

Avoid dab

Jnc: /* External links */ better copy, includes prints

2021-11-19T21:45:05Z

‎External links: better copy, includes prints

Jnc: /* External links */ +Manual

2021-11-19T21:24:45Z

‎External links: +Manual

Jnc: Add pic

2019-06-25T15:31:45Z

Add pic

Jnc: +cat

2018-12-16T15:32:11Z

+cat

Jnc: typos. +links

2018-10-27T00:15:14Z

typos. +links

Jnc: Add CSR

2018-01-14T15:52:20Z

Add CSR

Jnc: Typo

2018-01-14T11:38:28Z

Typo

Jnc: Add remaining config info

2018-01-14T11:35:30Z

Add remaining config info

Jnc: Add configuration info

2017-12-07T06:47:44Z

Add configuration info

Show changes

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 The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). (The card may be configured to provide less memory than is physically present.)
-It provides byte [[parity]], and supports QBUS Block Mode. (Note that block mode '''must''' be disabled on older [[LSI-11]] systems, including the LSI-11/2.) Internal or external [[refresh]] may be used
+It provides byte [[parity]], and supports QBUS Block Mode. (Note that block mode '''must''' be disabled on older [[LSI-11]] systems, including the LSI-11/2.) Internal or external [[memory refresh]] may be used
 ==Identification==

@@ Line 345: / Line 345: @@
 ==External links==
-* [https://ia902806.us.archive.org/16/items/National_Semiconductor_NS23C_1MB_Memory_Technical_Memory/National_Semiconductor_NS23C_1MB_Memory_Technical_Memory.pdf Technical Manual NS23C 256KB/1MB Memory]
+* [http://shop-pdp.net/~stuff/PDFs/National/National_NS23C.pdf Technical Manual NS23C 256KB/1MB Memory] (includes schematics)
 [[Category: QBUS Memories]]

← Older revision		Revision as of 21:24, 19 November 2021
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	Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U12, from left to right, in the top row; from U13 to U24 in the middle row; and from U25 to U36 in the bottom row. (See diagram in the previous section.)		Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U12, from left to right, in the top row; from U13 to U24 in the middle row; and from U25 to U36 in the bottom row. (See diagram in the previous section.)
		+
		+	==See also==
		+
		+	* [[National Semiconductor NS23M QBUS memory]]
		+
		+	==External links==
		+
		+	* [https://ia902806.us.archive.org/16/items/National_Semiconductor_NS23C_1MB_Memory_Technical_Memory/National_Semiconductor_NS23C_1MB_Memory_Technical_Memory.pdf Technical Manual NS23C 256KB/1MB Memory]

	[[Category: QBUS Memories]]		[[Category: QBUS Memories]]

← Older revision		Revision as of 15:31, 25 June 2019
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		+	[[Image:NS23C.jpg\|350px\|right\|thumb\|NS23C card]]
		+
	The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor\|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM\|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). (The card may be configured to provide less memory than is physically present.)		The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor\|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM\|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). (The card may be configured to provide less memory than is physically present.)

← Older revision		Revision as of 15:32, 16 December 2018
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	Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U12, from left to right, in the top row; from U13 to U24 in the middle row; and from U25 to U36 in the bottom row. (See diagram in the previous section.)		Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U12, from left to right, in the top row; from U13 to U24 in the middle row; and from U25 to U36 in the bottom row. (See diagram in the previous section.)
		+
		+	[[Category: QBUS Memories]]

@@ Line 1: / Line 1: @@
-The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). (The card may be configured to provide less memory thanis physically present.)
+The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). (The card may be configured to provide less memory than is physically present.)
-It provides byte parity, and supports QBUS Block Mode. (Note that block mode '''must''' be disabled on older [[LSI-11]] systems, including the LSI-11/2.) Internal or external refresh may be used
+It provides byte [[parity]], and supports QBUS Block Mode. (Note that block mode '''must''' be disabled on older [[LSI-11]] systems, including the LSI-11/2.) Internal or external [[refresh]] may be used
 ==Identification==
@@ Line 11: / Line 11: @@
 It is very easy to upgrade these cards from 256KB to 1MB, as it has all the necessary traces, jumpers, etc for this capability built into the card - even though the NS23C documentation says nothing about this capability!
-Looking at the prints, the memory chips have all 9 address lines wired (unlike the very similar NS23M card), and there are several jumpers that adapt the card to 1MB operation. The chips are all in sockets, so pulling the 64Kx1's and replacing them with 256Kx1's is easy.
+Looking at the prints, the memory [[integrated circuit|chips]] have all 9 [[address]] lines wired (unlike the very similar NS23M card), and there are several jumpers that adapt the card to 1MB operation. The chips are all in [[chip socket]]s, so pulling the 64Kx1's and replacing them with 256Kx1's is easy.
-There are three 'jumpers' one has to remove/move; alas, they are in the PCB on the top surface, although there are jumper pins there - us built, there is a trace running between the two pins - so those traces have to be cut.
+There are three 'jumpers' one has to remove/move; alas, they are traces in the PCB on the top surface, although there are jumper pins there - as built, there is a trace running between the two pins - so those traces have to be cut.
 The first two 'jumpers' one has to remove are W23 and W24 (right next to the other memory size jumpers), which allow one to increase the maximum memory size to 1MB.

@@ Line 1: / Line 1: @@
-The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). It provides byte parity, and supports QBUS Block Mode.
+The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). (The card may be configured to provide less memory thanis physically present.)
 ==Identification==
@@ Line 16: / Line 18: @@
 The other 'jumper' one has to do is to move the 'jumper' from W40 to W41; this moves the pickup point for the 'RS0' signal, which indicates which bank of chips (there are 2x18 banks, i.e. 16 data, and separate byte parity) to activate, from address line 17 to 19.
 ==Configuration==

@@ Line 283: / Line 283: @@
 ===Chip Table===
-To aid fault isolation, here is a table which relates bit numbers in memory words to chip numebrs:
+To aid fault isolation, here is a table which relates bit numbers in memory words to chip numbers:
 {| class="wikitable"
@@ Line 325: / Line 325: @@
 |}
-Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U12, from left to right, in the top row; from U13 to U24 in the middle row; and from U25 to U36 in the bottom row.
+Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U12, from left to right, in the top row; from U13 to U24 in the middle row; and from U25 to U36 in the bottom row. (See diagram in the previous section.)

@@ Line 1: / Line 1: @@
-The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAM]]s), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). It provides byte parity.
+The '''National Semiconductor NS23C''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format, with a maximum capacity of 256 Kbyte (using 64Kx1 [[Dynamic RAM|DRAMs]]), or 1 Mbyte (un-documented, using 256Kx1 DRAMs). It provides byte parity, and supports QBUS Block Mode.
 ==Identification==
@@ Line 7: / Line 7: @@
 ==256KB to 1M Upgrade==
-It is very easy to upgrade these card from 256KB to 1MB, as it has all the necessary traces, jumpers, etc for this capability built into the card - even though the NS23C documentation says nothing about this capability!
+It is very easy to upgrade these cards from 256KB to 1MB, as it has all the necessary traces, jumpers, etc for this capability built into the card - even though the NS23C documentation says nothing about this capability!
-Looking at the prints, the memory chips have all 9 address lines wired (unlike the very similar NS23M card), and there are a couple of jumpers that adapt the card to 1MB operation. The chips are all in sockets, so pulling the 64Kx1's and replacing them with 256Kx1's should be easy.
+Looking at the prints, the memory chips have all 9 address lines wired (unlike the very similar NS23M card), and there are several jumpers that adapt the card to 1MB operation. The chips are all in sockets, so pulling the 64Kx1's and replacing them with 256Kx1's is easy.
-There are three 'jumpers' one has to remove/move; alas, they are in the PCB on the top surface, although there are jumper pins there - there's a trace running between the two pins - so you have to cut the traces.
+There are three 'jumpers' one has to remove/move; alas, they are in the PCB on the top surface, although there are jumper pins there - us built, there is a trace running between the two pins - so those traces have to be cut.
 The first two 'jumpers' one has to remove are W23 and W24 (right next to the other memory size jumpers), which allow one to increase the maximum memory size to 1MB.
@@ Line 22: / Line 22: @@
 Since the 1 Mbyte option is un-documented, here is updated information on how to configure the board.
 First, the low-order size bits, which are the same as the un-modified board:
@@ Line 79: / Line 81: @@
 |}
 The starting address is also entirely the same as the un-modified board; first, the low-order starting address bits:
@@ Line 191: / Line 194: @@
 | 3840KB || 17000000 || I || I || I || I
 |}
 ==Fault Isolation==