National Semiconductor NS23M QBUS memory - Revision history

Jnc: +links

2022-09-22T12:18:44Z

+links

2021-11-19T20:51:40Z

‎See also: +NS23C

2020-05-06T20:14:48Z

‎Identification: +emph

2019-07-02T14:22:34Z

‎Fault Isolation: +link, typo

2019-06-25T15:34:16Z

Add pic

2019-05-11T02:09:13Z

Add link to docs, prints

2018-02-14T18:51:19Z

make table easier to use, +cat

2017-11-29T13:02:10Z

Add chip table

2017-11-29T02:34:24Z

Add ID info (since it is often listed under these numbers)

2017-03-04T15:50:18Z

Can used 16K or 64K

@@ Line 1: / Line 1: @@
 [[Image:NS23M.jpg|350px|right|thumb|NS23M card]]
-The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[DRAM]]s, operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs). It provides byte parity.
+The '''National Semiconductor NS23M''' is a [[QBUS]] [[main memory]] card in [[DEC card form factor|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[Dynamic RAM|DRAMs]], operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs). It provides byte [[parity]].
 ==Identification==
@@ Line 9: / Line 9: @@
 == Configuration==
-The board is configured with a combination of jumpers and DIP switches.
+The board is configured with a combination of [[jumper]]s and [[Dual Inline Package|DIP]] switches.
 {| class="wikitable"
@@ Line 22: / Line 22: @@
 | W8-W9 || 	Test
 |-
-| W10-W11 || 	Internal/External Refresh
+| W10-W11 || 	Internal/External [[memory refresh]]
 |-
 | W13-W14 || 	32K DRAM Upper/Lower

← Older revision		Revision as of 20:51, 19 November 2021
Line 120:		Line 120:

	Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U9, from left to right, in the top row; from U10 to U18 in the upper middle row; from U19 to U27 in the lower middle row; and from U28 to U36 in the bottom row.		Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U9, from left to right, in the top row; from U10 to U18 in the upper middle row; from U19 to U27 in the lower middle row; and from U28 to U36 in the bottom row.
		+
		+	==See also==
		+
		+	* [[National Semiconductor NS23C QBUS memory]]

	==External links==		==External links==

@@ Line 5: / Line 5: @@
 ==Identification==
-Unlike the [[National Semiconductor NS23C QBUS memory|NS23C]], the NS23M [[printed circuit board]] does not contain any identification which indicates directly that it is an NS23M.  The PCB only says "PWB 551103882-003" and "PWA 980103882", both on the component side; one often sees these boards listed on auction sites under these ids.
+Unlike the [[National Semiconductor NS23C QBUS memory|NS23C]], the NS23M [[printed circuit board]] '''does not''' contain any identification which indicates directly that it is an NS23M.  The PCB only says "PWB 551103882-003" and "PWA 980103882", both on the component side; one often sees these boards listed on auction sites under these ids.
 == Configuration==

@@ Line 77: / Line 77: @@
 ==Fault Isolation==
-To aid fault isolation, here is a table which relates bit numbers in memory words to chip numebrs:
+To aid [[QBUS memories#Diagnosing DRAM memory failures|fault isolation]], here is a table which relates bit numbers in memory words to chip numbers:
 {| class="wikitable"

← Older revision		Revision as of 15:34, 25 June 2019
Line 1:		Line 1:
		+	[[Image:NS23M.jpg\|350px\|right\|thumb\|NS23M card]]
		+
	The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor\|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[DRAM]]s, operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs). It provides byte parity.		The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor\|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[DRAM]]s, operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs). It provides byte parity.

← Older revision		Revision as of 02:09, 11 May 2019
Line 118:		Line 118:

	Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U9, from left to right, in the top row; from U10 to U18 in the upper middle row; from U19 to U27 in the lower middle row; and from U28 to U36 in the bottom row.		Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U9, from left to right, in the top row; from U10 to U18 in the upper middle row; from U19 to U27 in the lower middle row; and from U28 to U36 in the bottom row.
		+
		+	==External links==
		+
		+	* [http://ana-3.lcs.mit.edu/~jnc/tech/pdp11/NS23/NS23M.pdf NS23M Installation Guide] (includes schematics)

	[[Category: QBUS Memories]]		[[Category: QBUS Memories]]

@@ Line 34: / Line 34: @@
 {| class="wikitable"
-! Switch !! Address bit
+! Switch !! Address bit !! Location
 |-
-| S1-1 || 20000
+| S1-1 || 020000 || 8KB
 |-
-| S1-2 || 40000
+| S1-2 || 040000 || 16KB
 |-
-| S1-3 || 100000
+| S1-3 || 0100000 || 32KB
 |-
-| S1-4 || 200000
+| S1-4 || 0200000 || 64KB
 |-
-| S1-5 || 400000
+| S1-5 || 0400000 || 128KB
 |-
-| S1-6 || 1000000
+| S1-6 || 01000000 || 256KB
 |-
-| S1-7 || 2000000
+| S1-7 || 02000000 || 512KB
 |-
-| S1-8 || 4000000
+| S1-8 || 04000000 || 1024KB
 |-
-| S1-9 || 10000000
+| S1-9 || 010000000 || 2048KB
 |}
@@ Line 118: / Line 118: @@
 Facing the board, with the handles at the top, and the contacts at the bottom, the memory chips are numbered from U1 to U9, from left to right, in the top row; from U10 to U18 in the upper middle row; from U19 to U27 in the lower middle row; and from U28 to U36 in the bottom row.

← Older revision		Revision as of 02:34, 29 November 2017
Line 1:		Line 1:
	The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor\|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[DRAM]]s, operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs).		The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor\|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[DRAM]]s, operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs).
		+
		+	==Identification==
		+
		+	Unlike the [[National Semiconductor NS23C QBUS memory\|NS23C]], the NS23M [[printed circuit board]] does not contain any identification which indicates directly that it is an NS23M. The PCB only says "PWB 551103882-003" and "PWA 980103882", both on the component side; one often sees these boards listed on auction sites under these ids.

	== Configuration==		== Configuration==

← Older revision		Revision as of 15:50, 4 March 2017
Line 1:		Line 1:
−	The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor\|dual]] QBUS card-size format, ~~with~~ a maximum capacity of 256 Kbyte (using 64Kx1 ~~[[DRAM]]s~~).	+	The '''National Semiconductor NS23M''' is a [[QBUS]] memory card in [[DEC card form factor\|dual]] QBUS card-size format. It can be configured to use either 16Kx1, 32Kx1 or 64Kx1 [[DRAM]]s, operating at 150nsec or 200nsec; it has a maximum capacity of 256 Kbyte (using 64Kx1 DRAMs).

	== Configuration==		== Configuration==