PDP-11/23 - Revision history

Jnc: /* hampage.hu */ +link

2022-05-15T11:31:21Z

‎hampage.hu: +link

Jnc: +links

2022-05-15T11:07:52Z

+links

Jnc: /* Gallery */ wrong page

2022-04-11T06:06:52Z

‎Gallery: wrong page

Jnc: rm dup

2021-01-16T01:58:51Z

rm dup

Jnc: Proper cat, +links

2018-10-20T16:06:30Z

Proper cat, +links

Jnc: Proper cat

2018-02-17T15:17:59Z

Proper cat

Jnc: update a tiny bit

2016-09-17T15:11:57Z

update a tiny bit

Neozeed: /* Gallery */

2011-05-04T14:38:10Z

‎Gallery

Neozeed at 14:35, 4 May 2011

2011-05-04T14:35:10Z

Neozeed at 14:33, 4 May 2011

2011-05-04T14:33:54Z

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 Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the [[F-11 chip set]], it had a [[DEC card form factor|dual-height]] KDF11-A CPU card. The [[memory management]] was 22 bit (4MB [[address space]]), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 [[instruction set]] consists of 97 standard and 46 optional [[floating point]] [[instruction]]s. The microcycle time of the CPU is around 300 ns.
-The [[PDP-11/23 PLUS]] used the quad-height [[KDF11-B CPU]] module, which had two serial lines and boot PROMs on-board.
+The [[PDP-11/23-PLUS]] used the quad-height [[KDF11-B CPU]] module, which had two [[asynchronous serial line]]s and boot PROMs on-board.
 The KDF11-A module has four 40-pin sockets for the chipset. One is for the DCF11 two-chip hybrid (21-15541AB data path and 23-001C7 control chip), one's for the KTF11 MMU option and one's for the KEF11 floating-point option (another two-chip carrier; the MMU chip must be installed to use the FPP option). The remaining socket can be used with the CIS option, which spans two sockets wide (so you loose the FPP). The KDF11-B has five sockets, so there are no problems with this.

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 Quote:
 <i>
-Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the [[F-11 chip set]], it had a [[DEC card form factor|dual-height]] KDF11-A CPU card. The [[memory management]] was 22 bit (4MB addressing space), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 [[instruction set]] consists of 97 standard and 46 optional [[floating point]] [[instruction]]s. The microcycle time of the CPU is around 300 ns.
+Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the [[F-11 chip set]], it had a [[DEC card form factor|dual-height]] KDF11-A CPU card. The [[memory management]] was 22 bit (4MB [[address space]]), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 [[instruction set]] consists of 97 standard and 46 optional [[floating point]] [[instruction]]s. The microcycle time of the CPU is around 300 ns.
-The PDP-11/23PLUS used the quad-height KDF11-B CPU module, which had two serial lines and boot PROMs on-board.
+The [[PDP-11/23 PLUS]] used the quad-height [[KDF11-B CPU]] module, which had two serial lines and boot PROMs on-board.
-The KDF11-A module has four 40-pin sockets for the chipset. One is for the DCF11 two-chip hybrid (21-15541AB data path and 23-001C7 control chip), one's for the KTF11 MMU option and one's for the KEF11 floating-point option (another two-chip carrier; the MMU must be installed to use the FPP option). The remaining socket can be used with the CIS option, which spans two sockets wide (so you loose the FPP). The KDF11-B has five sockets, so there are no problems with this.
+The KDF11-A module has four 40-pin sockets for the chipset. One is for the DCF11 two-chip hybrid (21-15541AB data path and 23-001C7 control chip), one's for the KTF11 MMU option and one's for the KEF11 floating-point option (another two-chip carrier; the MMU chip must be installed to use the FPP option). The remaining socket can be used with the CIS option, which spans two sockets wide (so you loose the FPP). The KDF11-B has five sockets, so there are no problems with this.
-In floating-point-heavy applications, the FPF11 can be used. This is a quad-height module that is connected to the KEF11-socket on CPU board with a cable. It's based on bitslice processors, the performance is six times of the performance of the KEF11 option. (64-bit data path, 17-digit accuracy)
+In floating-point-heavy applications, the [[FPF11 floating point processor|FPF11]] can be used. This is a quad-height module that is connected to the KEF11-socket on CPU board with a cable. It's based on bitslice processors, the performance is six times of the performance of the KEF11 option. (64-bit data path, 17-digit accuracy)
 </i>

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 == Gallery ==
 [[Image:1123boardclose.jpg|200px]]
 [[Image:pdp11-23b.jpg|200px]]
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 {{PDP-11}}
-[[Category:QBUS PDP-11s]]
+[[Category: QBUS PDP-11s]]

← Older revision		Revision as of 01:58, 16 January 2021
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	In floating-point-heavy applications, the FPF11 can be used. This is a quad-height module that is connected to the KEF11-socket on CPU board with a cable. It's based on bitslice processors, the performance is six times of the performance of the KEF11 option. (64-bit data path, 17-digit accuracy)		In floating-point-heavy applications, the FPF11 can be used. This is a quad-height module that is connected to the KEF11-socket on CPU board with a cable. It's based on bitslice processors, the performance is six times of the performance of the KEF11 option. (64-bit data path, 17-digit accuracy)
−
−	The PDP-11/24 is the UNIBUS version of the PDP-11/23, based on the KDF11-U processor module. The module has seven 40-pin sockets for the chipset, so the 2-chip-wide CIS and the DIBOL options can be used simultanously.
	</i>		</i>

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 Quote:
 <i>
-Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the [[F-11 chip set]], it had a [[DEC card form factor|quad-height]] [[KDF11-A CPU]] card. The memory management was 22 bit (4MB addressing space), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 instruction set consists of 97 standard and 46 optional floating-point instructions. The microcycle time of the CPU is around 300 ns.
+Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the [[F-11 chip set]], it had a [[DEC card form factor|dual-height]] KDF11-A CPU card. The [[memory management]] was 22 bit (4MB addressing space), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 [[instruction set]] consists of 97 standard and 46 optional [[floating point]] [[instruction]]s. The microcycle time of the CPU is around 300 ns.
 The PDP-11/23PLUS used the quad-height KDF11-B CPU module, which had two serial lines and boot PROMs on-board.
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 More images [http://replay.web.archive.org/20031019171636/http://hampage.hu/pdp-11/1123.html here].
-{{stub}}
+{{semi-stub}}
 {{PDP-11}}
 [[Category:QBUS PDP-11s]]

← Older revision		Revision as of 15:17, 17 February 2018
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	{{PDP-11}}		{{PDP-11}}

−	[[Category:QBUS ~~processors~~]]	+	[[Category:QBUS PDP-11s]]

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 [[Image:pdp11-23.jpg|150px|thumb|right|A PDP-11/23]]
-What made this model special?  I have no idea.  The CPU board is the [[DEC-PN-M8189|M8189]].
+The '''PDP-11/23''' was the second [[QBUS]] [[PDP-11]] system; it used the [[KDF11-A CPU]] (M8189).
 == hampage.hu ==
 Quote:
 <i>
-Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the F-11 chipset, it had a double-height KDF11-A processor card. The memory management was 22 bit (4MB addressing space), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 instruction set consists of 97 standard and 46 optional floating-point instructions. The microcycle time of the CPU is around 300 ns.
+Introduced in 1979. Intended as the successor of the [[PDP-11/03]]. Based on the [[F-11 chip set]], it had a [[DEC card form factor|quad-height]] [[KDF11-A CPU]] card. The memory management was 22 bit (4MB addressing space), but in some revisions (KDF11-A Rev. A) only 18 lines were used. The LSI-11/23 instruction set consists of 97 standard and 46 optional floating-point instructions. The microcycle time of the CPU is around 300 ns.
 The PDP-11/23PLUS used the quad-height KDF11-B CPU module, which had two serial lines and boot PROMs on-board.
@@ Line 13: / Line 13: @@
 In floating-point-heavy applications, the FPF11 can be used. This is a quad-height module that is connected to the KEF11-socket on CPU board with a cable. It's based on bitslice processors, the performance is six times of the performance of the KEF11 option. (64-bit data path, 17-digit accuracy)
 The PDP-11/24 is the UNIBUS version of the PDP-11/23, based on the KDF11-U processor module. The module has seven 40-pin sockets for the chipset, so the 2-chip-wide CIS and the DIBOL options can be used simultanously.
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 == Gallery ==
 [[Image:pdp11-24.jpg|200px]]
 [[Image:1123boardclose.jpg|200px]]
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 {{stub}}
 {{PDP-11}}
-[[Category:DEC processors]][[Category:QBUS processors]]