PDP-11/44 - Revision history

Jnc: /* External links */ pdp11 processor handbook

2024-02-29T21:42:29Z

‎External links: pdp11 processor handbook

Jnc: Move image into infobox

2024-02-08T17:04:02Z

Move image into infobox

Jnc: +New category

2024-02-06T14:21:51Z

+New category

Jnc: /* External links */ +FMPS, manuals; list EUB memories it can use

2022-01-16T16:10:01Z

‎External links: +FMPS, manuals; list EUB memories it can use

Jnc: give CPU

2020-01-21T22:20:15Z

give CPU

Jnc: Start to turn into a real article

2020-01-21T12:42:23Z

Start to turn into a real article

Jnc: Uh, no..

2018-05-05T21:27:41Z

Uh, no..

Jnc: Proper cat

2018-02-17T14:46:40Z

Proper cat

Neozeed at 17:35, 4 May 2011

2011-05-04T17:35:24Z

Neozeed at 15:11, 1 May 2011

2011-05-01T15:11:06Z

@@ Line 42: / Line 42: @@
 ** [http://bitsavers.org/pdf/dec/pdp11/1144/1144_SystemTechMan.pdf PDP-11/44 System Technical Manual] (EK-KD11Z-TM-001)
 ** [http://bitsavers.org/pdf/dec/pdp11/1144/MP00897_11X44sys_Dec79.pdf 11X44 Field Maintenance Print Set] (MP00897)
 {{Nav PDP-11}}

@@ Line 1: / Line 1: @@
 {{Infobox Machine
 | name = PDP-11/44
-| image=Pdp11 44.jpg
+| image = Pdp11 44.jpg
-| caption=PDP-11/44 from a sales brochure.
+| imgwidth = 200px
 | manufacturer = [[Digital Equipment Corporation]]
 | architecture = [[PDP-11]]
 }}
 The '''PDP-11/44''' was a high performance [[UNIBUS]] [[PDP-11]] system; in some senses a lower-cost successor to the [[PDP-11/70]], although without the very high [[main memory]] bandwidth and I/O bandwidth to [[mass storage]] of the -11/70, as it lacked the latter's Main Memory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS, and [[Extended UNIBUS|EUB]]. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z]], was the last PDP-11 CPU to be made out of discrete [[integrated circuit|chips]], and not a [[microprocessor]].
 The -11/44 used the EUB for its [[bus]] to main memory, allowing it to have up to 4 mega-[[byte]]s of main memory. All devices were attached to a semi-separate UNIBUS (it and the EUB shared data lines, but not [[address]] lines); [[Direct Memory Access|DMA]] devices could gain access to the memory via a [[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.
 Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-B Cache Memory|KK11-B]]) were standard on all -11/44's. It also supported the optional [[FP11-F Floating-Point Processor|FP11-F]] [[floating point]] (full [[FP11 floating point]]), and/or the [[KE44-A Commercial Instruction Set Processor]] (the [[PDP-11 Commercial Instruction Set]]).

← Older revision		Revision as of 14:21, 6 February 2024
Line 45:		Line 45:
	{{Nav PDP-11}}		{{Nav PDP-11}}

−	[[Category:UNIBUS PDP-11s]]	+	[[Category: UNIBUS PDP-11s]]
		+	[[Category: Extended UNIBUS]]

@@ Line 9: / Line 9: @@
 [[Image:PDP11-44-geerol.jpg|150px|thumb|right|A PDP-11/44 setup]]
-The '''PDP-11/44''' was a high performance [[UNIBUS]] [[PDP-11]] system; in some senses a lower-cost successor to the [[PDP-11/70]], although without the very high [[main memory]] bandwidth and I/O bandwidth to [[mass storage]] of the -11/70, as it lacked the latter's Main Memory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z]], was the last PDP-11 CPU to be made out of discrete [[integrated circuit|chips]], and not a [[microprocessor]].
+The '''PDP-11/44''' was a high performance [[UNIBUS]] [[PDP-11]] system; in some senses a lower-cost successor to the [[PDP-11/70]], although without the very high [[main memory]] bandwidth and I/O bandwidth to [[mass storage]] of the -11/70, as it lacked the latter's Main Memory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS, and [[Extended UNIBUS|EUB]]. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z]], was the last PDP-11 CPU to be made out of discrete [[integrated circuit|chips]], and not a [[microprocessor]].
-The -11/44 used the [[Extended UNIBUS]] for its [[bus]] to main memory, allowing it to have up to 4 mega-[[byte]]s of main memory. All devices were attached to a semi-separate UNIBUS (it and the EUB shared data lines, but not [[address]] lines); [[Direct Memory Access|DMA]] devices could gain access to the memory via a [[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.
+The -11/44 used the EUB for its [[bus]] to main memory, allowing it to have up to 4 mega-[[byte]]s of main memory. All devices were attached to a semi-separate UNIBUS (it and the EUB shared data lines, but not [[address]] lines); [[Direct Memory Access|DMA]] devices could gain access to the memory via a [[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.
-Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-C Cache Memory|KK11-B]]) were standard on all -11/44's. It also supported the optional [[FP11-F Floating-Point Processor|FP11-F]] [[floating point]] (full [[FP11 floating point]]), and/or the [[KE44-A Commercial Instruction Set Processor]] (the [[PDP-11 Commercial Instruction Set]]).
+Full [[PDP-11 Memory Management]] and a [[cache]] (the [[KK11-B Cache Memory|KK11-B]]) were standard on all -11/44's. It also supported the optional [[FP11-F Floating-Point Processor|FP11-F]] [[floating point]] (full [[FP11 floating point]]), and/or the [[KE44-A Commercial Instruction Set Processor]] (the [[PDP-11 Commercial Instruction Set]]).
 Its main [[mounting box]] was the new [[BA11-A mounting box]].
@@ Line 30: / Line 32: @@
 . A middle-class -11. It had the 22-bit UNIBUS map and MMU as standard (up to 2 Mwords on a separate CPU-memory interconnect, called the PAX Memory Bus). The CPU consists of 5 boards, plus one for the FPP (FP11-F, optional), and two CIS (KE44-A, optional). Features: 8 KByte cache, ODT, 2 SLU's (Serial Line Units: console + TU58 console media), RTC (Real-Time Clock), kernel/supervisor/user modes.
-The machine also had an almost-FEP (front-end processor) console, based on the Intel i8088, running from PROM. There was no qbus equivalent.
+The machine also had an almost-FEP (front-end processor) console, based on the Intel i8088, running from PROM. There was no QBUS equivalent.
 Trivia: This was the last non-[[microprocessor]]-based PDP-11.</i>
-{{PDP-11}}
+==External links==
 [[Category:UNIBUS PDP-11s]]

@@ Line 9: / Line 9: @@
 [[Image:PDP11-44-geerol.jpg|150px|thumb|right|A PDP-11/44 setup]]
-The '''PDP-11/44''' was a high performance [[UNIBUS]] [[PDP-11]] system; in some senses a lower-cost successor to the [[PDP-11/70]], although without the very high [[main memory]] bandwidth and I/O bandwidth to [[mass storage]] of the -11/70, as it lacked the latter's Main Memory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS. Its [[Central Processing Unit|CPU]] was the last PDP-11 CPU to be made out of discrete [[integrated circuit|chips]], and not a [[microprocessor]].
+The '''PDP-11/44''' was a high performance [[UNIBUS]] [[PDP-11]] system; in some senses a lower-cost successor to the [[PDP-11/70]], although without the very high [[main memory]] bandwidth and I/O bandwidth to [[mass storage]] of the -11/70, as it lacked the latter's Main Memory Bus and integrated [[MASSBUS]], relying instead on the UNIBUS. Its [[Central Processing Unit|CPU]], the [[KD11-Z CPU|KD11-Z]], was the last PDP-11 CPU to be made out of discrete [[integrated circuit|chips]], and not a [[microprocessor]].
 The -11/44 used the [[Extended UNIBUS]] for its [[bus]] to main memory, allowing it to have up to 4 mega-[[byte]]s of main memory. All devices were attached to a semi-separate UNIBUS (it and the EUB shared data lines, but not [[address]] lines); [[Direct Memory Access|DMA]] devices could gain access to the memory via a [[UNIBUS map]] which connected the two, and mapped UNIBUS addresses to main memory addresses.

@@ Line 24: / Line 24: @@
 The machine also had an almost-FEP (front-end processor) console, based on the Intel i8088, running from PROM. There was no qbus equivalent.
-Trivia: This was the last non-[[microprocessor]]-based PDP-11 (it used LSI bitslice processors).</i>
+Trivia: This was the last non-[[microprocessor]]-based PDP-11.</i>
 {{stub}}

@@ Line 10: / Line 10: @@
 [[Image:PDP11-44-geerol.jpg|150px|thumb|right|A PDP-11/44 setup.]]
 Quoting [http://www.xs4all.nl/~geerol/en/GAL/index.html http://www.xs4all.nl/~geerol/en/GAL/index.html]
-<blockquote>
+<i>
-(1979) The PDP 11/44 (hostname "gigant") is a low-cost successor of the PDP 11/70. The 11/70, brought to the market in 1975, was the first "large" PDP. Large means a 22 bit addres space and a memory limit of 4MB. Do keep in mind that user programs are still limited to 16 bit addressing and hence restricted to a limit of just 2x 64KB, when using separated I&D.
+(1979) The PDP 11/44 (hostname "gigant") is a low-cost successor of the PDP 11/70. The 11/70, brought to the market in 1975, was the first "large" PDP. Large means a 22 bit address space and a memory limit of 4MB. Do keep in mind that user programs are still limited to 16 bit addressing and hence restricted to a limit of just 2x 64KB, when using separated I&D.
 {{PDP-11}}
 {{stub}}
 [[Category:UNIBUS processors]]