PDP-11/70 - Revision history

Jnc: /* External links */ +pdp11 processor handbook

2024-02-29T21:43:53Z

‎External links: +pdp11 processor handbook

2022-10-13T11:59:33Z

‎External links: +docs at Bitsavers

2022-06-02T14:43:37Z

‎External links: +PDP-11/70 page from avitech

2021-12-24T10:55:49Z

‎Main memory: typo

2021-03-12T15:40:06Z

‎Main memory: avoid redirs

2021-01-06T00:20:38Z

‎Main memory: +trans lines

2021-01-05T19:04:48Z

+main mem bus

2020-04-24T16:47:10Z

link to RH70

2018-10-20T16:11:51Z

Proper cat

2018-06-27T21:35:05Z

@@ Line 59: / Line 59: @@
 ** [http://bitsavers.org/pdf/dec/pdp11/1170/1170_StudentHandouts.pdf PDP-11/70 Hardware Student Handouts]
 ** [http://bitsavers.org/pdf/dec/pdp11/1170/1170_Engineering_Drawings_revL_Mar1977.pdf 11/70 Engineering Drawings]
 * [http://avitech.com.au/?page_id=366 PDP-11/70] - contains many good images
 * [http://obsolescence.wixsite.com/obsolescence/pidp-11 PiDP-11: a functional scale model replica of the PDP-11/70 console]

@@ Line 53: / Line 53: @@
 == External links ==
 * [http://avitech.com.au/?page_id=366 PDP-11/70] - contains many good images
 * [http://obsolescence.wixsite.com/obsolescence/pidp-11 PiDP-11: a functional scale model replica of the PDP-11/70 console]

@@ Line 53: / Line 53: @@
 == External links ==
 * [http://obsolescence.wixsite.com/obsolescence/pidp-11 PiDP-11: a functional scale model replica of the PDP-11/70 console]
@@ Line 59: / Line 60: @@
 {{PDP-11}}
-[[Category:UNIBUS PDP-11s]]
+[[Category: UNIBUS PDP-11s]]

@@ Line 24: / Line 24: @@
 The main memory systems supported by the -11/70 were the [[MJ11 memory system]] (which used [[core memory]]), and the later [[MK11 memory system]] (which used [[dynamic RAM]]).
-The Main Memory Bus consisted of [[transmission line]]s, which required [[terminator]]s on both ends; at the MJ11/M11 end, a pair of H873 modules were plugged into the last output port to do that.
+The Main Memory Bus consisted of [[transmission line]]s, which required [[terminator]]s on both ends; at the MJ11/MK11 end, a pair of H873 modules were plugged into the last output port, to do that.
 The cabling used for the Main Memory Bus ([[DEC part number]] 70-10824) consists of a set of four BC06R-xx [[flat cable]]s; two for the [[address]] and control, and two for the data. They run from [[Berg connector]] headers on boards in the KB11 CPU's cache to others on boards in the MJ11/MK11.

@@ Line 22: / Line 22: @@
 ==Main memory==
-The main memory systems supported by the -11/70 were the [[MJ11 memory system]] (which used [[core memory]]), and the later [[MK11 memory system]] (which used [[DRAM]]).
+The main memory systems supported by the -11/70 were the [[MJ11 memory system]] (which used [[core memory]]), and the later [[MK11 memory system]] (which used [[dynamic RAM]]).
 The Main Memory Bus consisted of [[transmission line]]s, which required [[terminator]]s on both ends; at the MJ11/M11 end, a pair of H873 modules were plugged into the last output port to do that.
-The cabling used for the Main Memory Bus ([[DEC part numbers‎‎|DEC part number]] 70-10824) consists of a set of four BC06R-xx [[flat cable]]s; two for the [[address]] and control, and two for the data. They run from [[Berg connector]] headers on boards in the KB11 CPU's cache to others on boards in the MJ11/MK11.
+The cabling used for the Main Memory Bus ([[DEC part number]] 70-10824) consists of a set of four BC06R-xx [[flat cable]]s; two for the [[address]] and control, and two for the data. They run from [[Berg connector]] headers on boards in the KB11 CPU's cache to others on boards in the MJ11/MK11.
 == hampage.hu ==

← Older revision		Revision as of 00:20, 6 January 2021
Line 23:		Line 23:

	The main memory systems supported by the -11/70 were the [[MJ11 memory system]] (which used [[core memory]]), and the later [[MK11 memory system]] (which used [[DRAM]]).		The main memory systems supported by the -11/70 were the [[MJ11 memory system]] (which used [[core memory]]), and the later [[MK11 memory system]] (which used [[DRAM]]).
		+
		+	The Main Memory Bus consisted of [[transmission line]]s, which required [[terminator]]s on both ends; at the MJ11/M11 end, a pair of H873 modules were plugged into the last output port to do that.

	The cabling used for the Main Memory Bus ([[DEC part numbers‎‎\|DEC part number]] 70-10824) consists of a set of four BC06R-xx [[flat cable]]s; two for the [[address]] and control, and two for the data. They run from [[Berg connector]] headers on boards in the KB11 CPU's cache to others on boards in the MJ11/MK11.		The cabling used for the Main Memory Bus ([[DEC part numbers‎‎\|DEC part number]] 70-10824) consists of a set of four BC06R-xx [[flat cable]]s; two for the [[address]] and control, and two for the data. They run from [[Berg connector]] headers on boards in the KB11 CPU's cache to others on boards in the MJ11/MK11.

@@ Line 9: / Line 9: @@
 | bus arch= [[UNIBUS]]/[[MASSBUS]]/memory bus
 | year introduced= March 1975
 |}}
@@ Line 20: / Line 19: @@
 The CPU was the [[KB11-B CPU|KB11-B]] (in early units, prior to 1976) or [[KB11-C CPU|KB11-C]] (later) CPU. (The difference between the two was whether they took the optional [[FP11-B Floating-Point Processor|FP11-B]] or [[FP11-C Floating-Point Processor|FP11-C]] [[Floating point processor|FPP]].)
 The main memory systems supported by the -11/70 were the [[MJ11 memory system]] (which used [[core memory]]), and the later [[MK11 memory system]] (which used [[DRAM]]).
 == hampage.hu ==
@@ Line 41: / Line 44: @@
 [[Image:pdp11_70b.jpg|200px]]
 [[Image:pdp11-70c.jpg|200px]]
 == External links ==

@@ Line 17: / Line 17: @@
 * The ability to support up to 4 Mbytes of [[main memory]] via a new Main Memory Bus, and changes to the CPU to allow access to that much memory
 * A [[UNIBUS map]] to allow devices on the UNIBUS access to all of that memory
-* The ability to support up to 4 [[MASSBUS]] adapters, which connected high-speed [[secondary storage]] devices directly to the main memory, bypassing the UNIBUS
+* The ability to support up to 4 [[RH70 MASSBUS controller]]s, which connected high-speed [[secondary storage]] devices directly to the main memory, bypassing the UNIBUS
 The CPU was the [[KB11-B CPU|KB11-B]] (in early units, prior to 1976) or [[KB11-C CPU|KB11-C]] (later) CPU. (The difference between the two was whether they took the optional [[FP11-B Floating-Point Processor|FP11-B]] or [[FP11-C Floating-Point Processor|FP11-C]] [[Floating point processor|FPP]].)

@@ Line 1: / Line 1: @@
 {{Infobox Machine
-| name=PDP-11/70
+| image= pdp11-70.jpg
-| manufacturer=[[Digital Equipment Corporation]]
+| caption= A PDP-11/70
 | word size= 16 bit
 | virtual address= 16 bit
@@ Line 41: / Line 41: @@
 [[Image:pdp11_70b.jpg|200px]]
 [[Image:pdp11-70c.jpg|200px]]
 == External links ==
 * [http://obsolescence.wixsite.com/obsolescence/pidp-11 PiDP-11: a functional scale model replica of the PDP-11/70 console]
 {{PDP-11}}
 [[Category:UNIBUS PDP-11s]]