PDP-15 - Revision history

Larsbrinkhoff: 18-bit cat.

2023-07-11T11:40:04Z

18-bit cat.

Jnc: /* External links */ +PDP-15 hardware

2022-11-30T12:46:11Z

‎External links: +PDP-15 hardware

Jnc: add inst format

2022-11-29T14:53:50Z

add inst format

Jnc: /* External links */ +PDP-15 reference card

2022-08-16T10:39:03Z

‎External links: +PDP-15 reference card

Jnc: use new inst speed

2022-08-09T00:21:32Z

use new inst speed

Jnc: +RS09 disk info

2021-05-04T21:03:54Z

+RS09 disk info

Jnc: +docs, links

2021-01-10T12:06:21Z

+docs, links

Jnc: Proper cat

2018-10-20T16:14:16Z

Proper cat

Jnc: Avoid redir

2018-04-23T03:22:09Z

Avoid redir

Jnc: fix cats

2018-02-18T18:16:18Z

fix cats

← Older revision		Revision as of 11:40, 11 July 2023
Line 74:		Line 74:
	[[Category: DEC Systems]]		[[Category: DEC Systems]]
	[[Category: PDP-15s]]		[[Category: PDP-15s]]
		+	[[Category: 18-bit Computers]]

@@ Line 65: / Line 65: @@
 * [http://www.bitsavers.org/pdf/dec/pdp15/ PDP-15] - documentation at [[Bitsavers]]
 ** [http://www.bitsavers.org/pdf/dec/pdp15/PDP15RefMan.pdf PDP-15 Systems Reference Manual] (DEC-15-BRZA-D)
 * [http://www.vaxarchive.org/hardware/pdp11/pdp15rc.tar PDP-15 reference card] (images in TAR file)

@@ Line 18: / Line 18: @@
 }}
-The '''PDP-15''' was [[Digital Equipment Corporation|DEC]]'s last 18-bit computer, and the only one implemented using [[integrated circuit]]s. Its principal intended use was for [[real-time system]]s. A variety of models were offered, from the PDP-15/10 (with 4K words of [[main memory]]), to the PDP-15/40 (with 24K words, and two [[disk]]s).
+The '''PDP-15''' was [[Digital Equipment Corporation|DEC]]'s last 18-bit computer, and the only one implemented using [[integrated circuit]]s. Its principal intended use was for [[real-time system]]s. A variety of models were offered, from the PDP-15/10 (with 4K [[word]]s of [[main memory]]), to the PDP-15/40 (with 24K words, and two [[disk]]s).
-[[Instruction]]s had a 4-bit opcode, one bit of indirect, and one of indexing. It was a [[load-store architecture]], with a single [[accumulator]]. There were several other specialized [[register]]s, including an 'Index Register', and a 'Limit Register' for [[loop]] control.
+It was a [[load-store architecture]], with a single [[accumulator]]. There were several other specialized [[register]]s, including an 'Index Register', and a 'Limit Register' for [[loop]] control.
 Both multiply/divide and [[floating point]] support were hardware options (the former being standard on all but the lowest model). The FP15 floating point unit was a complete separate processor, but shared the [[instruction set]] space with the basic CPU.
@@ Line 29: / Line 29: @@
 Later models supported an interface (the [[UNICHANNEL 15 System|UNICHANNEL-15]], UC15) to a satellite [[PDP-11]] (usually a [[PDP-11/05]]), through which other PDP-11-native peripherals could be supported, including [[Direct Memory Access|DMA]] directly into the PDP-15's memory through the [[MX15-B Memory Multiplexer]]. These sometimes used the [[UNIBUS]] [[UNIBUS parity#18-bit width|adaption for 18-bit mode]], where the two [[parity]] lines were recycled into 2 extra data lines.
 ==Further reading==
@@ Line 34: / Line 59: @@
 ''(All available online through [[BitSavers]].)''
-* "PDP-15 Systems Reference Manual"
+* ''PDP-15 Systems User's Handbook: Volume I - Processor''
-* "PDP-15 Systems User's Handbook: Volume I - Processor"
+* ''PDP-15 Systems User's Handbook: Volume II - Peripherals''
 ==External links==
 * [http://www.bitsavers.org/pdf/dec/pdp15/ PDP-15] - documentation at [[Bitsavers]]
 * [http://www.vaxarchive.org/hardware/pdp11/pdp15rc.tar PDP-15 reference card] (images in TAR file)
 * [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-H9ZA-D_RF09_Jul70.pdf RS09 DECdisk System Maintenance Manual]
-* [http://www.datormuseum.se/documentation-software/pdp-15-documentation PDP-15 documentation]
+<!-- * [http://www.datormuseum.se/documentation-software/pdp-15-documentation PDP-15 documentation] -->
 * [http://simh.trailing-edge.com/docs/advmonsys.pdf Unearthing The PDP-15’s Operating Systems]
 [[Category: DEC Systems]]

@@ Line 40: / Line 40: @@
 ==External links==
 * [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-H9ZA-D_RF09_Jul70.pdf RS09 DECdisk System Maintenance Manual]
 * [http://www.datormuseum.se/documentation-software/pdp-15-documentation PDP-15 documentation]

@@ Line 9: / Line 9: @@
 | logic type = [[Transistor-transistor logic|TTL]] [[Integrated circuit|IC]]s
 <!--| design type =  asynchronous with hardware subroutines  -->
-| clock speed = 1.6 μsec (basic instructions)
+| instruction speed = 1.6 μsec (basic)
 | memory speed = 0.8 μsec
 | memory mgmt = bounds register; [[base and bounds]] pair (both optional)

@@ Line 26: / Line 26: @@
 KM15 [[memory management]] included a boundary register to set the boundary between protected and un-protected memory, and two modes for the [[Central Processing Unit|CPU]]. A memory relocation option, the KT15, with a [[base and bounds]] register pair, was also available.
-A large range of [[peripheral]]s were available, including [[DECtape]] (via the TC15 controller), [[fixed-head disk]] (RF15 controller), and [[RP02 disk drive|RP02]] large disk (RP15 controller).
+A large range of [[peripheral]]s were available, including [[DECtape]] (via the TC15 controller), [[fixed-head disk]] (RS09 disk via the RF15 controller), and [[RP02 disk drive|RP02]] large [[disk]] (RP15 controller).
 Later models supported an interface (the [[UNICHANNEL 15 System|UNICHANNEL-15]], UC15) to a satellite [[PDP-11]] (usually a [[PDP-11/05]]), through which other PDP-11-native peripherals could be supported, including [[Direct Memory Access|DMA]] directly into the PDP-15's memory through the [[MX15-B Memory Multiplexer]]. These sometimes used the [[UNIBUS]] [[UNIBUS parity#18-bit width|adaption for 18-bit mode]], where the two [[parity]] lines were recycled into 2 extra data lines.
-==Further Reading==
+==Further reading==
 ''(All available online through [[BitSavers]].)''
@@ Line 38: / Line 38: @@
 * "PDP-15 Systems User's Handbook: Volume II - Peripherals"
-==External Links==
+==External links==
 * [http://www.datormuseum.se/documentation-software/pdp-15-documentation PDP-15 documentation]
 * [http://simh.trailing-edge.com/docs/advmonsys.pdf Unearthing The PDP-15’s Operating Systems]
@@ Line 45: / Line 46: @@
 {{semi-stub}}
-[[Category:DEC Systems]]
+[[Category: DEC Systems]]

@@ Line 7: / Line 7: @@
 | physical address = 17 bits (128K words)
 | virtual address = 12 bits (direct), 15 bits (indirect), 17 bits (indexed)
-| logic type = [[Transistor–transistor logic|TTL]] [[Integrated circuit|IC]]s
+| logic type = [[Transistor-transistor logic|TTL]] [[Integrated circuit|IC]]s
 <!--| design type =  asynchronous with hardware subroutines  -->
 | clock speed = 1.6 μsec (basic instructions)

← Older revision		Revision as of 18:16, 18 February 2018
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	{{stub}}		{{stub}}

−	~~[[Category:Computers]]~~	+	[[Category:DEC Systems]]
−	[[Category:DEC ~~Computer~~ Systems]]