PDP-9 - Revision history

Jnc: /* External links */ +PDP-9 Restoration Blog 2024

2025-07-16T21:48:18Z

‎External links: +PDP-9 Restoration Blog 2024

Jnc: Re-implementation in FLIP CHIPs

2024-02-09T20:14:13Z

Re-implementation in FLIP CHIPs

Jnc: /* External links */ +several survivors

2024-02-09T19:47:00Z

‎External links: +several survivors

Jnc: /* External links */ +RICM restoration blog

2024-02-07T01:22:13Z

‎External links: +RICM restoration blog

Larsbrinkhoff: A comment about PDP-9 microcode I found online. Given the mix of microcode with random logic, I think "diagonal microprogramming" is an apt description.

2023-08-12T06:19:26Z

A comment about PDP-9 microcode I found online. Given the mix of microcode with random logic, I think "diagonal microprogramming" is an apt description.

Larsbrinkhoff: The 9/L was slower!

2023-07-25T06:23:04Z

The 9/L was slower!

Jnc: List front panel functions implemented with microcode; Memory Extension was bank switching

2023-07-24T10:39:21Z

List front panel functions implemented with microcode; Memory Extension was bank switching

Jnc: Front panel functions used microcode. (Just some, or all?)

2023-07-23T15:29:36Z

Front panel functions used microcode. (Just some, or all?)

Jnc: /* See also */ +PDP-9 control memory

2023-07-17T09:49:50Z

‎See also: +PDP-9 control memory

Larsbrinkhoff: Link to Dartmouth's PDP-9 Mini Time-Sharing System.

2023-07-15T11:39:39Z

Link to Dartmouth's PDP-9 Mini Time-Sharing System.

@@ Line 61: / Line 61: @@
 ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2022 PDP-9 Restoration Blog 2022]
 ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2023 PDP-9 Restoration Blog 2023]
 * [https://www.pdp-9.net/start-page Digital Equipment Corp. PDP-9] - another PDP-9
 ** [https://www.pdp-9.net/restoration-blog/the-rescue The rescue]

@@ Line 1: / Line 1: @@
 {{Infobox Machine
 | name = PDP-9
 | manufacturer = [[Digital Equipment Corporation]]
 | year first shipped = 1966
@@ Line 8: / Line 11: @@
 | virtual address = 13 bits (direct), 15 bits (extended)
 | logic type = PNP [[Transistor]] [[FLIP CHIP]]s
-| design type =  [[microcode]]d
+| design type = [[microcode]]d
 <!-- | clock speed =  μsec (basic instructions) -->
 | memory speed = 1 μsec (9) or 1.5 μsec (9/L)
@@ Line 17: / Line 20: @@
 | price = US$30K (8KW system)
 }}
-[[Image:CIPG-PDP9.png|200px|thumb|right|PDP-9 at MIT Cognitive Information Processing Group.]]
+Its principal intended use was for [[real-time system]]s, including data recording and process control. A variety of models were offered; the basic system provided 8K words of [[main memory]], and the PDP-9/L was a cost-reduced system with cheaper peripherals and 4KW of memory.
-The '''PDP-9''' was [[Digital Equipment Corporation|DEC]]'s fourth 18-bit computer, and the first DEC [[Central Processing Unit|CPU]] to use [[microcode]]. A little over 400 were built. It was a re-implementation of the [[PDP-7]]; the PDP-9 'Basic Software System' manual indicates that most PDP-7 software will run, un-modified.
+==Internals==
-It was a [[load-store architecture]], with a single [[accumulator]]. [[Instruction]]s had a 4-bit opcode, 1 bit of indirect, and 13 bits of address. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and [[input/output|I/O]] ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional [[Extended Arithmetic Element|EAE]].
+It was a [[load-store architecture]], with a single [[accumulator]]. [[Instruction]]s had a 4-bit [[operation code|opcode]], 1 bit of indirect, and 13 bits of [[address]]. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and [[input/output|I/O]] ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional [[Extended Arithmetic Element|EAE]].
-For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address', the [[address]] of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some [[front panel]] functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode.  According to a comment in the PDP-11 FAQ from Bernd Ullman, "''the first intention was to build a horizontally programmed machine but this was dropped because of the resulting word length needed for the control-words. So some(most ?) of the control signals were encoded and this led to a typical diagonally microprogrammed machine I think.''"
+For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used read-only hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address' (CMA), the address of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some [[front panel]] functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode.  According to a comment in the PDP-11 FAQ from Bernd Ullman, "''the first intention was to build a horizontally programmed machine but this was dropped because of the resulting word length needed for the control-words. So some(most ?) of the control signals were encoded and this led to a typical diagonally microprogrammed machine I think.''"
 Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting; it was installed in pre-wired slots in the CPU's [[backplane]]. Use of more than 8KW of main memory (all core in the PDP-9) required the Memory Extension Control, KG09A, which provided [[bank switching]]. A [[memory management]] option, the KX09A, was also available; it included a [[register]] to set the boundary between protected and un-protected memory, and two modes for the CPU.
@@ Line 47: / Line 49: @@
 ==External links==
-* [http://www.bitsavers.org/pdf/dec/pdp9/ PDP-9] - Has manuals for KE09, KG09, KX09, KF09, etc
+* [http://www.bitsavers.org/pdf/dec/pdp9/ PDP-9] - documentation at [[BitSavers]]; has manuals for KE09, KG09, KX09, KF09, etc
 ** [http://www.bitsavers.org/pdf/dec/pdp9/PDP-9_UsersManual.pdf PDP-9 User Handbook]
 ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-68.pdf TC02 DECtape Transport Control Instruction Manual]
 ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-69.pdf TC02 DECtape Control Maintenance Manual]
 * [https://bitsavers.org/pdf/dartmouth/theses/Blean_-_The_PDP-9_Mini_Time-Sharing_System_197206.pdf Dartmouth PDP-9 Mini Time-Sharing System]
-* [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9 DEC PDP-9 System Number 319] - the RICM's PDP-9
+* [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9 DEC PDP-9 System Number 319] - the RICM's PDP-9 - has lots of good images of the interior
 ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration DEC PDP-9 Restoration] - the start of a long saga - 2012-17
 ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2019 PDP-9 Restoration Blog Starting 2019]

@@ Line 52: / Line 52: @@
 ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-69.pdf TC02 DECtape Control Maintenance Manual]
 * [https://bitsavers.org/pdf/dartmouth/theses/Blean_-_The_PDP-9_Mini_Time-Sharing_System_197206.pdf Dartmouth PDP-9 Mini Time-Sharing System]
-* [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration DEC PDP-9 Restoration] - the start of a long saga - 2012-17
+* [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9 DEC PDP-9 System Number 319] - the RICM's PDP-9
 ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2019 PDP-9 Restoration Blog Starting 2019]
 ** [https://www.ricomputermuseum.org/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2020 PDP-9 Restoration Blog Starting 2020]
@@ Line 58: / Line 59: @@
 ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2022 PDP-9 Restoration Blog 2022]
 ** [https://sites.google.com/a/ricomputermuseum.org/home/collections-gallery/equipment/dec-pdp-9/pdp-9-restoration-blog-starting-2023 PDP-9 Restoration Blog 2023]
 {{Nav DEC}}

@@ Line 52: / Line 52: @@
 ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-69.pdf TC02 DECtape Control Maintenance Manual]
 * [https://bitsavers.org/pdf/dartmouth/theses/Blean_-_The_PDP-9_Mini_Time-Sharing_System_197206.pdf Dartmouth PDP-9 Mini Time-Sharing System]
 {{Nav DEC}}

@@ Line 26: / Line 26: @@
 It was a [[load-store architecture]], with a single [[accumulator]]. [[Instruction]]s had a 4-bit opcode, 1 bit of indirect, and 13 bits of address. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and [[input/output|I/O]] ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional [[Extended Arithmetic Element|EAE]].
-For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address', the [[address]] of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some [[front panel]] functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode.
+For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address', the [[address]] of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some [[front panel]] functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode.  According to a comment in the PDP-11 FAQ from Bernd Ullman, "''the first intention was to build a horizontally programmed machine but this was dropped because of the resulting word length needed for the control-words. So some(most ?) of the control signals were encoded and this led to a typical diagonally microprogrammed machine I think.''"
 Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting; it was installed in pre-wired slots in the CPU's [[backplane]]. Use of more than 8KW of main memory (all core in the PDP-9) required the Memory Extension Control, KG09A, which provided [[bank switching]]. A [[memory management]] option, the KX09A, was also available; it included a [[register]] to set the boundary between protected and un-protected memory, and two modes for the CPU.

@@ Line 17: / Line 17: @@
 | price = US$30K (8KW system)
 }}
 The '''PDP-9''' was [[Digital Equipment Corporation|DEC]]'s fourth 18-bit computer, and the first DEC [[Central Processing Unit|CPU]] to use [[microcode]]. A little over 400 were built. It was a re-implementation of the [[PDP-7]]; the PDP-9 'Basic Software System' manual indicates that most PDP-7 software will run, un-modified.
@@ Line 24: / Line 26: @@
 It was a [[load-store architecture]], with a single [[accumulator]]. [[Instruction]]s had a 4-bit opcode, 1 bit of indirect, and 13 bits of address. Opcodes 000-060 were memory-reference instructions; for non-memory operations ('074' opcode), and [[input/output|I/O]] ('070'), bits in the 'address' field were used to specify details. '064' opcodes were for the optional [[Extended Arithmetic Element|EAE]].
-For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address', the [[address]] of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. [[Front panel]] functions used microcode.
+For the high-speed [[read-only memory|ROM]] needed for a microcoded design, it used hard-wired [[core memory]], similar to that in the [[Apollo Guidance Computer]]. [[Microinstruction]]s were 36 bits wide, of which 6 were the 'control memory address', the [[address]] of the next one; there was no micro-[[Program Counter|PC]]. Conditional micro-branching was available by modifying the CMA during that microinstruction. Some [[front panel]] functions (START, EXAMINE/DEPOSIT (NEXT), and READ IN) are implemented with microcode.
-Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting (it was installed in pre-wired slots in the CPU's [[backplane]]). Use of more than 8KW of main memory (all core in the PDP-9) required the Memory Extension Control, KG09A. A [[memory management]] option, the KX09A, which included a boundary [[register]] to set the boundary between protected and un-protected memory, and two modes for the CPU, was also available.
+Multiply/divide was a hardware option, the KE09A EAE, which also performed shifting; it was installed in pre-wired slots in the CPU's [[backplane]]. Use of more than 8KW of main memory (all core in the PDP-9) required the Memory Extension Control, KG09A, which provided [[bank switching]]. A [[memory management]] option, the KX09A, was also available; it included a [[register]] to set the boundary between protected and un-protected memory, and two modes for the CPU.
 The KF09A Automatic Priority Interrupt option provided 8 levels of [[interrupt]] priority, each of which could support up to 8 [[peripheral|devices]]. Each device could provide its own [[interrupt vector]]. The DM09 [[Direct Memory Access]] Channel Multiplexor Adapter provided high-speed devices with direct access to main memory for data transfers.
@@ Line 32: / Line 34: @@
 A large range of [[peripheral]]s were available, including [[DECtape]] (via the TC02 controller), [[magnetic tape]] (via the TC59), [[drum]] (RM09 controller) and [[fixed-head disk]] (RB09; and RS09, via the RF09 controller). The RM09 and RB09 use the DM09.
-[[Image:CIPG-PDP9.png|200px|thumb|right|PDP-9 at MIT Cognitive Information Processing Group.]]
+{{semi-stub}}
 ==See also==
@@ Line 50: / Line 52: @@
 ** [http://www.bitsavers.org/pdf/dec/pdp9/DEC-09-I3CA-D-69.pdf TC02 DECtape Control Maintenance Manual]
 * [https://bitsavers.org/pdf/dartmouth/theses/Blean_-_The_PDP-9_Mini_Time-Sharing_System_197206.pdf Dartmouth PDP-9 Mini Time-Sharing System]
 {{Nav DEC}}

← Older revision		Revision as of 09:49, 17 July 2023
Line 33:		Line 33:

	[[Image:CIPG-PDP9.png\|200px\|thumb\|right\|PDP-9 at MIT Cognitive Information Processing Group.]]		[[Image:CIPG-PDP9.png\|200px\|thumb\|right\|PDP-9 at MIT Cognitive Information Processing Group.]]
		+
		+	==See also==
		+
		+	* [[PDP-9 control memory]]

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