RH11 MASSBUS controller - Revision history

Jnc: /* External links */ Bitsavers has reorganized a bit; deal with Manx dropping Antonio's stuff

2026-10-07T16:16:15Z

External links: Bitsavers has reorganized a bit; deal with Manx dropping Antonio's stuff

← Older revision		Revision as of 16:16, 7 October 2026
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	==External links==		==External links==

	* [http://www.bitsavers.org/pdf/dec/unibus/ UNIBUS] - BitSavers UNIBUS directory, contains many RH11 documents		* [http://www.bitsavers.org/pdf/dec/unibus/RH11/ UNIBUS/RH11] - BitSavers UNIBUS/RH11 directory, contains many RH11 documents
	** [http://www.bitsavers.org/pdf/dec/unibus/RH11-AB_OptionDescr.pdf RH11-AB/Special Massbus Controller Option Description] (CSS-MO-F-5.2-26)		** [http://www.bitsavers.org/pdf/dec/unibus/RH11/RH11-AB_OptionDescr.pdf RH11-AB/Special Massbus Controller Option Description] (CSS-MO-F-5.2-26)
	** [http://www.bitsavers.org/pdf/dec/unibus/RH11_Peripheral_Controller_Course.pdf RH-11 Peripheral Controller Course Documents] - contains good coverage, including several more complex use cases		** [http://www.bitsavers.org/pdf/dec/unibus/RH11/RH11_Peripheral_Controller_Course.pdf RH-11 Peripheral Controller Course Documents] - contains good coverage, including several more complex use cases
	** [http://www.bitsavers.org/pdf/dec/unibus/RH11-AB_Engineering_Drawings_Apr78.pdf RH11 Engineering Drawings]		** [http://www.bitsavers.org/pdf/dec/unibus/RH11/RH11-AB_Engineering_Drawings_Apr78.pdf RH11 Engineering Drawings]
	** [http://www.bitsavers.org/pdf/dec/unibus/MP00382_RH11-B_schem_Jun77.pdf RH11-B Field Maintenance Print Set] (MP00382)		** [http://www.bitsavers.org/pdf/dec/unibus/RH11/MP00382_RH11-B_schem_Jun77.pdf RH11-B Field Maintenance Print Set] (MP00382)
	* [https://manx-docs.org/collections/antonio/arc-db/EY-D3024-WB-001.pdf RH11/RH70 MASSBUS Controllers Self-Paced Course]		* [https://web.archive.org/web/20250606230808/https://manx-docs.org/collections/antonio/arc-db/EY-D3024-WB-001.pdf RH11/RH70 MASSBUS Controllers Self-Paced Course]
	* [http://www.bitsavers.org/pdf/dec/disc/rjs03_rjs04/DEC-11-HRJSA-B-D_RJS04_RJS03_fixed-head_disk_system_maintenance_manual_Aug1974.pdf RJS04/RJS03 fixed-head disk system maintenance manual] (DEC-11-HRJSA-B-D) - contains detailed RH11 information		* [http://www.bitsavers.org/pdf/dec/disc/rjs03_rjs04/DEC-11-HRJSA-B-D_RJS04_RJS03_fixed-head_disk_system_maintenance_manual_Aug1974.pdf RJS04/RJS03 fixed-head disk system maintenance manual] (DEC-11-HRJSA-B-D) - contains detailed RH11 information

	[[Category: MASSBUS Controllers]]		[[Category: MASSBUS Controllers]]
	[[Category: UNIBUS Storage Controllers]]		[[Category: UNIBUS Storage Controllers]]

Jnc: /* External links */ +FMPS, mauals

2022-02-25T13:40:58Z

External links: +FMPS, mauals

← Older revision		Revision as of 13:40, 25 February 2022
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	==External links==		==External links==

			* [http://www.bitsavers.org/pdf/dec/unibus/ UNIBUS] - BitSavers UNIBUS directory, contains many RH11 documents
			** [http://www.bitsavers.org/pdf/dec/unibus/RH11-AB_OptionDescr.pdf RH11-AB/Special Massbus Controller Option Description] (CSS-MO-F-5.2-26)
			** [http://www.bitsavers.org/pdf/dec/unibus/RH11_Peripheral_Controller_Course.pdf RH-11 Peripheral Controller Course Documents] - contains good coverage, including several more complex use cases
			** [http://www.bitsavers.org/pdf/dec/unibus/RH11-AB_Engineering_Drawings_Apr78.pdf RH11 Engineering Drawings]
			** [http://www.bitsavers.org/pdf/dec/unibus/MP00382_RH11-B_schem_Jun77.pdf RH11-B Field Maintenance Print Set] (MP00382)
			* [https://manx-docs.org/collections/antonio/arc-db/EY-D3024-WB-001.pdf RH11/RH70 MASSBUS Controllers Self-Paced Course]
	* [http://www.bitsavers.org/pdf/dec/disc/rjs03_rjs04/DEC-11-HRJSA-B-D_RJS04_RJS03_fixed-head_disk_system_maintenance_manual_Aug1974.pdf RJS04/RJS03 fixed-head disk system maintenance manual] (DEC-11-HRJSA-B-D) - contains detailed RH11 information		* [http://www.bitsavers.org/pdf/dec/disc/rjs03_rjs04/DEC-11-HRJSA-B-D_RJS04_RJS03_fixed-head_disk_system_maintenance_manual_Aug1974.pdf RJS04/RJS03 fixed-head disk system maintenance manual] (DEC-11-HRJSA-B-D) - contains detailed RH11 information

	[[Category: MASSBUS Controllers]]		[[Category: MASSBUS Controllers]]
	[[Category: UNIBUS Storage Controllers]]		[[Category: UNIBUS Storage Controllers]]

Jnc: /* External links */ useful manual

2021-09-24T16:08:35Z

External links: useful manual

← Older revision		Revision as of 16:08, 24 September 2021
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	The order of the UNIBUS 'B' in/out and 'A' out slots is apparently to allow the use of an [[M9200 UNIBUS jumper]] to tie the two UNIBI together. (E.g. in the 'disk' RH11 in the KS10, where the CPU needs access to the device registers, interrupts, etc, which are on UNIBUS 'A', but also has to be connected to UNIBUS 'B', for 18-bit data transfers.)		The order of the UNIBUS 'B' in/out and 'A' out slots is apparently to allow the use of an [[M9200 UNIBUS jumper]] to tie the two UNIBI together. (E.g. in the 'disk' RH11 in the KS10, where the CPU needs access to the device registers, interrupts, etc, which are on UNIBUS 'A', but also has to be connected to UNIBUS 'B', for 18-bit data transfers.)

			==External links==

			* [http://www.bitsavers.org/pdf/dec/disc/rjs03_rjs04/DEC-11-HRJSA-B-D_RJS04_RJS03_fixed-head_disk_system_maintenance_manual_Aug1974.pdf RJS04/RJS03 fixed-head disk system maintenance manual] (DEC-11-HRJSA-B-D) - contains detailed RH11 information

	[[Category: MASSBUS Controllers]]		[[Category: MASSBUS Controllers]]
	[[Category: UNIBUS Storage Controllers]]		[[Category: UNIBUS Storage Controllers]]

Jnc: /* Second UNIBUS */ Add bus hog ref

2019-11-24T15:09:35Z

Second UNIBUS: Add bus hog ref

← Older revision		Revision as of 15:09, 24 November 2019
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	If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s.		If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s.

	The 'A' UNIBUS has a mode where it can do two DMA cycles per grant. The 'B' UNIBUS can operate in so-called 'Bus Hog' mode (enabled by a [[jumper]]); in this mode, the RH11 can do block transfers without going through any UNIBUS [[arbitration]] cycles. The RH11-C ECO breaks such blocks up into 16-word groups.		The 'A' UNIBUS has a mode where it can do two DMA cycles per grant. The 'B' UNIBUS can operate in so-called 'Bus Hog' mode (enabled by a [[jumper]]); in this mode, the RH11 can do block transfers without going through any UNIBUS [[arbitration]] cycles. (See Section 4.12.10, "BUS HOG Mode", pg. 4-22
			[59 of the PDF] in the "RH11-AB Option Description" for details.) The RH11-C ECO breaks such blocks up into 16-word groups.

	===18-bit mode===		===18-bit mode===

Jnc: Org cleanup; RH11-C details

2019-11-24T15:05:44Z

Org cleanup; RH11-C details

← Older revision		Revision as of 15:05, 24 November 2019
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	The '''RH11 MASSBUS controller''' ~~(generally the '''RH11-AB''' model)~~ allowed the interconnection of [[MASSBUS]] devices such as the [[RP04 disk drive\|RP04]] to systems with a [[UNIBUS]], primarily on [[PDP-11]]'s.		The '''RH11 MASSBUS controller''' allowed the interconnection of [[MASSBUS]] devices such as the [[RP04 disk drive\|RP04]] to systems with a [[UNIBUS]], primarily on [[PDP-11]]'s.

	There ~~is an~~ '''RH11-B''' model; it uses the M9725-YA card~~; the difference is not known~~, ~~but~~ involves the two added one-shots in the lower left corner of drawing BCTB.		There are three models:

			* The '''RH11-AB''' model, the most common version.
			* The '''RH11-B''' model; it uses the M9725-YA card, which has an [[Engineering Change Order\|ECO]] which involves the two added one-shots in the lower left corner of drawing BCTB; the effect is not known.
			* The '''RH11-C''' model; it uses the M9724-YA card, which has an ECO modifying the operation of 'Bus Hog' mode (see below).

	===Second UNIBUS===		===Second UNIBUS===
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	The [[register]]s in the RH11 are only accesssible from the 'first' UNIBUS (UNIBUS 'A'); likewise, [[interrupt]]s of the [[Central Processing Unit\|CPU]] are only possible via UNIBUS 'A'. (The interrupt grant lines on UNIBUS 'B" are only present on the backplane, they are not routed to any of the cards.) The RH11 can be set under [[software]] control to do [[Direct Memory Access\|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B').		The [[register]]s in the RH11 are only accesssible from the 'first' UNIBUS (UNIBUS 'A'); likewise, [[interrupt]]s of the [[Central Processing Unit\|CPU]] are only possible via UNIBUS 'A'. (The interrupt grant lines on UNIBUS 'B" are only present on the backplane, they are not routed to any of the cards.) The RH11 can be set under [[software]] control to do [[Direct Memory Access\|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B').

	If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s. A [[jumper]] ~~allows~~ the RH11 to do block transfers ~~on UNIBUS 'B'~~ without going through an [[arbitration]] ~~cycle; the 'A' UNIBUS has a mode where it can do two DMA~~ cycles ~~per grant~~.		If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s.

			The 'A' UNIBUS has a mode where it can do two DMA cycles per grant. The 'B' UNIBUS can operate in so-called 'Bus Hog' mode (enabled by a [[jumper]]); in this mode, the RH11 can do block transfers without going through any UNIBUS [[arbitration]] cycles. The RH11-C ECO breaks such blocks up into 16-word groups.

	===18-bit mode===		===18-bit mode===

	The RH11 has the capability to operate in [[UNIBUS parity#18-bit width\|18-bit mode]]; in this mode, the PA and PB UNIBUS [[parity]] lines are used for data bits 16 and 17. The [[PDP-15]] and [[KS10]] made use of this capability, the latter with the ~~'''~~RH11-C~~'''~~ model.		The RH11 has the capability to operate in [[UNIBUS parity#18-bit width\|18-bit mode]]; in this mode, the PA and PB UNIBUS [[parity]] lines are used for data bits 16 and 17. The [[PDP-15]] and [[KS10]] made use of this capability, the latter with the RH11-C model.

	(The difference between the -AB and -C is currently unknown; the latter used the M7294-YA instead of the M7294 as in the former. Since that card is the MASSBUS data buffer and control, it's likely related to the data transfer.)

	Note that 18-bit mode is only available on the 'B' UNIBUS (which must be selected) if a [[jumper]] is removed; see Section 4.16 "Logic Diagram DBCE", pg. 4-28 (65 of the PDF) in the "RH11-AB Option Description" for details.		Note that 18-bit mode is only available on the 'B' UNIBUS (which must be selected) if a [[jumper]] is removed; see Section 4.16 "Logic Diagram DBCE", pg. 4-28 (65 of the PDF) in the "RH11-AB Option Description" for details.

Jnc: /* Second UNIBUS */ B grant lines backplane only

2019-11-23T15:50:57Z

Second UNIBUS: B grant lines backplane only

← Older revision		Revision as of 15:50, 23 November 2019
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	The RH11 contains connectors and circuitry for two separate UNIBUSes; the second UNIBUS is primarily used on systems with [[multi-port memory]], such as the [[PDP-11/45]].		The RH11 contains connectors and circuitry for two separate UNIBUSes; the second UNIBUS is primarily used on systems with [[multi-port memory]], such as the [[PDP-11/45]].

	The [[register]]s in the RH11 are only accesssible from the 'first' UNIBUS (UNIBUS 'A'); likewise, [[interrupt]]s of the [[Central Processing Unit\|CPU]] are only possible via UNIBUS 'A'. The RH11 can be set under [[software]] control to do [[Direct Memory Access\|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B').		The [[register]]s in the RH11 are only accesssible from the 'first' UNIBUS (UNIBUS 'A'); likewise, [[interrupt]]s of the [[Central Processing Unit\|CPU]] are only possible via UNIBUS 'A'. (The interrupt grant lines on UNIBUS 'B" are only present on the backplane, they are not routed to any of the cards.) The RH11 can be set under [[software]] control to do [[Direct Memory Access\|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B').

	If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s. A [[jumper]] allows the RH11 to do block transfers on UNIBUS 'B' without going through an [[arbitration]] cycle; the 'A' UNIBUS has a mode where it can do two DMA cycles per grant.		If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s. A [[jumper]] allows the RH11 to do block transfers on UNIBUS 'B' without going through an [[arbitration]] cycle; the 'A' UNIBUS has a mode where it can do two DMA cycles per grant.

Jnc: add some details

2019-11-23T15:42:53Z

add some details

← Older revision		Revision as of 15:42, 23 November 2019
Line 1:		Line 1:
	The '''RH11 MASSBUS controller''' (generally the '''RH11-AB''' model) allowed the interconnection of [[MASSBUS]] devices such as the [[RP04 disk drive\|RP04]] to systems with a [[UNIBUS]], primarily on [[PDP-11]]'s.		The '''RH11 MASSBUS controller''' (generally the '''RH11-AB''' model) allowed the interconnection of [[MASSBUS]] devices such as the [[RP04 disk drive\|RP04]] to systems with a [[UNIBUS]], primarily on [[PDP-11]]'s.

			There is an '''RH11-B''' model; it uses the M9725-YA card; the difference is not known, but involves the two added one-shots in the lower left corner of drawing BCTB.

	===Second UNIBUS===		===Second UNIBUS===
Line 13:		Line 15:
	The RH11 has the capability to operate in [[UNIBUS parity#18-bit width\|18-bit mode]]; in this mode, the PA and PB UNIBUS [[parity]] lines are used for data bits 16 and 17. The [[PDP-15]] and [[KS10]] made use of this capability, the latter with the '''RH11-C''' model.		The RH11 has the capability to operate in [[UNIBUS parity#18-bit width\|18-bit mode]]; in this mode, the PA and PB UNIBUS [[parity]] lines are used for data bits 16 and 17. The [[PDP-15]] and [[KS10]] made use of this capability, the latter with the '''RH11-C''' model.

	(The difference between the -AB and -C is currently unknown; the latter used the M7294-YA instead of the M7294 as in the former. Since that card is the MASSBUS data buffer and control, it's likely related to the ~~MASSBUS~~.)		(The difference between the -AB and -C is currently unknown; the latter used the M7294-YA instead of the M7294 as in the former. Since that card is the MASSBUS data buffer and control, it's likely related to the data transfer.)

	Note that 18-bit mode is only available on the 'B' UNIBUS (which must be selected) if a [[jumper]] is removed; see Section 4.16 "Logic Diagram DBCE", pg. 4-28 (65 of the PDF) in the "RH11-AB Option Description" for details.		Note that 18-bit mode is only available on the 'B' UNIBUS (which must be selected) if a [[jumper]] is removed; see Section 4.16 "Logic Diagram DBCE", pg. 4-28 (65 of the PDF) in the "RH11-AB Option Description" for details.
Line 49:		Line 51:
	* M688 - UNIBUS Power Fail Driver		* M688 - UNIBUS Power Fail Driver

	The RH11 backplane also contained three [[Small Peripheral Controller\|SPC]] slots in otherwise-unused slots; they are on UNIBUS 'A'.		The RH11 backplane also contained three [[Small Peripheral Controller\|SPC]] slots in otherwise-unused slots; they are on UNIBUS 'A'. The NPG [[bus grant line]] is routed through those slots, so they are fully capable.

	===Backplane layout===		===Backplane layout===

Jnc: /* Backplane layout */ jumpering UNIBI

2019-11-22T13:50:04Z

Backplane layout: jumpering UNIBI

← Older revision		Revision as of 13:50, 22 November 2019
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	\| 9 \|\| colspan="2" style="text-align:center;" \| UNIBUS A Out \|\| colspan="4" style="text-align:center;" \| SPC		\| 9 \|\| colspan="2" style="text-align:center;" \| UNIBUS A Out \|\| colspan="4" style="text-align:center;" \| SPC
	\|}		\|}

			The order of the UNIBUS 'B' in/out and 'A' out slots is apparently to allow the use of an [[M9200 UNIBUS jumper]] to tie the two UNIBI together. (E.g. in the 'disk' RH11 in the KS10, where the CPU needs access to the device registers, interrupts, etc, which are on UNIBUS 'A', but also has to be connected to UNIBUS 'B', for 18-bit data transfers.)

	[[Category: MASSBUS Controllers]]		[[Category: MASSBUS Controllers]]
	[[Category: UNIBUS Storage Controllers]]		[[Category: UNIBUS Storage Controllers]]

Jnc: /* Hardware */ spc location

2019-11-21T23:23:54Z

Hardware: spc location

← Older revision		Revision as of 23:23, 21 November 2019
Line 49:		Line 49:
	* M688 - UNIBUS Power Fail Driver		* M688 - UNIBUS Power Fail Driver

	The RH11 backplane also contained three [[Small Peripheral Controller\|SPC]] slots in otherwise-unused slots.		The RH11 backplane also contained three [[Small Peripheral Controller\|SPC]] slots in otherwise-unused slots; they are on UNIBUS 'A'.

	===Backplane layout===		===Backplane layout===

Jnc: Add 18-bit details

2019-11-21T23:11:17Z

Add 18-bit details

← Older revision		Revision as of 23:11, 21 November 2019
Line 1:		Line 1:
	The '''RH11 MASSBUS controller''' (~~technically,~~ the '''RH11-AB''') allowed the interconnection of [[MASSBUS]] devices such as the [[RP04 disk drive\|RP04]] to systems with a [[UNIBUS]], primarily on [[PDP-11]]'s.		The '''RH11 MASSBUS controller''' (generally the '''RH11-AB''' model) allowed the interconnection of [[MASSBUS]] devices such as the [[RP04 disk drive\|RP04]] to systems with a [[UNIBUS]], primarily on [[PDP-11]]'s.

	The RH11 has the capability to operate in [[UNIBUS parity#18-bit width\|18-bit mode]]; in this mode, the PA and PB UNIBUS [[parity]] lines are used for data bits 16 and 17. The [[KS10]] made use of this capability.		===Second UNIBUS===

	==Second UNIBUS==

	The RH11 contains connectors and circuitry for two separate UNIBUSes; the second UNIBUS is primarily used on systems with [[multi-port memory]], such as the [[PDP-11/45]].		The RH11 contains connectors and circuitry for two separate UNIBUSes; the second UNIBUS is primarily used on systems with [[multi-port memory]], such as the [[PDP-11/45]].
Line 9:		Line 7:
	The [[register]]s in the RH11 are only accesssible from the 'first' UNIBUS (UNIBUS 'A'); likewise, [[interrupt]]s of the [[Central Processing Unit\|CPU]] are only possible via UNIBUS 'A'. The RH11 can be set under [[software]] control to do [[Direct Memory Access\|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B').		The [[register]]s in the RH11 are only accesssible from the 'first' UNIBUS (UNIBUS 'A'); likewise, [[interrupt]]s of the [[Central Processing Unit\|CPU]] are only possible via UNIBUS 'A'. The RH11 can be set under [[software]] control to do [[Direct Memory Access\|DMA]] data transfers on either the first or second UNIBUS (UNIBUS 'B').

	If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s. A [[jumper]] allows the RH11 to do block transfers on UNIBUS 'B' without going through an [[arbitration]] cycle; the 'A' UNIBUS has a mode where it ~~does~~ two DMA cycles per grant.		If no CPU is connected to UNIBUS 'B', an [[M9300 terminator]] at the start of the bus can be configured to do [[Non-Processor Request\|NPR]] [[bus grant]]s. A [[jumper]] allows the RH11 to do block transfers on UNIBUS 'B' without going through an [[arbitration]] cycle; the 'A' UNIBUS has a mode where it can do two DMA cycles per grant.

			===18-bit mode===

			The RH11 has the capability to operate in [[UNIBUS parity#18-bit width\|18-bit mode]]; in this mode, the PA and PB UNIBUS [[parity]] lines are used for data bits 16 and 17. The [[PDP-15]] and [[KS10]] made use of this capability, the latter with the '''RH11-C''' model.

			(The difference between the -AB and -C is currently unknown; the latter used the M7294-YA instead of the M7294 as in the former. Since that card is the MASSBUS data buffer and control, it's likely related to the MASSBUS.)

			Note that 18-bit mode is only available on the 'B' UNIBUS (which must be selected) if a [[jumper]] is removed; see Section 4.16 "Logic Diagram DBCE", pg. 4-28 (65 of the PDF) in the "RH11-AB Option Description" for details.

	==Registers==		==Registers==