Talk:PDP-11 Extended Instruction Set - Revision history

Jnc: KEV11

2022-10-28T16:35:57Z

KEV11

Jnc: /* XOR? */ The /05 and /10 have the same CPU

2022-10-28T15:01:24Z

‎XOR?: The /05 and /10 have the same CPU

Bqt at 07:17, 28 October 2022

2022-10-28T07:17:37Z

Jnc: /* XOR? */ Why XOR isn't in the KE11-E

2022-10-28T04:56:42Z

‎XOR?: Why XOR isn't in the KE11-E

Bqt at 23:50, 27 October 2022

2022-10-27T23:50:03Z

Jnc: /* XOR? */ XOR is in the base KD11-A

2022-10-27T20:44:30Z

‎XOR?: XOR is in the base KD11-A

Bqt: Created page with "==XOR?== When talking about the PDP-11 EIS, it's a little complicated. You have the KE-11, which was the separate EIS option for the PDP-11/40, and you have all the other PDP-..."

2022-10-27T16:36:42Z

Created page with "==XOR?== When talking about the PDP-11 EIS, it's a little complicated. You have the KE-11, which was the separate EIS option for the PDP-11/40, and you have all the other PDP-..."

New page

==XOR?==
When talking about the PDP-11 EIS, it's a little complicated. You have the KE-11, which was the separate EIS option for the PDP-11/40, and you have all the other PDP-11s with EIS by default. The complication is that the instructions provided differ in that XOR was not included in the KE-11, but on all other models.
So the question is, should XOR be mentioned on this page or not?
--[[User:Bqt|Bqt]] ([[User talk:Bqt|talk]]) 18:36, 27 October 2022 (CEST)

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	::::: It's true that we don't have a document that says explicitly 'this is why instructions are divided this way between the KD11-A and KE11-E'. But we ''do'' have things like EK-KE11E-TM-002, which say 'the FOO instruction uses the bar register (which is on the KE11-E card)', which is about as close to the first, without actually saying it, as one can get!		::::: It's true that we don't have a document that says explicitly 'this is why instructions are divided this way between the KD11-A and KE11-E'. But we ''do'' have things like EK-KE11E-TM-002, which say 'the FOO instruction uses the bar register (which is on the KE11-E card)', which is about as close to the first, without actually saying it, as one can get!
	::::: [[PDP-11 architecture#Added later]] already said that all the instructions added in the -11/45 "appeared in all later models (except the -11/05 and -11/04)"; the /04 was missing here, it has been added. (The 05 and /10 are covered in one article; they have the same CPU, and differ only in the paint on the front panel.) [[User:Jnc\|Jnc]] ([[User talk:Jnc\|talk]]) 17:01, 28 October 2022 (CEST)		::::: [[PDP-11 architecture#Added later]] already said that all the instructions added in the -11/45 "appeared in all later models (except the -11/05 and -11/04)"; the /04 was missing here, it has been added. (The 05 and /10 are covered in one article; they have the same CPU, and differ only in the paint on the front panel.) [[User:Jnc\|Jnc]] ([[User talk:Jnc\|talk]]) 17:01, 28 October 2022 (CEST)
		+
		+	PS: I don't know about the [[KEV11-A]], whether the selection of instructions to include there has the same rationale as in the KE11-E. (The instruction split is the same: SOB,SXT,MARK,XOR in the default set in the basic [[LSI-11]]; MUL,DIV,ASH,ASHC in the KEV11.) I rather suspect it might be; the KEV11-A also includes the FIS floating point instructions, which will also need the ability to do multi-bit shifts in hardware, for efficient implementation. But without details of the inside of the KEV11 (and, AKAIK, there is none available), it's impossible to say with anything like the definitiveness of the KE11-E. [[User:Jnc\|Jnc]] ([[User talk:Jnc\|talk]]) 18:35, 28 October 2022 (CEST)

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	:::: I would agree with that position. But it is a conclusion we are drawing based on reasoning, not by any specific document from DEC. But I would probably vote for saying that in the article. And the basic instruction set is also all there is in 11/05 and 11/10 as well as the 11/04 if I remember right (in addition to the 11/15 and 11/20). --[[User:Bqt\|Bqt]] ([[User talk:Bqt\|talk]]) 09:17, 28 October 2022 (CEST)		:::: I would agree with that position. But it is a conclusion we are drawing based on reasoning, not by any specific document from DEC. But I would probably vote for saying that in the article. And the basic instruction set is also all there is in 11/05 and 11/10 as well as the 11/04 if I remember right (in addition to the 11/15 and 11/20). --[[User:Bqt\|Bqt]] ([[User talk:Bqt\|talk]]) 09:17, 28 October 2022 (CEST)
		+
		+	::::: It's true that we don't have a document that says explicitly 'this is why instructions are divided this way between the KD11-A and KE11-E'. But we ''do'' have things like EK-KE11E-TM-002, which say 'the FOO instruction uses the bar register (which is on the KE11-E card)', which is about as close to the first, without actually saying it, as one can get!
		+	::::: [[PDP-11 architecture#Added later]] already said that all the instructions added in the -11/45 "appeared in all later models (except the -11/05 and -11/04)"; the /04 was missing here, it has been added. (The 05 and /10 are covered in one article; they have the same CPU, and differ only in the paint on the front panel.) [[User:Jnc\|Jnc]] ([[User talk:Jnc\|talk]]) 17:01, 28 October 2022 (CEST)

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 :: You are right that XOR was already in the base of the -11/40 instruction set. I should probably have thought that comment through a bit more. I usually make it simple for myself by just grouping XOR with the MUL/DIV/ASH/ASHC since it use the same register-destination format for the opcode. But technically, there are a few more instructions that exists on all models except for the 11/20. And I basically think of them all as being the EIS (or extended instruction set). So yes, also SOB/MARK/SXT/RTT. The 11/20 defined the basic instruction set. What was added in the 11/45 was then EIS. Just that the EIS option for the 11/40 is needed for some of those instructions the 11/45 added. But that options is called EIS. There is no clear definition of what EIS means from DEC, sadly. (Or none that I know of right now. I'll poke around some...) --[[User:Bqt|Bqt]] ([[User talk:Bqt|talk]]) 01:50, 28 October 2022 (CEST)
-:: I think the reason that XOR (and SOB, etc) weren't included in the KE11-E, but the others (MUL, etc) were, was purely pragmatic engineering. The four instructions added in the KE11-E (MUL, DIV, ASH, ASHC) used additional data path elements (internal registers, etc) that were on the KE11-E board; the other instructions (XOR, SOB, etc) could be accomplished with the basic data path elements already in the main CPU. That's all there was to it!
+::: I think the reason that XOR (and SOB, etc) weren't included in the KE11-E, but the others (MUL, etc) were, was purely pragmatic engineering. The four instructions added in the KE11-E (MUL, DIV, ASH, ASHC) used additional data path elements (internal registers, etc) that were on the KE11-E board; the other instructions (XOR, SOB, etc) could be accomplished with the basic data path elements already in the main CPU. That's all there was to it!
-:: The KE11-E (with the additional data path elements needed for those instructions) did increase the cost of the -11/40 by a non-trivial amount; almost certainly a significant factor for a machine which was intended to be a 'low-cost' entry in the product line. I have an -11/40 price list from January, 1973; the base -11/40 was US$13K, and the KE11-E was US$1200. I am quite sure that's why they didn't just include the KE11-E functionality in the 'standard' -11/40, but made it an option.
+::: The KE11-E (with the additional data path elements needed for those instructions) did increase the cost of the -11/40 by a non-trivial amount; almost certainly a significant factor for a machine which was intended to be a 'low-cost' entry in the product line. I have an -11/40 price list from January, 1973; the base -11/40 was US$13K, and the KE11-E was US$1200. I am quite sure that's why they didn't just include the KE11-E functionality in the 'standard' -11/40, but made it an option.
-:: Should I add that to the article? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 06:56, 28 October 2022 (CEST)
+::: Should I add that to the article? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 06:56, 28 October 2022 (CEST)

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 So the question is, should XOR be mentioned on this page or not? --[[User:Bqt|Bqt]] ([[User talk:Bqt|talk]]) 18:36, 27 October 2022 (CEST)
-: Actually, XOR ''was'' included in the base [[KD11-A]] of the -11/40, which is why it's not in the KE11-A. And there's also SOB, SXT, MARK, and RTT in the base KD11-A, which are not in the -11/20, -11/05 and -11/04, but are in all the later machines, including the LSI-11. Those are covered [[PDP-11 architecture#Added later|here]]. So I'm not sure there is an error? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 22:43, 27 October 2022 (CEST)
+: Actually, XOR ''was'' included in the base [[KD11-A]] of the -11/40, which is why it's not in the KE11-E. And there's also SOB, SXT, MARK, and RTT in the base KD11-A, which are not in the -11/20, -11/05 and -11/04, but are in all the later machines, including the LSI-11. Those are covered [[PDP-11 architecture#Added later|here]]. So I'm not sure there is an error? [[User:Jnc|Jnc]] ([[User talk:Jnc|talk]]) 22:43, 27 October 2022 (CEST)
 :: You are right that XOR was already in the base of the -11/40 instruction set. I should probably have thought that comment through a bit more. I usually make it simple for myself by just grouping XOR with the MUL/DIV/ASH/ASHC since it use the same register-destination format for the opcode. But technically, there are a few more instructions that exists on all models except for the 11/20. And I basically think of them all as being the EIS (or extended instruction set). So yes, also SOB/MARK/SXT/RTT. The 11/20 defined the basic instruction set. What was added in the 11/45 was then EIS. Just that the EIS option for the 11/40 is needed for some of those instructions the 11/45 added. But that options is called EIS. There is no clear definition of what EIS means from DEC, sadly. (Or none that I know of right now. I'll poke around some...) --[[User:Bqt|Bqt]] ([[User talk:Bqt|talk]]) 01:50, 28 October 2022 (CEST)

← Older revision		Revision as of 23:50, 27 October 2022
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	: Actually, XOR ''was'' included in the base [[KD11-A]] of the -11/40, which is why it's not in the KE11-A. And there's also SOB, SXT, MARK, and RTT in the base KD11-A, which are not in the -11/20, -11/05 and -11/04, but are in all the later machines, including the LSI-11. Those are covered [[PDP-11 architecture#Added later\|here]]. So I'm not sure there is an error? [[User:Jnc\|Jnc]] ([[User talk:Jnc\|talk]]) 22:43, 27 October 2022 (CEST)		: Actually, XOR ''was'' included in the base [[KD11-A]] of the -11/40, which is why it's not in the KE11-A. And there's also SOB, SXT, MARK, and RTT in the base KD11-A, which are not in the -11/20, -11/05 and -11/04, but are in all the later machines, including the LSI-11. Those are covered [[PDP-11 architecture#Added later\|here]]. So I'm not sure there is an error? [[User:Jnc\|Jnc]] ([[User talk:Jnc\|talk]]) 22:43, 27 October 2022 (CEST)
		+
		+	:: You are right that XOR was already in the base of the -11/40 instruction set. I should probably have thought that comment through a bit more. I usually make it simple for myself by just grouping XOR with the MUL/DIV/ASH/ASHC since it use the same register-destination format for the opcode. But technically, there are a few more instructions that exists on all models except for the 11/20. And I basically think of them all as being the EIS (or extended instruction set). So yes, also SOB/MARK/SXT/RTT. The 11/20 defined the basic instruction set. What was added in the 11/45 was then EIS. Just that the EIS option for the 11/40 is needed for some of those instructions the 11/45 added. But that options is called EIS. There is no clear definition of what EIS means from DEC, sadly. (Or none that I know of right now. I'll poke around some...) --[[User:Bqt\|Bqt]] ([[User talk:Bqt\|talk]]) 01:50, 28 October 2022 (CEST)